mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
89 lines
3.0 KiB
C
89 lines
3.0 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/io.h>
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#include <nvgpu/engine_status.h>
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bool nvgpu_engine_status_is_ctxsw_switch(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctxsw_status == NVGPU_CTX_STATUS_CTXSW_SWITCH;
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}
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bool nvgpu_engine_status_is_ctxsw_load(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctxsw_status == NVGPU_CTX_STATUS_CTXSW_LOAD;
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}
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bool nvgpu_engine_status_is_ctxsw_save(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctxsw_status == NVGPU_CTX_STATUS_CTXSW_SAVE;
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}
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bool nvgpu_engine_status_is_ctxsw(struct nvgpu_engine_status_info
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*engine_status)
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{
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return (nvgpu_engine_status_is_ctxsw_switch(engine_status) ||
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nvgpu_engine_status_is_ctxsw_load(engine_status) ||
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nvgpu_engine_status_is_ctxsw_save(engine_status));
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}
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bool nvgpu_engine_status_is_ctxsw_invalid(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctxsw_status == NVGPU_CTX_STATUS_INVALID;
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}
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bool nvgpu_engine_status_is_ctxsw_valid(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctxsw_status == NVGPU_CTX_STATUS_VALID;
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}
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bool nvgpu_engine_status_is_ctx_type_tsg(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctx_id_type == ENGINE_STATUS_CTX_ID_TYPE_TSGID;
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}
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bool nvgpu_engine_status_is_next_ctx_type_tsg(struct nvgpu_engine_status_info
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*engine_status)
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{
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return engine_status->ctx_next_id_type ==
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ENGINE_STATUS_CTX_NEXT_ID_TYPE_TSGID;
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}
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void nvgpu_engine_status_get_ctx_id_type(struct nvgpu_engine_status_info
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*engine_status, u32 *ctx_id, u32 *ctx_type)
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{
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*ctx_id = engine_status->ctx_id;
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*ctx_type = engine_status->ctx_id_type;
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}
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void nvgpu_engine_status_get_next_ctx_id_type(struct nvgpu_engine_status_info
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*engine_status, u32 *ctx_next_id,
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u32 *ctx_next_type)
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{
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*ctx_next_id = engine_status->ctx_next_id;
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*ctx_next_type = engine_status->ctx_next_id_type;
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}
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