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git://nv-tegra.nvidia.com/linux-nvgpu.git
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61 lines
1.9 KiB
C
61 lines
1.9 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_CYCLESTATS_PRIV_H
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#define NVGPU_CYCLESTATS_PRIV_H
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#include <nvgpu/types.h>
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#define MULTICHAR_TAG(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
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enum BAR0_DEBUG_OPERATION {
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BARO_ZERO_NOP = 0,
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OP_END = MULTICHAR_TAG('D', 'O', 'N', 'E'),
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BAR0_READ32 = MULTICHAR_TAG('0', 'R', '3', '2'),
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BAR0_WRITE32 = MULTICHAR_TAG('0', 'W', '3', '2'),
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};
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struct share_buffer_head {
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enum BAR0_DEBUG_OPERATION operation;
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/* size of the operation item */
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u32 size;
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u32 completed;
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u32 failed;
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u64 context;
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u64 completion_callback;
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};
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struct nvgpu_cyclestate_buffer_elem {
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struct share_buffer_head head;
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/* in */
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u64 p_data;
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u64 p_done;
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u32 offset_bar0;
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u16 first_bit;
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u16 last_bit;
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/* out */
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/* keep 64 bits to be consistent */
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u64 data;
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};
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#endif /* NVGPU_CYCLESTATS_PRIV_H */
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