mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 18:16:01 +03:00
20235407ff
Remove an ancient piece of code that morphed from a hard coded fault ID lookup in the original gk20a driver. In the old days there was no top parsing code, so converting between engine ID and fault ID was done by a simle function. This code derived from that function for some reason. However, given that the HW top table is not actually broken, this code never executes. The only way this code would execute is if the HW top table reported that the fault ID for a GRCE engine is 0. But this never happens. JIRA NVGPU-5420 Change-Id: If8483faa9878f752c29ef6eadc1a56ce1de81942 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2362865 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
115 lines
3.5 KiB
C
115 lines
3.5 KiB
C
/*
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* Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/device.h>
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#include <nvgpu/engines.h>
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#include <nvgpu/log.h>
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#include <nvgpu/errno.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/hw/gm20b/hw_fifo_gm20b.h>
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#include "engines_gm20b.h"
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bool gm20b_is_fault_engine_subid_gpc(struct gk20a *g, u32 engine_subid)
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{
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return (engine_subid == fifo_intr_mmu_fault_info_engine_subid_gpc_v());
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}
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int gm20b_engine_init_ce_info(struct nvgpu_fifo *f)
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{
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struct gk20a *g = f->g;
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u32 i;
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enum nvgpu_fifo_engine engine_enum;
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u32 pbdma_mask = 0U;
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u32 gr_runlist_id;
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bool found;
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gr_runlist_id = nvgpu_engine_get_gr_runlist_id(g);
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nvgpu_log_info(g, "gr_runlist_id: %d", gr_runlist_id);
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for (i = NVGPU_DEVTYPE_COPY0; i <= NVGPU_DEVTYPE_COPY2; i++) {
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struct nvgpu_device *dev;
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struct nvgpu_engine_info *info;
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/*
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* Cast to a non-const version since we have to hack up a few fields for
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* SW to work.
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*/
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dev = (struct nvgpu_device *)nvgpu_device_get(g, i, 0);
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if (dev == NULL) {
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/*
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* Not an error condition; gm20b has only 1 CE.
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*/
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continue;
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}
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found = g->ops.fifo.find_pbdma_for_runlist(g,
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dev->runlist_id,
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&pbdma_mask);
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if (!found) {
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nvgpu_err(g, "busted pbdma map");
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return -EINVAL;
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}
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info = &g->fifo.engine_info[dev->engine_id];
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engine_enum = nvgpu_engine_enum_from_dev(g, dev);
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/* GR and GR_COPY shares same runlist_id */
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if ((engine_enum == NVGPU_ENGINE_ASYNC_CE) &&
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(gr_runlist_id == dev->runlist_id)) {
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engine_enum = NVGPU_ENGINE_GRCE;
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}
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info->engine_enum = engine_enum;
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if (g->ops.top.get_ce_inst_id != NULL) {
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dev->inst_id = g->ops.top.get_ce_inst_id(g, dev->type);
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}
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info->fault_id = dev->fault_id;
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info->intr_mask |= BIT32(dev->intr_id);
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info->reset_mask |= BIT32(dev->reset_id);
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info->runlist_id = dev->runlist_id;
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info->pbdma_id = nvgpu_safe_sub_u32(
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nvgpu_safe_cast_u64_to_u32(nvgpu_ffs(pbdma_mask)), 1U);
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info->inst_id = dev->inst_id;
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info->pri_base = dev->pri_base;
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/* engine_id starts from 0 to NV_HOST_NUM_ENGINES */
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f->active_engines_list[f->num_engines] = dev->engine_id;
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++f->num_engines;
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nvgpu_log_info(g, "gr info: engine_id %d runlist_id %d "
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"intr_id %d reset_id %d type %d "
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"engine_enum %d inst_id %d",
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dev->engine_id,
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dev->runlist_id,
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dev->intr_id,
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dev->reset_id,
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dev->type,
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engine_enum,
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dev->inst_id);
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}
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return 0;
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}
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