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6777bd5ed2
Add separate new unit gr/ctxsw_prog that provides interface to access h/w header files hw_ctxsw_prog_*.h Add below chip specific files that access above h/w unit and provide interface through g->ops.gr.ctxsw_prog.*() HAL for rest of the units common/gr/ctxsw_prog/ctxsw_prog_gm20b.c common/gr/ctxsw_prog/ctxsw_prog_gp10b.c common/gr/ctxsw_prog/ctxsw_prog_gv11b.c Remove all the h/w header includes from rest of the units and code. Remove direct calls to h/w headers ctxsw_prog_*() and use HALs g->ops.gr.ctxsw_prog.*() instead In gr_gk20a_find_priv_offset_in_ext_buffer(), h/w header ctxsw_prog_extended_num_smpc_quadrants_v() is only defined on gk20a And since we don't support gk20a remove corresponding code Add missing h/w header ctxsw_prog_main_image_pm_mode_ctxsw_f() for some chips Add new h/w header ctxsw_prog_gpccs_header_stride_v() Jira NVGPU-1526 Change-Id: I170f5c0da26ada833f94f5479ff299c0db56a732 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1966111 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
56 lines
1.9 KiB
C
56 lines
1.9 KiB
C
/*
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* GP10B GPU FECS traces
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*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include "gk20a/fecs_trace_gk20a.h"
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#include "fecs_trace_gp10b.h"
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#include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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int gp10b_fecs_trace_flush(struct gk20a *g)
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{
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struct fecs_method_op_gk20a op = {
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.mailbox = { .id = 0, .data = 0,
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.clr = ~0, .ok = 0, .fail = 0},
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.method.addr = gr_fecs_method_push_adr_write_timestamp_record_v(),
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.method.data = 0,
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.cond.ok = GR_IS_UCODE_OP_NOT_EQUAL,
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.cond.fail = GR_IS_UCODE_OP_SKIP,
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};
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int err;
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nvgpu_log(g, gpu_dbg_fn|gpu_dbg_ctxsw, " ");
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err = gr_gk20a_elpg_protected_call(g,
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gr_gk20a_submit_fecs_method_op(g, op, false));
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if (err != 0)
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nvgpu_err(g, "write timestamp record failed");
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return err;
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}
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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