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355ae7e6d9
The fuse unit is only targeting GP10B and GM20B HAL code that gets removed when the FUSA profile is in use. The fuse unit must therefore only be used when FUSA profile is not enabled. JIRA NVGPU-3690 Change-Id: I6d8922426c7cb86e79003fc5fe4bf804d75f69b1 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2140896 GVS: Gerrit_Virtual_Submit Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
74 lines
2.4 KiB
Makefile
74 lines
2.4 KiB
Makefile
# -*- mode: makefile -*-
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#
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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# DEALINGS IN THE SOFTWARE.
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include $(NVGPU_SRC)/Makefile.sources
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OBJS := $(srcs:%.c=$(NVGPU_OUT)/%.o)
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HEADERS := \
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$(NVGPU_SRC)/include/nvgpu/*.h \
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$(NVGPU_SRC)/include/nvgpu/hw/*/*.h
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CORE_OBJS := \
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$(CORE_OUT)/unit_main.o \
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$(CORE_OUT)/nvgpu.o \
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$(CORE_OUT)/args.o \
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$(CORE_OUT)/io.o \
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$(CORE_OUT)/module.o \
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$(CORE_OUT)/results.o \
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$(CORE_OUT)/exec.o
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CORE_HEADERS := \
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$(CORE_SRC)/../include/unit/*.h
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# Each directory under the UNIT_SRC directory should correspond to one module.
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UNITS := \
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$(UNIT_SRC)/posix/env \
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$(UNIT_SRC)/posix/bitops \
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$(UNIT_SRC)/posix/mockio \
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$(UNIT_SRC)/posix/fault-injection \
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$(UNIT_SRC)/posix/bug \
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$(UNIT_SRC)/pramin \
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$(UNIT_SRC)/interface/bsearch \
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$(UNIT_SRC)/interface/lock \
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$(UNIT_SRC)/interface/atomic \
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$(UNIT_SRC)/interface/rbtree \
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$(UNIT_SRC)/mm/nvgpu_sgt \
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$(UNIT_SRC)/mm/allocators/buddy_allocator \
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$(UNIT_SRC)/mm/allocators/nvgpu_allocator \
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$(UNIT_SRC)/mm/allocators/bitmap_allocator \
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$(UNIT_SRC)/mm/allocators/page_allocator \
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$(UNIT_SRC)/mm/gmmu/pd_cache \
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$(UNIT_SRC)/mm/gmmu/page_table \
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$(UNIT_SRC)/mm/page_table_faults \
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$(UNIT_SRC)/mm/nvgpu_mem \
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$(UNIT_SRC)/mm/vm \
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$(UNIT_SRC)/fifo/channel \
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$(UNIT_SRC)/fifo/runlist \
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$(UNIT_SRC)/fifo/tsg \
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$(UNIT_SRC)/list \
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$(UNIT_SRC)/enabled
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ifeq ($(CONFIG_NVGPU_HAL_NON_FUSA),1)
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UNITS += $(UNIT_SRC)/fuse
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endif
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