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f871b52fd3
Add devfreq governor support in order to allow frequency scaling in virtualization config. GPU clock frequency operations are re-directed to the server over RPC. Bug 200237433 Change-Id: I1c8e565a4fff36d3456dc72ebb20795b7822650e Signed-off-by: Sachit Kadle <skadle@nvidia.com> Reviewed-on: http://git-master/r/1295542 (cherry picked from commit d5c956fc06697eda3829c67cb22987e538213b29) Reviewed-on: http://git-master/r/1280968 (cherry picked from commit 25e2b3cf7cb5559a6849c0024d42c157564a9be2) Reviewed-on: http://git-master/r/1321835 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
114 lines
2.9 KiB
C
114 lines
2.9 KiB
C
/*
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* Virtualized GPU Clock Interface
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*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "vgpu/vgpu.h"
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#include "vgpu/clk_vgpu.h"
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static unsigned long
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vgpu_freq_table[TEGRA_VGPU_GPU_FREQ_TABLE_SIZE];
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unsigned long vgpu_clk_get_rate(struct device *dev)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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struct gk20a *g = platform->g;
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_GET_GPU_CLK_RATE;
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msg.handle = vgpu_get_handle(g);
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err) {
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gk20a_err(dev_from_gk20a(g),
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"%s failed - %d", __func__, err);
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return 0;
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}
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/* return frequency in Hz */
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return p->rate * 1000;
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}
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long vgpu_clk_round_rate(struct device *dev, unsigned long rate)
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{
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/* server will handle frequency rounding */
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return rate;
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}
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int vgpu_clk_set_rate(struct device *dev, unsigned long rate)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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struct gk20a *g = platform->g;
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate;
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int err = 0;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_SET_GPU_CLK_RATE;
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msg.handle = vgpu_get_handle(g);
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/* server dvfs framework requires frequency in kHz */
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p->rate = (u32)(rate / 1000);
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err) {
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gk20a_err(dev_from_gk20a(g),
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"%s failed - %d", __func__, err);
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return err;
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}
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return 0;
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}
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int vgpu_clk_get_freqs(struct device *dev,
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unsigned long **freqs, int *num_freqs)
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{
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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struct gk20a *g = platform->g;
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_get_gpu_freq_table_params *p =
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&msg.params.get_gpu_freq_table;
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unsigned int i;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_GET_GPU_FREQ_TABLE;
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msg.handle = vgpu_get_handle(g);
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p->num_freqs = TEGRA_VGPU_GPU_FREQ_TABLE_SIZE;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err) {
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gk20a_err(dev_from_gk20a(g),
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"%s failed - %d", __func__, err);
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return err;
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}
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/* return frequency in Hz */
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for (i = 0; i < p->num_freqs; i++)
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vgpu_freq_table[i] = p->freqs[i] * 1000;
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*freqs = vgpu_freq_table;
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*num_freqs = p->num_freqs;
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return 0;
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}
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