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In order to maintain separate mappings of GR TSG and global context
buffers for different subcontexts, we need to separate the memory
struct and the mapping struct for the buffers. This patch moves
the mappings of all GR ctx buffers to new structure
nvgpu_gr_ctx_mappings.
This will be instantiated per subcontext in the upcoming patches.
Summary of changes:
1. Various context buffers were allocated and mapped separately.
All TSG context buffers are now stored in gr_ctx->mem[] array
since allocation and mapping is unified for them.
2. Mapping/unmapping and querying the GPU VA of the context
buffers is now handled in ctx_mappings unit. Structure
nvgpu_gr_ctx_mappings in nvgpu_gr_ctx holds the maps.
On ALLOC_OBJ_CTX this struct is instantiated and deleted
on free_gr_ctx.
3. Introduce mapping flags for TSG and global context buffers.
This is to map different buffers with different caching
attribute. Map all buffers as cacheable except
PRIV_ACCESS_MAP, RTV_CIRCULAR_BUFFER, FECS_TRACE, GR CTX
and PATCH ctx buffers. Map all buffers as privileged.
4. Wherever VM or GPU VA is passed in the obj_ctx allocation
functions, they are now replaced by nvgpu_gr_ctx_mappings.
5. free_gr_ctx API need not accept the VM as mappings struct
will hold the VM. mappings struct will be kept in gr_ctx.
6. Move preemption buffers allocation logic out of
nvgpu_gr_obj_ctx_set_graphics_preemption_mode.
7. set_preemption_mode and gr_gk20a_update_hwpm_ctxsw_mode
functions need update to ensure buffers are allocated
and mapped.
8. Keep the unit tests and documentation updated.
With these changes there is clear seggregation of allocation and
mapping of GR context buffers. This will simplify further change
to add multiple address spaces support. With multiple address
spaces in a TSG, subcontexts created after first subcontext
just need to map the buffers.
Bug 3677982
Change-Id: I3cd5f1311dd85aad1cf547da8fa45293fb7a7cb3
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2712222
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
277 lines
8.6 KiB
C
277 lines
8.6 KiB
C
/*
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdlib.h>
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#include <unit/unit.h>
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#include <unit/io.h>
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#include <nvgpu/posix/io.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/gr/gr.h>
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#include <nvgpu/gr/global_ctx.h>
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#include <nvgpu/posix/posix-fault-injection.h>
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#include <nvgpu/posix/dma.h>
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#include "common/gr/gr_priv.h"
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#include "common/gr/global_ctx_priv.h"
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#include "../nvgpu-gr.h"
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#include "nvgpu-gr-global-ctx.h"
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#define DUMMY_SIZE 0xF0U
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static int dummy_l2_flush(struct gk20a *g, bool invalidate)
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{
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return -EINVAL;
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}
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int test_gr_global_ctx_alloc_error_injection(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int err;
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u64 gpu_va;
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bool valid;
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struct nvgpu_mem *mem;
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struct nvgpu_gr_global_ctx_buffer_desc *desc;
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struct nvgpu_posix_fault_inj *dma_fi =
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nvgpu_dma_alloc_get_fault_injection();
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desc = nvgpu_gr_global_ctx_desc_alloc(g);
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if (!desc) {
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unit_return_fail(m, "failed to allocate desc");
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}
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/* No size is set in desc, should fail */
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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nvgpu_gr_global_ctx_set_size(desc, NVGPU_GR_GLOBAL_CTX_CIRCULAR,
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DUMMY_SIZE);
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/* Size of pagepool buffer is not set, should fail */
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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nvgpu_gr_global_ctx_set_size(desc, NVGPU_GR_GLOBAL_CTX_PAGEPOOL,
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DUMMY_SIZE);
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/* Size of attribute buffer is not set, should fail */
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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nvgpu_gr_global_ctx_set_size(desc, NVGPU_GR_GLOBAL_CTX_ATTRIBUTE,
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DUMMY_SIZE);
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/* Size of access map buffer is not set, should fail */
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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nvgpu_gr_global_ctx_set_size(desc, NVGPU_GR_GLOBAL_CTX_PRIV_ACCESS_MAP,
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DUMMY_SIZE);
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/* Now, all the sizes are set in desc */
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/* Ensure mapping fails before buffers are allocated */
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gpu_va = nvgpu_gr_global_ctx_buffer_map(desc,
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NVGPU_GR_GLOBAL_CTX_CIRCULAR, NULL, false);
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if (gpu_va != 0) {
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unit_return_fail(m, "unexpected success");
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}
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/* Ensure unmapping fails before buffers are allocated */
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nvgpu_gr_global_ctx_buffer_unmap(desc, NVGPU_GR_GLOBAL_CTX_CIRCULAR,
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NULL, 0);
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/* Ensure no memory handle is returned before buffers are allocated */
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mem = nvgpu_gr_global_ctx_buffer_get_mem(desc,
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NVGPU_GR_GLOBAL_CTX_CIRCULAR);
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if (mem != NULL) {
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unit_return_fail(m, "unexpected success");
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}
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/* Ensure buffer ready status is false before they are allocated */
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valid = nvgpu_gr_global_ctx_buffer_ready(desc,
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NVGPU_GR_GLOBAL_CTX_CIRCULAR);
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if (valid) {
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unit_return_fail(m, "unexpected success");
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}
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/* Fail circular ctx buffer allocation */
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nvgpu_posix_enable_fault_injection(dma_fi, true, 0);
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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/* Fail pagepool ctx buffer allocation */
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nvgpu_posix_enable_fault_injection(dma_fi, true, 1);
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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/* Fail attribute ctx buffer allocation */
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nvgpu_posix_enable_fault_injection(dma_fi, true, 2);
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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/* Fail access map ctx buffer allocation */
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nvgpu_posix_enable_fault_injection(dma_fi, true, 3);
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err == 0) {
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unit_return_fail(m, "unexpected success");
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}
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/* Finally, verify successful context buffer allocation */
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nvgpu_posix_enable_fault_injection(dma_fi, false, 0);
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err != 0) {
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unit_return_fail(m,
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"failed to allocate global context buffers");
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}
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/* Try to allocate them one more time and ensure no error */
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err = nvgpu_gr_global_ctx_buffer_alloc(g, desc);
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if (err != 0) {
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unit_return_fail(m, "failed double allocation");
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}
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/* Check buffer ready status again, should be set */
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valid = nvgpu_gr_global_ctx_buffer_ready(desc,
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NVGPU_GR_GLOBAL_CTX_CIRCULAR);
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if (!valid) {
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unit_return_fail(m, "global buffer is not ready");
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}
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valid = nvgpu_gr_global_ctx_buffer_ready(desc,
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NVGPU_GR_GLOBAL_CTX_PAGEPOOL);
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if (!valid) {
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unit_return_fail(m, "global buffer is not ready");
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}
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valid = nvgpu_gr_global_ctx_buffer_ready(desc,
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NVGPU_GR_GLOBAL_CTX_ATTRIBUTE);
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if (!valid) {
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unit_return_fail(m, "global buffer is not ready");
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}
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valid = nvgpu_gr_global_ctx_buffer_ready(desc,
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NVGPU_GR_GLOBAL_CTX_PRIV_ACCESS_MAP);
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if (!valid) {
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unit_return_fail(m, "global buffer is not ready");
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}
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/* Cleanup */
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nvgpu_gr_global_ctx_buffer_free(g, desc);
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nvgpu_gr_global_ctx_desc_free(g, desc);
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return UNIT_SUCCESS;
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}
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int test_gr_global_ctx_local_ctx_error_injection(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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int err;
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struct nvgpu_mem mem;
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struct nvgpu_gr_global_ctx_local_golden_image *local_golden_image;
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struct nvgpu_gr_global_ctx_local_golden_image *local_golden_image_bk;
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/* Allocate dummy memory */
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err = nvgpu_dma_alloc(g, DUMMY_SIZE, &mem);
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if (err) {
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unit_return_fail(m, "failed to allocate dummy memory");
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}
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/* Successful allocation of local golden context */
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err = nvgpu_gr_global_ctx_alloc_local_golden_image(g, &local_golden_image, DUMMY_SIZE);
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if (err != 0) {
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unit_return_fail(m, "failed to initialize local golden image");
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}
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nvgpu_gr_global_ctx_init_local_golden_image(g, local_golden_image, &mem, DUMMY_SIZE);
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/* Trigger flush error during context load */
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g->ops.mm.cache.l2_flush = dummy_l2_flush;
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nvgpu_gr_global_ctx_load_local_golden_image(g,
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local_golden_image, &mem);
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/* Allocate dummy local golden context image */
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err = nvgpu_gr_global_ctx_alloc_local_golden_image(g, &local_golden_image_bk, DUMMY_SIZE);
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if (err != 0) {
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unit_return_fail(m, "failed to initialize local golden image");
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}
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nvgpu_gr_global_ctx_init_local_golden_image(g, local_golden_image_bk, &mem, DUMMY_SIZE);
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#ifdef CONFIG_NVGPU_GR_GOLDEN_CTX_VERIFICATION
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bool valid;
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/* Compare two images, they should match since both have zero's only */
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valid = nvgpu_gr_global_ctx_compare_golden_images(g, true, local_golden_image,
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local_golden_image_bk, DUMMY_SIZE);
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if (!valid) {
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unit_return_fail(m, "images do not match");
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}
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/* Try to match them in vidmem, should fail */
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valid = nvgpu_gr_global_ctx_compare_golden_images(g, false, local_golden_image,
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local_golden_image_bk, DUMMY_SIZE);
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if (valid) {
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unit_return_fail(m, "unexpected success");
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}
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/* Update dummy image and compare, now comparison should fail */
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*(local_golden_image_bk->context) = 0xFFU;
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valid = nvgpu_gr_global_ctx_compare_golden_images(g, true, local_golden_image,
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local_golden_image_bk, DUMMY_SIZE);
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if (valid) {
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unit_return_fail(m, "unexpected success");
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}
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#endif
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/* Cleanup */
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nvgpu_gr_global_ctx_deinit_local_golden_image(g, local_golden_image);
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nvgpu_gr_global_ctx_deinit_local_golden_image(g, local_golden_image_bk);
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nvgpu_dma_free(g, &mem);
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return UNIT_SUCCESS;
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}
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struct unit_module_test nvgpu_gr_global_ctx_tests[] = {
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UNIT_TEST(gr_global_ctx_setup, test_gr_init_setup, NULL, 0),
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UNIT_TEST(gr_global_ctx_alloc_errors, test_gr_global_ctx_alloc_error_injection, NULL, 0),
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UNIT_TEST(gr_global_ctx_local_ctx_errors, test_gr_global_ctx_local_ctx_error_injection, NULL, 0),
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UNIT_TEST(gr_global_ctx_cleanup, test_gr_remove_setup, NULL, 0),
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};
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UNIT_MODULE(nvgpu_gr_global_ctx, nvgpu_gr_global_ctx_tests, UNIT_PRIO_NVGPU_TEST);
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