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3e43f92f21
Mass copy ga10b & ga100 sources from nvgpu-next repo. TOP COMMIT-ID: 98f530e6924c844a1bf46816933a7fe015f3cce1 Jira NVGPU-4771 Change-Id: Ibf7102e9208133f8ef3bd3a98381138d5396d831 Signed-off-by: Sagar Kadamati <skadamati@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2524817 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
71 lines
2.6 KiB
C
71 lines
2.6 KiB
C
/*
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <common/falcon/falcon_sw_ga10b.h>
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#include <common/acr/acr_sw_ga10b.h>
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#include <common/acr/acr_sw_ga100.h>
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#ifndef NVGPU_NEXT_GPUID_H
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#define NVGPU_NEXT_GPUID_H
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#define NVGPU_NEXT_GPUID 0x0000017b
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#define NVGPU_NEXT_FECS_UCODE_SIG "ga10b/fecs_sig.bin"
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#define NVGPU_NEXT_GPCCS_UCODE_SIG "ga10b/gpccs_sig.bin"
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#define NVGPU_NEXT_INIT_HAL ga10b_init_hal
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#define NVGPU_NEXT_INIT_OS_OPS nvgpu_ga10b_init_os_ops
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#define NVGPU_NEXT_COMPATIBLE "nvidia,ga10b"
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#define NVGPU_NEXT_PLATFORM ga10b_tegra_platform
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#define NVGPU_NEXT_COMPATIBLE_VGPU "nvidia,ga10b-vgpu"
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#define NVGPU_NEXT_VGPU_INIT_HAL vgpu_ga10b_init_hal
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#define NVGPU_NEXT_PLATFORM_VGPU ga10b_vgpu_tegra_platform
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#define NVGPU_NEXT_PROFILER_QUIESCE nvgpu_next_profiler_hs_stream_quiesce
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#ifdef CONFIG_NVGPU_DGPU
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#define NVGPU_NEXT_DGPU_GPUID 0x00000170
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#define NVGPU_NEXT_DGPU_INIT_HAL ga100_init_hal
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#define NEXT_DGPU_FECS_UCODE_SIG "ga100/fecs_sig.bin"
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#define NEXT_DGPU_GPCCS_UCODE_SIG "ga100/gpccs_sig.bin"
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extern int ga100_init_hal(struct gk20a *g);
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#endif
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struct nvgpu_os_linux;
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extern int ga10b_init_hal(struct gk20a *g);
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extern struct gk20a_platform ga10b_tegra_platform;
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extern void nvgpu_next_perfmon_sw_init(struct gk20a *g,
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struct nvgpu_pmu_perfmon *perfmon);
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extern void nvgpu_next_pg_sw_init(struct gk20a *g, struct nvgpu_pmu_pg *pg);
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int vgpu_ga10b_init_hal(struct gk20a *g);
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extern struct gk20a_platform ga10b_vgpu_tegra_platform;
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extern void nvgpu_next_profiler_hs_stream_quiesce(struct gk20a *g);
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#endif
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