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Terje Bergstrom fc898d8f56 gpu: nvgpu: gp10b specific LTC ISR 
LTC interrupt register got moved, so use the new offset.

Bug 1587638

Change-Id: I3dbd44d92f2bcb3634c21ed46870ec1620d936cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/709571
Reviewed-by: Automatic_Commit_Validation_User
2016-12-27 15:22:04 +05:30
..
nvgpu
gpu: nvgpu: gp10b specific LTC ISR
2016-12-27 15:22:04 +05:30