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fe9f1e9e5c
MISRA rule 21.2 forbids the usage of identifier names which start with an underscore. Fix the violations of MISRA rule 21.2 in timers unit. Jira NVGPU-3139 Change-Id: I507d0f2a51e83ce24d642dcc81975aa513fa41eb Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2112599 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
117 lines
3.5 KiB
C
117 lines
3.5 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_TIMERS_H
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#define NVGPU_TIMERS_H
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#include <nvgpu/types.h>
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#include <nvgpu/utils.h>
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struct gk20a;
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/*
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* struct nvgpu_timeout - define a timeout.
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*
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* There are two types of timer suported:
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*
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* o NVGPU_TIMER_CPU_TIMER
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* Timer uses the CPU to measure the timeout.
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*
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* o NVGPU_TIMER_RETRY_TIMER
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* Instead of measuring a time limit keep track of the number of times
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* something has been attempted. After said limit, "expire" the timer.
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*
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* Available flags:
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*
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* o NVGPU_TIMER_NO_PRE_SI
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* By default when the system is not running on silicon the timeout
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* code will ignore the requested timeout. Specifying this flag will
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* override that behavior and honor the timeout regardless of platform.
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*
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* o NVGPU_TIMER_SILENT_TIMEOUT
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* Do not print any messages on timeout. Normally a simple message is
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* printed that specifies where the timeout occurred.
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*/
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struct nvgpu_timeout {
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struct gk20a *g;
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unsigned int flags;
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union {
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s64 time;
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struct {
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u32 max;
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u32 attempted;
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} retries;
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};
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};
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/*
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* Bit 0 specifies the type of timer: CPU or retry.
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*/
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#define NVGPU_TIMER_CPU_TIMER (0x0U)
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#define NVGPU_TIMER_RETRY_TIMER (0x1U)
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/*
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* Bits 1 through 7 are reserved; bits 8 and up are flags:
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*/
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#define NVGPU_TIMER_NO_PRE_SI BIT32(8)
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#define NVGPU_TIMER_SILENT_TIMEOUT BIT32(9)
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#define NVGPU_TIMER_FLAG_MASK (NVGPU_TIMER_RETRY_TIMER | \
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NVGPU_TIMER_NO_PRE_SI | \
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NVGPU_TIMER_SILENT_TIMEOUT)
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int nvgpu_timeout_init(struct gk20a *g, struct nvgpu_timeout *timeout,
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u32 duration, unsigned long flags);
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int nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout);
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#define nvgpu_timeout_expired(__timeout) \
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nvgpu_timeout_expired_msg_impl(__timeout, _NVGPU_GET_IP_, "")
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#define nvgpu_timeout_expired_msg(__timeout, fmt, args...) \
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nvgpu_timeout_expired_msg_impl(__timeout, _NVGPU_GET_IP_, \
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fmt, ##args)
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/*
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* Don't use this directly.
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*/
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int nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
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void *caller, const char *fmt, ...);
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/*
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* Waits and delays.
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*/
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void nvgpu_msleep(unsigned int msecs);
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void nvgpu_usleep_range(unsigned int min_us, unsigned int max_us);
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void nvgpu_udelay(unsigned int usecs);
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/*
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* Timekeeping.
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*/
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s64 nvgpu_current_time_ms(void);
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s64 nvgpu_current_time_ns(void);
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u64 nvgpu_hr_timestamp(void);
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#endif /* NVGPU_TIMERS_H */
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