diff --git a/commitFile.txt b/commitFile.txt
index c1ed5d0..407f643 100644
--- a/commitFile.txt
+++ b/commitFile.txt
@@ -21,7 +21,7 @@ d580300f41118dacc5569fffa9f47e78c5883141 - kernel-open/common/inc/nv-modeset-int
 5bc7a748c7d3dfa6559ca4f9fe6199e17098ec8f - kernel-open/common/inc/nv-lock.h
 b249abc0a7d0c9889008e98cb2f8515a9d310b85 - kernel-open/common/inc/nvgputypes.h
 e4a4f57abb8769d204468b2f5000c81f5ea7c92f - kernel-open/common/inc/nv-procfs.h
-04565a9da52f9e5275a89ecbe6e103b25008414a - kernel-open/common/inc/nv.h
+e2fd5045d14ae8e066a1fd6fe46fde861a2814b8 - kernel-open/common/inc/nv.h
 ede1f77acb43e28391bceac058e00a7a8d799b0d - kernel-open/common/inc/nvmisc.h
 ae374d3e438f8d3b60df8c4602618c58564b73f9 - kernel-open/common/inc/rm-gpu-ops.h
 3f7b20e27e6576ee1f2f0557d269697a0b8af7ec - kernel-open/common/inc/nv-firmware-registry.h
@@ -76,7 +76,7 @@ cda75171ca7d8bf920aab6d56ef9aadec16fd15d - kernel-open/common/inc/os/nv_memory_t
 70b67003fda6bdb8a01fa1e41c3b0e25136a856c - kernel-open/common/inc/os/nv_memory_area.h
 11b09260232a88aa1f73f109fdfab491a7b73576 - kernel-open/nvidia/nv-nano-timer.c
 dcf4427b83cce7737f2b784d410291bf7a9612dc - kernel-open/nvidia/nv-reg.h
-0b8ff957fb14f20ba86f61e556d1ab15bf5acd74 - kernel-open/nvidia/nv-imp.c
+271c7df4c4e1933b597e5b862c7790458278d3e0 - kernel-open/nvidia/nv-imp.c
 6b09b5ef8a37f78c8e82074b06b40ef593c81807 - kernel-open/nvidia/libspdm_rsa.c
 b8d361216db85fe897cbced2a9600507b7708c61 - kernel-open/nvidia/libspdm_hkdf_sha.c
 66e2bfc490fb77e0b72a8192b719d3dc74d25d59 - kernel-open/nvidia/nv-pat.c
@@ -123,7 +123,7 @@ c50865d3070a0c3476ce24ff1ab4cc4e3f9ea4be - kernel-open/nvidia/detect-self-hosted
 3b27e4eaa97bd6fa71f1a075b50af69b1ec16454 - kernel-open/nvidia/libspdm_ec.c
 dd9e367cba9e0672c998ec6d570be38084a365ab - kernel-open/nvidia/libspdm_rand.c
 d8b8077adb7fd70eb9528d421bdef98c4378b57a - kernel-open/nvidia/nv-msi.c
-c528e4f865384d2a2eb1cc4b90344273caf89f15 - kernel-open/nvidia/nv-platform.c
+66100147e74ecdce28c7261f9d5226c9f049fa63 - kernel-open/nvidia/nv-platform.c
 dd819a875c584bc469082fcf519779ea00b1d952 - kernel-open/nvidia/libspdm_aead_aes_gcm.c
 74958745f83b14c04aaa60248bf5c86ceef6b5cb - kernel-open/nvidia/nv-acpi.c
 4d19a1756af848d25fd2fd8cc691dcbcf0afb776 - kernel-open/nvidia/os-registry.c
@@ -459,7 +459,7 @@ bb7955387f6a286927e7922019676ca0aba713e6 - src/common/sdk/nvidia/inc/ctrl/ctrl00
 35367f08b96510a5312653b5197d6bb34c0a3d00 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073event.h
 a0cf9dfb520e3320cd9c154c01cd2f1a7bbbd864 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h
 c2066c407f81538047c435fffca2705c28107663 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h
-d727b328e995a7d969ec036f2d5b52264568a7bf - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h
+ee2aba431a65f58defe5ecf3300457f86fde9203 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h
 52f251090780737f14eb993150f3ae73be303921 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dpu.h
 77eb4fab61225663a3f49b868c983d5d532ca184 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073svp.h
 6ca26c7149455e43f32e8b83b74f4a34a24a2d29 - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073base.h
@@ -849,7 +849,7 @@ c5f16fdf43ca3d2845d120c219d1da11257072b0 - src/nvidia/nv-kernel.ld
 dcf4427b83cce7737f2b784d410291bf7a9612dc - src/nvidia/arch/nvalloc/unix/include/nv-reg.h
 4750735d6f3b334499c81d499a06a654a052713d - src/nvidia/arch/nvalloc/unix/include/nv-caps.h
 3c61881e9730a8a1686e422358cdfff59616b670 - src/nvidia/arch/nvalloc/unix/include/nv_escape.h
-8e5c39b8efa859fb811094af26ba26c6858c50ee - src/nvidia/arch/nvalloc/unix/include/nv.h
+31c2303a561787fe362fff3003ffca9a1e335185 - src/nvidia/arch/nvalloc/unix/include/nv.h
 81592e5c17bebad04cd11d73672c859baa070329 - src/nvidia/arch/nvalloc/unix/include/nv-chardev-numbers.h
 e69045379ed58dc0110d16d17eb39a6f600f0d1d - src/nvidia/arch/nvalloc/unix/include/nv-ioctl-lockless-diag.h
 d1b1a1bc1fa30c1a966e95447f7831a06340d2d0 - src/nvidia/arch/nvalloc/unix/include/nv-priv.h
@@ -864,7 +864,7 @@ b3ecb82f142a50bdc37eafaeb86d67f10fbcf73f - src/nvidia/arch/nvalloc/unix/include/
 af45762b6eeae912cc2602acf7dc31d30775ade7 - src/nvidia/arch/nvalloc/unix/include/nv-kernel-rmapi-ops.h
 107d1ecb8a128044260915ea259b1e64de3defea - src/nvidia/arch/nvalloc/unix/include/nv-ioctl-numbers.h
 3a26838c4edd3525daa68ac6fc7b06842dc6fc07 - src/nvidia/arch/nvalloc/unix/include/nv-gpu-info.h
-1af9eaf7470cfe611c6c2757ab592a42d0df58ad - src/nvidia/arch/nvalloc/unix/src/os.c
+70ca9726e45c08ec2436b6f9f6e52d4c59cdf470 - src/nvidia/arch/nvalloc/unix/src/os.c
 a659a503a6fcffdcacd2b76ae6b1f156b4b9216c - src/nvidia/arch/nvalloc/unix/src/osmemdesc.c
 b5ae9b8d551a3e5489605c13686fb6cce4579598 - src/nvidia/arch/nvalloc/unix/src/power-management-tegra.c
 a17aae37486b325442e447489b64add3694ab8b0 - src/nvidia/arch/nvalloc/unix/src/osunix.c
@@ -899,7 +899,7 @@ b55573cb02ff8129aa4f5aa050ac53d1f4fcfdb2 - src/nvidia/generated/g_rs_resource_nv
 a232e1da560db2322a921a9f0dc260ad703af2b4 - src/nvidia/generated/g_mem_nvoc.h
 c503ca5954b8f6ebdba96904a1616a55ce08a2d3 - src/nvidia/generated/g_device_nvoc.c
 e7cc58e9f8173583bd253fa73df56324e48aa5ad - src/nvidia/generated/g_io_vaspace_nvoc.h
-b93ab0b9e39ca3c5b397cbdba58e4d9894d4130f - src/nvidia/generated/g_rpc-structures.h
+1f8b0acd13f5b75addebbc3303de6e56f2a87960 - src/nvidia/generated/g_rpc-structures.h
 afda2b8579ed309e23be0ad1a835ee84fcbe535f - src/nvidia/generated/g_client_nvoc.h
 e97edab623386f7d1534b4f053a66fc8659167f6 - src/nvidia/generated/g_event_nvoc.h
 f4b2bffbdbb2b0b398e8dfe3420e46b2bf27839c - src/nvidia/generated/g_hal_nvoc.h
@@ -989,11 +989,11 @@ aa76beb8b33254fae884434b688093f9c7f12c87 - src/nvidia/generated/g_hal_private.h
 41bc858f6aca964a8977ad96911ecf1e8b46385d - src/nvidia/generated/g_hal_archimpl.h
 f87916eae53dbea2f6bdbe80a0e53ecc2071d9fd - src/nvidia/generated/g_lock_test_nvoc.c
 6b8597803d509372152e3915f15139186294add5 - src/nvidia/generated/g_gpu_class_list.c
-2101385d1332db9a2902370a6b3c6117ca8b2737 - src/nvidia/generated/g_kern_disp_nvoc.h
-d71ff42bc0fc0faf1999a6cbe88c4492a47e200e - src/nvidia/generated/g_os_nvoc.h
+4aa67ec31a594b3280816de4aab2caa790983ce8 - src/nvidia/generated/g_kern_disp_nvoc.h
+d86e06d3022d34524459db10876053d664d80a73 - src/nvidia/generated/g_os_nvoc.h
 e58abb783f7561d0af925c2fca392c5165fcb199 - src/nvidia/generated/g_kern_disp_nvoc.c
 d6a34926ab710156c9c4b2d9f12a44e6dafd43d1 - src/nvidia/generated/g_tmr_nvoc.h
-6f26833fa99a15127f832c8cb47186dd79efc099 - src/nvidia/generated/g_disp_objs_nvoc.h
+9b14b18f67e7e8e9d605b8b07bcfa53a42928dc6 - src/nvidia/generated/g_disp_objs_nvoc.h
 8e49b4d77641c98c6101dbc88a79290ceca6271a - src/nvidia/generated/g_rs_server_nvoc.h
 af206c390549eff5d690ad07f3e58cd417f07f5f - src/nvidia/generated/g_hal_register.h
 be659882e731b6a2019639265af46239c5c96ebf - src/nvidia/generated/g_hal_nvoc.c
@@ -1005,7 +1005,7 @@ db76e8669776fbfa901c60d9b9908af2fabc4703 - src/nvidia/generated/g_virt_mem_mgr_n
 fb464cf839a1e76ac2a27346c7cd46ca921f1f56 - src/nvidia/generated/g_traceable_nvoc.c
 8588d6f88ab5e8682952063fe0e2c840b334c622 - src/nvidia/generated/g_eng_desc_nvoc.h
 de99523103dd7df0934cbe7aa21179ec7f241817 - src/nvidia/generated/g_os_desc_mem_nvoc.c
-aa43dd8bdbdc71dc64d65e948221c7d5235588e7 - src/nvidia/generated/g_disp_objs_nvoc.c
+03d2ae9f7011fcb3fe763e2789f7840c02c3ca66 - src/nvidia/generated/g_disp_objs_nvoc.c
 9b6cc3a5e9e35139e9245cbe753fe9a552a488c0 - src/nvidia/generated/g_syncpoint_mem_nvoc.h
 ae311b0968df9e9c9c2cec89e3060c472fc70a4c - src/nvidia/generated/g_mem_nvoc.c
 dc7a782be9a0096701771cb9b2dc020c2f814e6d - src/nvidia/generated/g_system_nvoc.h
@@ -1250,7 +1250,7 @@ c1e5733847085bede6eb128eff3bad14549a31db - src/nvidia/src/kernel/diagnostics/nvl
 d10c5031c3bc00ae1243729c39496df38d2c9ae3 - src/nvidia/src/kernel/os/os_init.c
 2255d1ae2d942c3fed9a4b0a41020d0e49cb8648 - src/nvidia/src/kernel/os/os_timer.c
 b887b661ffbe6c223c60f544b1fab32690cd8c75 - src/nvidia/src/kernel/os/os_sanity.c
-f228bc86fd9149675cb554d6f596d81fdd4c3770 - src/nvidia/src/kernel/os/os_stubs.c
+318538da49f206fdfe22af5ec2635d4d177216f4 - src/nvidia/src/kernel/os/os_stubs.c
 8800bf3ec679a1c3d36b89992b3f2f95365ec834 - src/nvidia/src/kernel/rmapi/entry_points.c
 348c34e13f006f1320536876cb7393d8232e61de - src/nvidia/src/kernel/rmapi/rpc_common.c
 8f033323f3ae264a79f779abb163442deb17e88a - src/nvidia/src/kernel/rmapi/rmapi.c
@@ -1324,14 +1324,14 @@ c67baeb5df33080d99f322786759fc3f5436301d - src/nvidia/src/kernel/gpu/disp/disp_c
 8fafebf746bfcde2c53435be386a8a0846973b0c - src/nvidia/src/kernel/gpu/disp/disp_object_kern_ctrl_minimal.c
 6437dd659a38c62cd81fb59f229bd94e59f37e71 - src/nvidia/src/kernel/gpu/disp/disp_sf_user.c
 0fbfb9dd91147f04bea1060788efc1121078c159 - src/nvidia/src/kernel/gpu/disp/kern_disp.c
-5aa67b54fcd16f648d7a72b9c2c4ff3fb6d3a5be - src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
+8900f684ba65090d30b80c48ed94a680e8e08eff - src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
 56027ec220553e1febe42f37fd70757cbb034dcb - src/nvidia/src/kernel/gpu/disp/disp_objs.c
 b95080033ecc8736a0cdf9476cec7563c4a2af0f - src/nvidia/src/kernel/gpu/disp/vblank_callback/vblank.c
 caba45a10f43e7817f491e7856ef30dd49782f6e - src/nvidia/src/kernel/gpu/disp/head/kernel_head.c
 f59763139d9993ae545ded8057706cc4d65afc0c - src/nvidia/src/kernel/gpu/disp/head/arch/v04/kernel_head_0401.c
 eb00ffa5a892558d39db15f473e2c308acfd86d9 - src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0404.c
 2b19caf7def14190c99dc4e41983b4a3e3334f22 - src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0401.c
-6d99d644a8294d08b0fdebf183306bbdadf819e3 - src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
+70637a3e70e70693082d085476ca5c92f6d944eb - src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
 57fec208154cd0d25838a688f6457598baf2de7a - src/nvidia/src/kernel/gpu/disp/arch/v02/kern_disp_0204.c
 64aa574198449e9556328d1c08f08b3bde5bfad0 - src/nvidia/src/kernel/gpu/disp/arch/v05/kern_disp_0501.c
 d911e6ae9f7b96e6f441208d38701a8d833e7455 - src/nvidia/src/kernel/gpu/disp/arch/v03/kern_disp_0300.c
@@ -1343,16 +1343,16 @@ f6e518524581b772f8fdbc80418a2018570940ca - src/nvidia/src/kernel/gpu/timer/timer
 10a8bfd47ce609763c07a0d61be2f71f9f91889e - src/nvidia/src/kernel/gpu/mem_mgr/mem_ctrl.c
 bfc82499a8b9b8ce10411f6c391b0e575dc7c0d6 - src/nvidia/src/kernel/gpu/mem_mgr/context_dma.c
 a62f423d6cf69e96b0523a233ec00353d63ee8bd - src/nvidia/src/kernel/gpu/mem_mgr/mem_utils.c
-92611eb4f3bed31064a9efbb54a1ece7ffcfc2af - src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c
+b68459a8edae4d51a7068e37e49e924680e690b4 - src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c
 4a95b73f744807d96510b0ad7181eae5b12839ce - src/nvidia/src/kernel/gpu/mem_mgr/arch/turing/mem_mgr_tu102_base.c
-ce09583697a98a2d0e8466dd45764f15945f55c2 - src/nvidia/src/kernel/gpu/dce_client/dce_client_rpc.c
+c3ce2ab15dcf7b0ae2dd89a62d73d16c0aba9687 - src/nvidia/src/kernel/gpu/dce_client/dce_client_rpc.c
 cebb9eee63e23bb934881b3313e422b50fb38abb - src/nvidia/src/kernel/gpu/dce_client/dce_client.c
 d5d8ff429d3bda7103bafcb2dca94678efc8ddd8 - src/nvidia/src/kernel/gpu_mgr/gpu_group.c
 2b49d8a3413a1731bc4fb0bab3f32ff272a71a8c - src/nvidia/src/kernel/gpu_mgr/gpu_db.c
 37d1e3dd86e6409b8e461f90386e013194c9e4d1 - src/nvidia/src/kernel/gpu_mgr/gpu_mgmt_api.c
 fe618e428d9a172a0fd9412f5a20df64d7270418 - src/nvidia/src/kernel/gpu_mgr/gpu_mgr.c
 593bbc5b93b620019144fadf1281a180ec050012 - src/nvidia/src/kernel/mem_mgr/syncpoint_mem.c
-54c1d1a44474a7027c5290551e60f13678226301 - src/nvidia/src/kernel/mem_mgr/standard_mem.c
+3ab3bfc528f187ba551c45889a471c39c5e1649c - src/nvidia/src/kernel/mem_mgr/standard_mem.c
 44069d6ebbd94a11267e6cc0179ab167f91faec4 - src/nvidia/src/kernel/mem_mgr/virt_mem_mgr.c
 5a5e689cf264134ae8c4300d986c209c04167743 - src/nvidia/src/kernel/mem_mgr/vaspace.c
 5b9048e62581a3fbb0227d1a46c4ee8d8397bf5b - src/nvidia/src/kernel/mem_mgr/mem_mgr_internal.h
@@ -1433,7 +1433,7 @@ ce42ceac4c4cf9d249d66ab57ae2f435cd9623fc - src/nvidia-modeset/kapi/src/nvkms-kap
 29309411e2bf1c2e6492a104dcb9f53705c2e9aa - src/nvidia-modeset/kapi/interface/nvkms-kapi.h
 11af2aeea97398b58f628fe4685b5dfcfda5791b - src/nvidia-modeset/src/nvkms-modeset.c
 016fd1b111731c6d323425d52bfe1a04d8bcade7 - src/nvidia-modeset/src/nvkms-headsurface-swapgroup.c
-37a6d00e8721a9c4134810f8be3e7168f8cbb226 - src/nvidia-modeset/src/nvkms-evo.c
+a1dc7758c9eb3b3b05692f3a0484e27f57f9c5a1 - src/nvidia-modeset/src/nvkms-evo.c
 4758c601621603597bd2387c4f08b3fdc17e375d - src/nvidia-modeset/src/nvkms-hw-flip.c
 5e3188c2d9b580ff69e45842f841f5c92c0c6edb - src/nvidia-modeset/src/nvkms-headsurface-ioctl.c
 e1a3c31638416a0132c5301fe5dd4b1c93f14376 - src/nvidia-modeset/src/nvkms-cursor3.c
diff --git a/kernel-open/common/inc/nv.h b/kernel-open/common/inc/nv.h
index f38cc48..c559db0 100644
--- a/kernel-open/common/inc/nv.h
+++ b/kernel-open/common/inc/nv.h
@@ -596,6 +596,12 @@ typedef struct nv_state_t
         NvU32 dispNisoStreamId;
     } iommus;
 
+    struct {
+        NvU32 max_dispclk_rate_using_disppllkhz;
+        NvU32 max_dispclk_rate_using_sppll0clkoutakhz;
+        NvU32 max_hubclk_rate_using_sppll0clkoutbkhz;
+    } clocks;
+
     /* Console is managed by drm drivers or NVKMS */
     NvBool client_managed_console;
 } nv_state_t;
@@ -1038,6 +1044,7 @@ NV_STATUS NV_API_CALL nv_i2c_transfer(nv_state_t *, NvU32, NvU8, nv_i2c_msg_t *,
 void      NV_API_CALL nv_i2c_unregister_clients(nv_state_t *);
 NV_STATUS NV_API_CALL nv_i2c_bus_status(nv_state_t *, NvU32, NvS32 *, NvS32 *);
 NV_STATUS NV_API_CALL nv_imp_get_import_data     (TEGRA_IMP_IMPORT_DATA *);
+NV_STATUS NV_API_CALL nv_imp_get_uefi_data       (nv_state_t *nv, NvU32 *iso_bw_kbps, NvU32 *floor_bw_kbps);
 NV_STATUS NV_API_CALL nv_imp_enable_disable_rfl  (nv_state_t *nv, NvBool bEnable);
 NV_STATUS NV_API_CALL nv_imp_icc_set_bw          (nv_state_t *nv, NvU32 avg_bw_kbps, NvU32 floor_bw_kbps);
 NV_STATUS NV_API_CALL nv_get_num_dpaux_instances(nv_state_t *nv, NvU32 *num_instances);
diff --git a/kernel-open/nvidia/nv-imp.c b/kernel-open/nvidia/nv-imp.c
index 9b5212f..98a6d33 100644
--- a/kernel-open/nvidia/nv-imp.c
+++ b/kernel-open/nvidia/nv-imp.c
@@ -60,6 +60,62 @@
 #define ICC_SUPPORT_FUNCTIONS_PRESENT \
     defined(NV_DT_BINDINGS_INTERCONNECT_TEGRA_ICC_ID_H_PRESENT)
 
+/*!
+ * @brief Returns IMP-relevant data passed by UEFI GOP Driver
+ *
+ * @param[in]   nv            Per GPU Linux state
+ * @param[out]  iso_bw_kbps   ISO BW set by UEFI
+ * @param[out]  floor_bw_kbps DRAM Floor BW set by UEFI
+ *
+ * @returns NV_OK if successful,
+ *          NV_ERR_GENERIC if there is an error in parsing DT,
+ *          NV_ERR_NOT_SUPPORTED if the functionality is not available.
+ */
+NV_STATUS NV_API_CALL
+nv_imp_get_uefi_data
+(
+    nv_state_t *nv,
+    NvU32 *iso_bw_kbps,
+    NvU32 *floor_bw_kbps
+)
+{
+    nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv);
+    NV_STATUS status = NV_OK;
+    NvU32 value = 0;
+    int ret = 0;
+
+    *iso_bw_kbps = 0;
+    *floor_bw_kbps = 0;
+#if NV_SUPPORTS_PLATFORM_DISPLAY_DEVICE
+    ret = of_property_read_u32(nvl->dev->of_node, "nvidia,iso-bandwidth-kbps", &value);
+    if (ret != 0)
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: Unable to read nvidia,iso-bandwidth-kbps\n");
+        status = NV_ERR_GENERIC;
+        goto done;
+    }
+    else
+    {
+        *iso_bw_kbps = value;
+    }
+
+    ret = of_property_read_u32(nvl->dev->of_node, "nvidia,dram-floor-kbps", &value);
+    if (ret != 0)
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: Unable to read nvidia,dram-floor-kbps\n");
+        status = NV_ERR_GENERIC;
+        goto done;
+    }
+    else
+    {
+        *floor_bw_kbps = value;
+    }
+#endif
+
+done:
+    return status;
+}
+
 /*!
  * @brief Returns IMP-relevant data collected from other modules
  *
diff --git a/kernel-open/nvidia/nv-platform.c b/kernel-open/nvidia/nv-platform.c
index 7117431..b006434 100644
--- a/kernel-open/nvidia/nv-platform.c
+++ b/kernel-open/nvidia/nv-platform.c
@@ -712,6 +712,60 @@ fail:
     return status;
 }
 
+#define DISP_CLK_NUM_PARENTS 2
+// This function gets called only for Tegra
+static NV_STATUS nv_platform_get_disp_clocks_max_rate(struct platform_device *plat_dev,
+                                              nv_state_t *nv)
+{
+    struct device_node *np = plat_dev->dev.of_node;
+    u32 value = 0;
+    u32 disp_clk_rates[DISP_CLK_NUM_PARENTS];
+    NV_STATUS status = NV_OK;
+    int ret = 0;
+
+    nv->clocks.max_dispclk_rate_using_disppllkhz = 0;
+    nv->clocks.max_dispclk_rate_using_sppll0clkoutakhz = 0;
+    nv->clocks.max_hubclk_rate_using_sppll0clkoutbkhz = 0;
+
+    /* Parse disp clock max rates for each possible parent passed by UEFI */
+    ret = of_property_read_u32_array(np, "nvidia,max-disp-clk-rate-khz", disp_clk_rates, DISP_CLK_NUM_PARENTS);
+    if (ret == 0)
+    {
+        nv->clocks.max_dispclk_rate_using_disppllkhz = disp_clk_rates[0];
+        nv->clocks.max_dispclk_rate_using_sppll0clkoutakhz = disp_clk_rates[1];
+    }
+    else if (ret == -EINVAL)
+    {
+        nv_printf(NV_DBG_INFO, "NVRM: nv_platform_get_disp_clocks_max_rate, nvidia,max-disp-clk-rate-khz not specified under display node\n");
+    }
+    else
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: nv_platform_get_disp_clocks_max_rate, nvidia,max-disp-clk-rate-khz has invalid value\n");
+        status = NV_ERR_GENERIC;
+        goto fail;
+    }
+
+    /* Parse hub clock max rate for its parent passed by UEFI */
+    ret = of_property_read_u32(np, "nvidia,max-hub-clk-rate-khz", &value);
+    if (ret == 0)
+    {
+        nv->clocks.max_hubclk_rate_using_sppll0clkoutbkhz = value;
+    }
+    else if (ret == -EINVAL)
+    {
+        nv_printf(NV_DBG_INFO, "NVRM: nv_platform_get_disp_clocks_max_rate, nvidia,max-hub-clk-rate-khz not specified under display node\n");
+    }
+    else
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: nv_platform_get_disp_clocks_max_rate, nvidia,max-hub-clk-rate-khz has invalid value\n");
+        status = NV_ERR_GENERIC;
+        goto fail;
+    }
+
+fail:
+    return status;
+}
+
 static int nv_platform_register_mapping_devs(struct platform_device *plat_dev,
                                              nv_state_t *nv)
 {
@@ -910,6 +964,14 @@ static int nv_platform_device_display_probe(struct platform_device *plat_dev)
         goto err_release_mem_region_regs;
     }
 
+    // Parse Display Clocks max rates passed by UEFI through DT
+    status = nv_platform_get_disp_clocks_max_rate(plat_dev, nv);
+    if (status != NV_OK)
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: nv_platform_device_display_probe: parsing display clocks max rates failed\n");
+        goto err_release_mem_region_regs;
+    }
+
     rc = nv_platform_register_mapping_devs(plat_dev, nv);
     if (rc != 0)
     {
diff --git a/push_info.txt b/push_info.txt
index dce92f8..1a348ce 100644
--- a/push_info.txt
+++ b/push_info.txt
@@ -1 +1 @@
-rel-38_eng_2025-11-12
+rel-38_eng_2025-11-25
diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h
index c17efea..639eaa4 100644
--- a/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h
+++ b/src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h
@@ -2567,5 +2567,36 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_GET_CRASH_LOCK_COUNTER_INFO_PARAMS {
     NvU32 counterValueV;
 } NV0073_CTRL_CMD_SYSTEM_GET_CRASH_LOCK_COUNTER_INFO_PARAMS;
 
+/*
+ * NV0073_CTRL_CMD_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH
+ *
+ * Queries the UEFI allocated ISO BW and Floor BW for Display.
+ *
+ *   subDeviceInstance
+ *     This parameter specifies the subdevice instance within the
+ *     NV04_DISPLAY_COMMON parent device to which the operation should be
+ *     directed.
+ *   isoBandwidthKBPS
+ *     ISO BW set by UEFI to initialize display
+ *   floorBandwidthKBPS
+ *     Floor BW set by UEFI to initialize display
+ *
+ * Possible status values returned are:
+ *   NV_OK
+ *   NV_ERR_INVALID_ARGUMENT
+ *   NV_ERR_NOT_SUPPORTED
+ *   NV_ERR_GENERIC
+ */
+
+#define NV0073_CTRL_CMD_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH (0x730161U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */
+
+#define NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x61U)
+
+typedef struct NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS {
+    NvU32 subDeviceInstance;
+    NvU32 isoBandwidthKBPS;
+    NvU32 floorBandwidthKBPS;
+} NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS;
+
 /* _ctrl0073system_h_ */
 
diff --git a/src/nvidia-modeset/src/nvkms-evo.c b/src/nvidia-modeset/src/nvkms-evo.c
index f1817a9..12e4705 100644
--- a/src/nvidia-modeset/src/nvkms-evo.c
+++ b/src/nvidia-modeset/src/nvkms-evo.c
@@ -7826,7 +7826,6 @@ NvBool nvAllocateDisplayBandwidth(
     if (!pDevEvo->isSOCDisplay) {
         return TRUE;
     }
-
     params.subDeviceInstance = 0;
     params.averageBandwidthKBPS = newIsoBandwidthKBPS;
     params.floorBandwidthKBPS = newDramFloorKBPS;
@@ -7928,6 +7927,62 @@ static void AssignNVEvoIsModePossibleDispInput(
     }
 }
 
+/*!
+ * Query UEFI passed ISO BW and DRAM Floor
+ */
+static NvBool QueryUefiIMPParams(NVDispEvoPtr pDispEvo,
+                                 const NvU32 modesetRequestedHeadsMask)
+{
+    NVDevEvoPtr pDevEvo = pDispEvo->pDevEvo;
+    NVDispHeadStateEvoPtr pHeadState;
+    NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS params = {};
+    NvU32 ret;
+    NvBool uefiHandoff = FALSE;
+
+    if (!pDevEvo->isSOCDisplay) {
+        return TRUE;
+    }
+
+    if (!pDevEvo->coreInitMethodsPending || (modesetRequestedHeadsMask == 0x0)) {
+        return TRUE;
+    }
+
+    for (NvU32 head = 0; head < pDevEvo->numHeads; head++) {
+        if (!nvDpyIdListIsEmpty(pDispEvo->vbiosDpyConfig[head])) {
+            pHeadState = &pDispEvo->headState[head];
+
+            if ((pHeadState->activeRmId != 0x0) &&
+                (pDispEvo->isoBandwidthKBPS == 0) && (pDispEvo->dramFloorKBPS == 0)) {
+                nvEvoLogDev(pDevEvo, EVO_LOG_INFO,
+                            "Found active displayID: 0x%x initialized by UEFI on head %u", pHeadState->activeRmId, head);
+                uefiHandoff = TRUE;
+                break;
+            }
+        }
+    }
+
+    if (uefiHandoff)
+    {
+        params.subDeviceInstance = 0;
+        params.isoBandwidthKBPS = 0;
+        params.floorBandwidthKBPS = 0;
+        ret = nvRmApiControl(nvEvoGlobal.clientHandle,
+                             pDevEvo->displayCommonHandle,
+                             NV0073_CTRL_CMD_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH,
+                             &params, sizeof(params));
+        if (ret != NV_OK) {
+            nvEvoLogDev(pDevEvo, EVO_LOG_ERROR,
+                        "Failed to query IMP params for UEFI initialized firmware head");
+            return FALSE;
+        }
+
+        pDispEvo->isoBandwidthKBPS = NV_MAX(pDispEvo->isoBandwidthKBPS, params.isoBandwidthKBPS);
+        pDispEvo->dramFloorKBPS    = NV_MAX(pDispEvo->dramFloorKBPS, params.floorBandwidthKBPS);
+    }
+
+    return TRUE;
+}
+
 /*!
  * Validate the described disp configuration through IMP.
 
@@ -8002,20 +8057,22 @@ NvBool nvValidateImpOneDisp(
 
     switch (reallocBandwidth) {
         case NV_EVO_REALLOCATE_BANDWIDTH_MODE_PRE:
+            if (!QueryUefiIMPParams(pDispEvo, modesetRequestedHeadsMask)) {
+                return FALSE;
+            }
+
             needToRealloc = (impOutput.minRequiredBandwidthKBPS > pDispEvo->isoBandwidthKBPS) ||
                             (impOutput.floorBandwidthKBPS > pDispEvo->dramFloorKBPS);
             newIsoBandwidthKBPS =
                 NV_MAX(pDispEvo->isoBandwidthKBPS, impOutput.minRequiredBandwidthKBPS);
             newDramFloorKBPS =
                 NV_MAX(pDispEvo->dramFloorKBPS, impOutput.floorBandwidthKBPS);
-
             break;
         case NV_EVO_REALLOCATE_BANDWIDTH_MODE_POST:
             needToRealloc = (impOutput.minRequiredBandwidthKBPS != pDispEvo->isoBandwidthKBPS) ||
                             (impOutput.floorBandwidthKBPS != pDispEvo->dramFloorKBPS);
             newIsoBandwidthKBPS = impOutput.minRequiredBandwidthKBPS;
             newDramFloorKBPS = impOutput.floorBandwidthKBPS;
-
             break;
         case NV_EVO_REALLOCATE_BANDWIDTH_MODE_NONE:
         default:
diff --git a/src/nvidia/arch/nvalloc/unix/include/nv.h b/src/nvidia/arch/nvalloc/unix/include/nv.h
index 1b5b6f4..1877bc0 100644
--- a/src/nvidia/arch/nvalloc/unix/include/nv.h
+++ b/src/nvidia/arch/nvalloc/unix/include/nv.h
@@ -596,6 +596,12 @@ typedef struct nv_state_t
         NvU32 dispNisoStreamId;
     } iommus;
 
+    struct {
+        NvU32 max_dispclk_rate_using_disppllkhz;
+        NvU32 max_dispclk_rate_using_sppll0clkoutakhz;
+        NvU32 max_hubclk_rate_using_sppll0clkoutbkhz;
+    } clocks;
+
     /* Console is managed by drm drivers or NVKMS */
     NvBool client_managed_console;
 } nv_state_t;
@@ -1038,6 +1044,7 @@ NV_STATUS NV_API_CALL nv_i2c_transfer(nv_state_t *, NvU32, NvU8, nv_i2c_msg_t *,
 void      NV_API_CALL nv_i2c_unregister_clients(nv_state_t *);
 NV_STATUS NV_API_CALL nv_i2c_bus_status(nv_state_t *, NvU32, NvS32 *, NvS32 *);
 NV_STATUS NV_API_CALL nv_imp_get_import_data     (TEGRA_IMP_IMPORT_DATA *);
+NV_STATUS NV_API_CALL nv_imp_get_uefi_data       (nv_state_t *nv, NvU32 *iso_bw_kbps, NvU32 *floor_bw_kbps);
 NV_STATUS NV_API_CALL nv_imp_enable_disable_rfl  (nv_state_t *nv, NvBool bEnable);
 NV_STATUS NV_API_CALL nv_imp_icc_set_bw          (nv_state_t *nv, NvU32 avg_bw_kbps, NvU32 floor_bw_kbps);
 NV_STATUS NV_API_CALL nv_get_num_dpaux_instances(nv_state_t *nv, NvU32 *num_instances);
diff --git a/src/nvidia/arch/nvalloc/unix/src/os.c b/src/nvidia/arch/nvalloc/unix/src/os.c
index d830982..b05077d 100644
--- a/src/nvidia/arch/nvalloc/unix/src/os.c
+++ b/src/nvidia/arch/nvalloc/unix/src/os.c
@@ -4861,6 +4861,37 @@ osTegraSocGetImpImportData
     }
 }
 
+/*!
+ * @brief Returns IMP-relevant data collected from UEFI
+ *
+ * This function is basically a wrapper to call the unix/linux layer.
+ *
+ * @param[in]   pOsGpuInfo    Per GPU Linux state
+ * @param[out]  pIsoBwKbps    ISO BW set by UEFI
+ * @param[out]  pFloorBwKbps  DRAM Floor BW set by UEFI
+ *
+ * @returns NV_OK if successful,
+ *          NV_ERR_NOT_SUPPORTED if the functionality is not available, or
+ *          other errors as may be returned by subfunctions.
+ */
+NV_STATUS
+osTegraSocGetImpUefiData
+(
+    OS_GPU_INFO *pOsGpuInfo,
+    NvU32 *pIsoBwKbps,
+    NvU32 *pFloorBwKbps
+)
+{
+    if (NV_IS_SOC_DISPLAY_DEVICE(pOsGpuInfo))
+    {
+        return nv_imp_get_uefi_data(pOsGpuInfo, pIsoBwKbps, pFloorBwKbps);
+    }
+    else
+    {
+        return NV_ERR_NOT_SUPPORTED;
+    }
+}
+
 /*!
  * @brief Tells BPMP whether or not RFL is valid
  *
@@ -4897,6 +4928,42 @@ osTegraSocEnableDisableRfl
     }
 }
 
+/*!
+ * @brief Returns max rates for display clocks passed by UEFI
+ *
+ * @param[in]  pOsGpuInfo                   Per GPU Linux state
+ * @param[out] pMaxDispClkRateDisppll       disp clock maxrate with disppll as parent
+ * @param[out] pMaxDispClkRateSppllClkouta  disp clock maxrate with sppllclkouta as parent
+ * @param[out] pMaxHubClkRateSppllClkoutb   hub clock maxrate with sppllclkoutb as parent
+ *
+ * @returns NV_OK if successful,
+ *          NV_ERR_NOT_SUPPORTED if the functionality is not available
+ */
+NV_STATUS
+osTegraSocGetDispClockRates
+(
+    OS_GPU_INFO *pOsGpuInfo,
+    NvU32       *pMaxDispClkRateDisppll,
+    NvU32       *pMaxDispClkRateSppllClkouta,
+    NvU32       *pMaxHubClkRateSppllClkoutb
+)
+{
+    nv_state_t *nv = pOsGpuInfo;
+
+    if (NV_IS_SOC_DISPLAY_DEVICE(nv))
+    {
+        *pMaxDispClkRateDisppll = nv->clocks.max_dispclk_rate_using_disppllkhz;
+        *pMaxDispClkRateSppllClkouta = nv->clocks.max_dispclk_rate_using_sppll0clkoutakhz;
+        *pMaxHubClkRateSppllClkoutb = nv->clocks.max_hubclk_rate_using_sppll0clkoutbkhz;
+
+        return NV_OK;
+    }
+    else
+    {
+        return NV_ERR_NOT_SUPPORTED;
+    }
+}
+
 /*!
  * @brief Allocates a specified amount of ISO memory bandwidth for display
  *
diff --git a/src/nvidia/generated/g_disp_objs_nvoc.c b/src/nvidia/generated/g_disp_objs_nvoc.c
index b28dda7..745604d 100644
--- a/src/nvidia/generated/g_disp_objs_nvoc.c
+++ b/src/nvidia/generated/g_disp_objs_nvoc.c
@@ -3233,6 +3233,21 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
 #endif
     },
     {               /*  [22] */
+#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u)
+        /*pFunc=*/      (void (*)(void)) NULL,
+#else
+        /*pFunc=*/      (void (*)(void)) dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_IMPL,
+#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u)
+        /*flags=*/      0x4u,
+        /*accessRight=*/0x0u,
+        /*methodId=*/   0x730161u,
+        /*paramSize=*/  sizeof(NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS),
+        /*pClassInfo=*/ &(__nvoc_class_def_DispCommon.classInfo),
+#if NV_PRINTF_STRINGS_ALLOWED
+        /*func=*/       "dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth"
+#endif
+    },
+    {               /*  [23] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3247,7 +3262,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetI2cPortid"
 #endif
     },
-    {               /*  [23] */
+    {               /*  [24] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x820046u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3262,7 +3277,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetType"
 #endif
     },
-    {               /*  [24] */
+    {               /*  [25] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3277,7 +3292,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificFakeDevice"
 #endif
     },
-    {               /*  [25] */
+    {               /*  [26] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3292,7 +3307,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetEdidV2"
 #endif
     },
-    {               /*  [26] */
+    {               /*  [27] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3307,7 +3322,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetEdidV2"
 #endif
     },
-    {               /*  [27] */
+    {               /*  [28] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3322,7 +3337,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetConnectorData"
 #endif
     },
-    {               /*  [28] */
+    {               /*  [29] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3337,7 +3352,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetHdcpRepeaterInfo"
 #endif
     },
-    {               /*  [29] */
+    {               /*  [30] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3352,7 +3367,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetHdmiEnable"
 #endif
     },
-    {               /*  [30] */
+    {               /*  [31] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3367,7 +3382,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificCtrlHdmi"
 #endif
     },
-    {               /*  [31] */
+    {               /*  [32] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3382,7 +3397,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetHdmiAudioMutestream"
 #endif
     },
-    {               /*  [32] */
+    {               /*  [33] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3397,7 +3412,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetHdcpState"
 #endif
     },
-    {               /*  [33] */
+    {               /*  [34] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3412,7 +3427,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetHdcpDiagnostics"
 #endif
     },
-    {               /*  [34] */
+    {               /*  [35] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3427,7 +3442,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificHdcpCtrl"
 #endif
     },
-    {               /*  [35] */
+    {               /*  [36] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3442,7 +3457,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetAllHeadMask"
 #endif
     },
-    {               /*  [36] */
+    {               /*  [37] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3457,7 +3472,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetOdPacket"
 #endif
     },
-    {               /*  [37] */
+    {               /*  [38] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3472,7 +3487,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetOdPacketCtrl"
 #endif
     },
-    {               /*  [38] */
+    {               /*  [39] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3487,7 +3502,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetPclkLimit"
 #endif
     },
-    {               /*  [39] */
+    {               /*  [40] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3502,7 +3517,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificOrGetInfo"
 #endif
     },
-    {               /*  [40] */
+    {               /*  [41] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3517,7 +3532,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificHdcpKsvListValidate"
 #endif
     },
-    {               /*  [41] */
+    {               /*  [42] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3532,7 +3547,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificHdcpUpdate"
 #endif
     },
-    {               /*  [42] */
+    {               /*  [43] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3547,7 +3562,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetHdmiSinkCaps"
 #endif
     },
-    {               /*  [43] */
+    {               /*  [44] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3562,7 +3577,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetMonitorPower"
 #endif
     },
-    {               /*  [44] */
+    {               /*  [45] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3577,7 +3592,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetHdmiFrlLinkConfig"
 #endif
     },
-    {               /*  [45] */
+    {               /*  [46] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3592,7 +3607,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetRegionalCrcs"
 #endif
     },
-    {               /*  [46] */
+    {               /*  [47] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3607,7 +3622,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificApplyEdidOverrideV2"
 #endif
     },
-    {               /*  [47] */
+    {               /*  [48] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3622,7 +3637,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetHdmiGpuCaps"
 #endif
     },
-    {               /*  [48] */
+    {               /*  [49] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3637,7 +3652,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificDisplayChange"
 #endif
     },
-    {               /*  [49] */
+    {               /*  [50] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3652,7 +3667,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetHdmiScdcData"
 #endif
     },
-    {               /*  [50] */
+    {               /*  [51] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3667,7 +3682,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificIsDirectmodeDisplay"
 #endif
     },
-    {               /*  [51] */
+    {               /*  [52] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3682,7 +3697,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetHdmiFrlCapacityComputation"
 #endif
     },
-    {               /*  [52] */
+    {               /*  [53] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3697,7 +3712,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificSetSharedGenericPacket"
 #endif
     },
-    {               /*  [53] */
+    {               /*  [54] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3712,7 +3727,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificAcquireSharedGenericPacket"
 #endif
     },
-    {               /*  [54] */
+    {               /*  [55] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3727,7 +3742,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificReleaseSharedGenericPacket"
 #endif
     },
-    {               /*  [55] */
+    {               /*  [56] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3742,7 +3757,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificDispI2cReadWrite"
 #endif
     },
-    {               /*  [56] */
+    {               /*  [57] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3757,7 +3772,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificGetValidHeadWindowAssignment"
 #endif
     },
-    {               /*  [57] */
+    {               /*  [58] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3772,7 +3787,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSpecificDefaultAdaptivesyncDisplay"
 #endif
     },
-    {               /*  [58] */
+    {               /*  [59] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3787,7 +3802,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdInternalGetHotplugUnplugState"
 #endif
     },
-    {               /*  [59] */
+    {               /*  [60] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3802,7 +3817,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdFrlConfigMacroPad"
 #endif
     },
-    {               /*  [60] */
+    {               /*  [61] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3817,7 +3832,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpGetInfo"
 #endif
     },
-    {               /*  [61] */
+    {               /*  [62] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3832,7 +3847,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpGetDisplayportDongleInfo"
 #endif
     },
-    {               /*  [62] */
+    {               /*  [63] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3847,7 +3862,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpSetEldAudioCaps"
 #endif
     },
-    {               /*  [63] */
+    {               /*  [64] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3862,7 +3877,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpUpdateDynamicDfpCache"
 #endif
     },
-    {               /*  [64] */
+    {               /*  [65] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3877,7 +3892,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpSetAudioEnable"
 #endif
     },
-    {               /*  [65] */
+    {               /*  [66] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3892,7 +3907,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpAssignSor"
 #endif
     },
-    {               /*  [66] */
+    {               /*  [67] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3907,7 +3922,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpGetPadlinkMask"
 #endif
     },
-    {               /*  [67] */
+    {               /*  [68] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3922,7 +3937,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpConfigTwoHeadOneOr"
 #endif
     },
-    {               /*  [68] */
+    {               /*  [69] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3937,7 +3952,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpDscCrcControl"
 #endif
     },
-    {               /*  [69] */
+    {               /*  [70] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3952,7 +3967,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpInitMuxData"
 #endif
     },
-    {               /*  [70] */
+    {               /*  [71] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3967,7 +3982,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpGetDsiModeTiming"
 #endif
     },
-    {               /*  [71] */
+    {               /*  [72] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x46u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3982,7 +3997,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpGetFixedModeTiming"
 #endif
     },
-    {               /*  [72] */
+    {               /*  [73] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -3997,7 +4012,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpEdpDriverUnload"
 #endif
     },
-    {               /*  [73] */
+    {               /*  [74] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4012,7 +4027,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSystemSetRegionRamRectangles"
 #endif
     },
-    {               /*  [74] */
+    {               /*  [75] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4027,7 +4042,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdSystemConfigureSafetyInterrupts"
 #endif
     },
-    {               /*  [75] */
+    {               /*  [76] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4042,7 +4057,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDfpSetForceBlackPixels"
 #endif
     },
-    {               /*  [76] */
+    {               /*  [77] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4057,7 +4072,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpAuxchCtrl"
 #endif
     },
-    {               /*  [77] */
+    {               /*  [78] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x844u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4072,7 +4087,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpCtrl"
 #endif
     },
-    {               /*  [78] */
+    {               /*  [79] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4087,7 +4102,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetLaneData"
 #endif
     },
-    {               /*  [79] */
+    {               /*  [80] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4102,7 +4117,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetLaneData"
 #endif
     },
-    {               /*  [80] */
+    {               /*  [81] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4117,7 +4132,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetTestpattern"
 #endif
     },
-    {               /*  [81] */
+    {               /*  [82] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4132,7 +4147,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetTestpattern"
 #endif
     },
-    {               /*  [82] */
+    {               /*  [83] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4147,7 +4162,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetPreemphasisDrivecurrentPostcursor2Data"
 #endif
     },
-    {               /*  [83] */
+    {               /*  [84] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4162,7 +4177,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetPreemphasisDrivecurrentPostcursor2Data"
 #endif
     },
-    {               /*  [84] */
+    {               /*  [85] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4177,7 +4192,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpMainLinkCtrl"
 #endif
     },
-    {               /*  [85] */
+    {               /*  [86] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4192,7 +4207,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetAudioMuteStream"
 #endif
     },
-    {               /*  [86] */
+    {               /*  [87] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4207,7 +4222,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpTopologyAllocateDisplayId"
 #endif
     },
-    {               /*  [87] */
+    {               /*  [88] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4222,7 +4237,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpTopologyFreeDisplayId"
 #endif
     },
-    {               /*  [88] */
+    {               /*  [89] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4237,7 +4252,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetLinkConfig"
 #endif
     },
-    {               /*  [89] */
+    {               /*  [90] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4252,7 +4267,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetEDPData"
 #endif
     },
-    {               /*  [90] */
+    {               /*  [91] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4267,7 +4282,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpConfigStream"
 #endif
     },
-    {               /*  [91] */
+    {               /*  [92] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4282,7 +4297,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetRateGov"
 #endif
     },
-    {               /*  [92] */
+    {               /*  [93] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4297,7 +4312,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetManualDisplayPort"
 #endif
     },
-    {               /*  [93] */
+    {               /*  [94] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4312,7 +4327,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetEcf"
 #endif
     },
-    {               /*  [94] */
+    {               /*  [95] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4327,7 +4342,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSendACT"
 #endif
     },
-    {               /*  [95] */
+    {               /*  [96] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x820046u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4342,7 +4357,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetCaps"
 #endif
     },
-    {               /*  [96] */
+    {               /*  [97] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4357,7 +4372,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGenerateFakeInterrupt"
 #endif
     },
-    {               /*  [97] */
+    {               /*  [98] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4372,7 +4387,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpConfigRadScratchReg"
 #endif
     },
-    {               /*  [98] */
+    {               /*  [99] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4387,7 +4402,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpConfigSingleHeadMultiStream"
 #endif
     },
-    {               /*  [99] */
+    {               /*  [100] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4402,7 +4417,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetTriggerSelect"
 #endif
     },
-    {               /*  [100] */
+    {               /*  [101] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4417,7 +4432,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetTriggerAll"
 #endif
     },
-    {               /*  [101] */
+    {               /*  [102] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4432,7 +4447,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetAuxLogData"
 #endif
     },
-    {               /*  [102] */
+    {               /*  [103] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4447,7 +4462,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpConfigIndexedLinkRates"
 #endif
     },
-    {               /*  [103] */
+    {               /*  [104] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4462,7 +4477,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetStereoMSAProperties"
 #endif
     },
-    {               /*  [104] */
+    {               /*  [105] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4477,7 +4492,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpConfigureFec"
 #endif
     },
-    {               /*  [105] */
+    {               /*  [106] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4492,7 +4507,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpConfigMacroPad"
 #endif
     },
-    {               /*  [106] */
+    {               /*  [107] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4507,7 +4522,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetGenericInfoframe"
 #endif
     },
-    {               /*  [107] */
+    {               /*  [108] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4522,7 +4537,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetMsaAttributes"
 #endif
     },
-    {               /*  [108] */
+    {               /*  [109] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4537,7 +4552,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetMSAPropertiesv2"
 #endif
     },
-    {               /*  [109] */
+    {               /*  [110] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4552,7 +4567,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpSetLevelInfoTableData"
 #endif
     },
-    {               /*  [110] */
+    {               /*  [111] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4567,7 +4582,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_DispComm
         /*func=*/       "dispcmnCtrlCmdDpGetLevelInfoTableData"
 #endif
     },
-    {               /*  [111] */
+    {               /*  [112] */
 #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
         /*pFunc=*/      (void (*)(void)) NULL,
 #else
@@ -4867,7 +4882,7 @@ NV_STATUS __nvoc_up_thunk_Notifier_dispcmnGetOrAllocNotifShare(struct DispCommon
 
 const struct NVOC_EXPORT_INFO __nvoc_export_info__DispCommon = 
 {
-    /*numEntries=*/     112,
+    /*numEntries=*/     113,
     /*pExportEntries=*/ __nvoc_exported_method_def_DispCommon
 };
 
@@ -5019,6 +5034,11 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) {
     pThis->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__ = &dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL;
 #endif
 
+    // dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth -- exported (id=0x730161)
+#if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u)
+    pThis->__dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth__ = &dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_IMPL;
+#endif
+
     // dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth -- exported (id=0x730157)
 #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc4u)
     pThis->__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__ = &dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_IMPL;
@@ -5463,13 +5483,13 @@ static void __nvoc_init_funcTable_DispCommon_1(DispCommon *pThis) {
 #if !NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u)
     pThis->__dispcmnCtrlCmdSpecificGetRegionalCrcs__ = &dispcmnCtrlCmdSpecificGetRegionalCrcs_IMPL;
 #endif
-} // End __nvoc_init_funcTable_DispCommon_1 with approximately 112 basic block(s).
+} // End __nvoc_init_funcTable_DispCommon_1 with approximately 113 basic block(s).
 
 
-// Initialize vtable(s) for 138 virtual method(s).
+// Initialize vtable(s) for 139 virtual method(s).
 void __nvoc_init_funcTable_DispCommon(DispCommon *pThis) {
 
-    // Initialize vtable(s) with 112 per-object function pointer(s).
+    // Initialize vtable(s) with 113 per-object function pointer(s).
     __nvoc_init_funcTable_DispCommon_1(pThis);
 }
 
diff --git a/src/nvidia/generated/g_disp_objs_nvoc.h b/src/nvidia/generated/g_disp_objs_nvoc.h
index 297b2fd..9b4396f 100644
--- a/src/nvidia/generated/g_disp_objs_nvoc.h
+++ b/src/nvidia/generated/g_disp_objs_nvoc.h
@@ -1575,7 +1575,7 @@ struct DispCommon {
     struct DisplayApi *__nvoc_pbase_DisplayApi;    // dispapi super
     struct DispCommon *__nvoc_pbase_DispCommon;    // dispcmn
 
-    // Vtable with 112 per-object function pointers
+    // Vtable with 113 per-object function pointers
     NV_STATUS (*__dispcmnCtrlCmdSpecificGetHdcpState__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_HDCP_STATE_PARAMS *);  // exported (id=0x730280)
     NV_STATUS (*__dispcmnCtrlCmdSpecificHdcpCtrl__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_HDCP_CTRL_PARAMS *);  // exported (id=0x730282)
     NV_STATUS (*__dispcmnCtrlCmdSpecificGetHdcpRepeaterInfo__)(struct DispCommon * /*this*/, NV0073_CTRL_SPECIFIC_GET_HDCP_REPEATER_INFO_PARAMS *);  // exported (id=0x730260)
@@ -1599,6 +1599,7 @@ struct DispCommon {
     NV_STATUS (*__dispcmnCtrlCmdSystemQueryDisplayIdsWithMux__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS *);  // exported (id=0x73013d)
     NV_STATUS (*__dispcmnCtrlCmdSystemCheckSidebandI2cSupport__)(struct DispCommon * /*this*/, NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS *);  // exported (id=0x73014b)
     NV_STATUS (*__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *);  // exported (id=0x730143)
+    NV_STATUS (*__dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS *);  // exported (id=0x730161)
     NV_STATUS (*__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *);  // exported (id=0x730157)
     NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *);  // exported (id=0x730109)
     NV_STATUS (*__dispcmnCtrlCmdSystemGetHotplugEventConfig__)(struct DispCommon * /*this*/, NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS *);  // exported (id=0x730144)
@@ -1808,6 +1809,8 @@ NV_STATUS __nvoc_objCreate_DispCommon(DispCommon**, Dynamic*, NvU32, struct CALL
 #define dispcmnCtrlCmdSystemCheckSidebandI2cSupport(pDispCommon, pParams) dispcmnCtrlCmdSystemCheckSidebandI2cSupport_DISPATCH(pDispCommon, pParams)
 #define dispcmnCtrlCmdSystemAllocateDisplayBandwidth_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__
 #define dispcmnCtrlCmdSystemAllocateDisplayBandwidth(pDispCommon, pParams) dispcmnCtrlCmdSystemAllocateDisplayBandwidth_DISPATCH(pDispCommon, pParams)
+#define dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth__
+#define dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth(pDispCommon, pParams) dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_DISPATCH(pDispCommon, pParams)
 #define dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__
 #define dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth(pDispCommon, pParams) dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_DISPATCH(pDispCommon, pParams)
 #define dispcmnCtrlCmdSystemGetHotplugConfig_FNPTR(pDispCommon) pDispCommon->__dispcmnCtrlCmdSystemGetHotplugConfig__
@@ -2132,6 +2135,10 @@ static inline NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_DISPATCH(st
     return pDispCommon->__dispcmnCtrlCmdSystemAllocateDisplayBandwidth__(pDispCommon, pParams);
 }
 
+static inline NV_STATUS dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS *pParams) {
+    return pDispCommon->__dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth__(pDispCommon, pParams);
+}
+
 static inline NV_STATUS dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_DISPATCH(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams) {
     return pDispCommon->__dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth__(pDispCommon, pParams);
 }
@@ -2638,6 +2645,8 @@ NV_STATUS dispcmnCtrlCmdSystemCheckSidebandI2cSupport_IMPL(struct DispCommon *pD
 
 NV_STATUS dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams);
 
+NV_STATUS dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS *pParams);
+
 NV_STATUS dispcmnCtrlCmdSystemInternalAllocateDisplayBandwidth_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_INTERNAL_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS *pParams);
 
 NV_STATUS dispcmnCtrlCmdSystemGetHotplugConfig_IMPL(struct DispCommon *pDispCommon, NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS *pHotplugParams);
diff --git a/src/nvidia/generated/g_kern_disp_nvoc.h b/src/nvidia/generated/g_kern_disp_nvoc.h
index 23fb043..68408de 100644
--- a/src/nvidia/generated/g_kern_disp_nvoc.h
+++ b/src/nvidia/generated/g_kern_disp_nvoc.h
@@ -567,6 +567,20 @@ static inline NV_STATUS kdispArbAndAllocDisplayBandwidth(struct OBJGPU *pGpu, st
 
 #define kdispArbAndAllocDisplayBandwidth_HAL(pGpu, pKernelDisplay, iccBwClient, minRequiredIsoBandwidthKBPS, minRequiredFloorBandwidthKBPS) kdispArbAndAllocDisplayBandwidth(pGpu, pKernelDisplay, iccBwClient, minRequiredIsoBandwidthKBPS, minRequiredFloorBandwidthKBPS)
 
+NV_STATUS kdispGetUefiDisplayBandwidth_v04_02(struct OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *uefiIsoBandwidthKBPS, NvU32 *uefiFloorBandwidthKBPS);
+
+
+#ifdef __nvoc_kern_disp_h_disabled
+static inline NV_STATUS kdispGetUefiDisplayBandwidth(struct OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 *uefiIsoBandwidthKBPS, NvU32 *uefiFloorBandwidthKBPS) {
+    NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!");
+    return NV_ERR_NOT_SUPPORTED;
+}
+#else //__nvoc_kern_disp_h_disabled
+#define kdispGetUefiDisplayBandwidth(pGpu, pKernelDisplay, uefiIsoBandwidthKBPS, uefiFloorBandwidthKBPS) kdispGetUefiDisplayBandwidth_v04_02(pGpu, pKernelDisplay, uefiIsoBandwidthKBPS, uefiFloorBandwidthKBPS)
+#endif //__nvoc_kern_disp_h_disabled
+
+#define kdispGetUefiDisplayBandwidth_HAL(pGpu, pKernelDisplay, uefiIsoBandwidthKBPS, uefiFloorBandwidthKBPS) kdispGetUefiDisplayBandwidth(pGpu, pKernelDisplay, uefiIsoBandwidthKBPS, uefiFloorBandwidthKBPS)
+
 NV_STATUS kdispSetPushBufferParamsToPhysical_IMPL(struct OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, struct DispChannel *pDispChannel, NvHandle hObjectBuffer, struct ContextDma *pBufferContextDma, NvU32 hClass, NvU32 channelInstance, DISPCHNCLASS internalDispChnClass, ChannelPBSize channelPBSize, NvU32 subDeviceId);
 
 
diff --git a/src/nvidia/generated/g_os_nvoc.h b/src/nvidia/generated/g_os_nvoc.h
index 0577dd0..a33af06 100644
--- a/src/nvidia/generated/g_os_nvoc.h
+++ b/src/nvidia/generated/g_os_nvoc.h
@@ -676,6 +676,7 @@ NV_STATUS osTegraSocBpmpSendMrq(OBJGPU      *pGpu,
                                 NvS32       *pApiRet);
 NV_STATUS osMapGsc(NvU64 gsc_base, NvU64 *va);
 NV_STATUS osTegraSocGetImpImportData(OBJGPU *pGpu, TEGRA_IMP_IMPORT_DATA *pTegraImpImportData);
+NV_STATUS osTegraSocGetImpUefiData(OS_GPU_INFO *pOsGpuInfo, NvU32 *pIsoBwKbps, NvU32 *pFloorBwKbps);
 NV_STATUS osTegraSocEnableDisableRfl(OS_GPU_INFO *pOsGpuInfo, NvBool bEnable);
 NV_STATUS osTegraAllocateDisplayBandwidth(OS_GPU_INFO *pOsGpuInfo,
                                           NvU32 averageBandwidthKBPS,
@@ -846,6 +847,10 @@ NV_STATUS osTegraDceRegisterIpcClient(NvU32 interfaceType, void *usrCtx,
 NV_STATUS osTegraDceClientIpcSendRecv(NvU32 clientId, void *msg,
                                       NvU32 msgLength);
 NV_STATUS osTegraDceUnregisterIpcClient(NvU32 clientId);
+NV_STATUS osTegraSocGetDispClockRates(OS_GPU_INFO *pOsGpuInfo,
+                                      NvU32 *pMaxDispClkRateDisppll,
+                                      NvU32 *pMaxDispClkRateSppllClkouta,
+                                      NvU32 *pMaxHubClkRateSppllClkoutb);
 
 //
 // Define OS-layer specific type instead of #include "clk_domains.h" for
diff --git a/src/nvidia/generated/g_rpc-structures.h b/src/nvidia/generated/g_rpc-structures.h
index 59082e5..ec17af2 100644
--- a/src/nvidia/generated/g_rpc-structures.h
+++ b/src/nvidia/generated/g_rpc-structures.h
@@ -113,6 +113,9 @@ typedef rpc_display_modeset_v01_00 rpc_display_modeset_v;
 typedef struct rpc_dce_rm_init_v01_00
 {
     NvBool     bInit;
+    NvU32      maxDispClkRateDisppll;
+    NvU32      maxDispClkRateSppllClkouta;
+    NvU32      maxHubClkRateSppllClkoutb;
     NvU32      hInternalClient;
 } rpc_dce_rm_init_v01_00;
 
diff --git a/src/nvidia/src/kernel/gpu/dce_client/dce_client_rpc.c b/src/nvidia/src/kernel/gpu/dce_client/dce_client_rpc.c
index 7f816d0..8fc867e 100644
--- a/src/nvidia/src/kernel/gpu/dce_client/dce_client_rpc.c
+++ b/src/nvidia/src/kernel/gpu/dce_client/dce_client_rpc.c
@@ -644,6 +644,9 @@ rpcDceRmInit_dce
     OBJGPU *pGpu = (OBJGPU*)pRmApi->pPrivateContext;
     OBJRPC *pRpc = GPU_GET_RPC(pGpu);
     DceClient *pDceClientrm = GPU_GET_DCECLIENTRM(pGpu);
+    NvU32 maxDispClkRateDisppll = 0;
+    NvU32 maxDispClkRateSppllClkouta = 0;
+    NvU32 maxHubClkRateSppllClkoutb = 0;
 
     rpc_generic_union *msg_data;
     NV_STATUS status = NV_ERR_NOT_SUPPORTED;
@@ -664,7 +667,20 @@ rpcDceRmInit_dce
         goto done;
     }
 
-    rpc_params->bInit     = bInit;
+    if (bInit)
+    {
+        status = osTegraSocGetDispClockRates(pGpu->pOsGpuInfo, &maxDispClkRateDisppll, &maxDispClkRateSppllClkouta, &maxHubClkRateSppllClkoutb);
+        if (status != NV_OK)
+        {
+            NV_PRINTF(LEVEL_INFO, "NVRM_RPC_DCE: Retrieving disp clocks max rate Failed [0x%x]\n", status);
+        }
+    }
+
+    rpc_params->bInit                      = bInit;
+    rpc_params->maxDispClkRateDisppll      = maxDispClkRateDisppll;
+    rpc_params->maxDispClkRateSppllClkouta = maxDispClkRateSppllClkouta;
+    rpc_params->maxHubClkRateSppllClkoutb  = maxHubClkRateSppllClkoutb;
+
     status = _dceRpcIssueAndWait(pRmApi);
     if (status != NV_OK)
     {
diff --git a/src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0402.c b/src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
index bfcfee6..b29139c 100644
--- a/src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
+++ b/src/nvidia/src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
@@ -146,3 +146,38 @@ typedef struct
     return status;
 }
 
+/*!
+ * @brief Retrieves display bandwidth values set by UEFI
+ *
+ * @param[in]  pGpu                         OBJGPU pointer
+ * @param[in]  pKernelDisplay               KernelDisplay pointer
+ * @param[out] uefiIsoBandwidthKBPS         ISO BW set by UEFI (KB/sec)
+ * @param[out] uefiFloorBandwidthKBPS       dramclk freq * pipe width set by UEFI (KB/sec)
+ *
+ * @returns NV_OK if successful,
+ *          NV_ERR_NOT_SUPPORTED if the functionality is not available, or
+ *          NV_ERR_GENERIC if some other kind of error occurred.
+ */
+NV_STATUS
+kdispGetUefiDisplayBandwidth_v04_02
+(
+    OBJGPU                     *pGpu,
+    KernelDisplay              *pKernelDisplay,
+    NvU32                      *uefiIsoBandwidthKBPS,
+    NvU32                      *uefiFloorBandwidthKBPS
+)
+{
+    NV_STATUS status = NV_OK;
+
+    status = osTegraSocGetImpUefiData(pGpu->pOsGpuInfo, uefiIsoBandwidthKBPS, uefiFloorBandwidthKBPS);
+    if (status == NV_OK)
+    {
+        NV_PRINTF(LEVEL_INFO, "UEFI has set ISO BW = %u KBPS, floor BW = %u KBPS", *uefiIsoBandwidthKBPS, *uefiFloorBandwidthKBPS);
+    }
+    else
+    {
+        NV_PRINTF(LEVEL_ERROR, "Unable to retrieve UEFI set ISO BW and floor BW");
+    }
+
+    return status;
+}
diff --git a/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c b/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
index f0900ae..22af4c7 100644
--- a/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
+++ b/src/nvidia/src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
@@ -173,6 +173,49 @@ dispcmnCtrlCmdSystemAllocateDisplayBandwidth_IMPL
     return status;
 }
 
+/*!
+ * @brief Query Display Bandwidth values set by UEFI.
+ */
+NV_STATUS
+dispcmnCtrlCmdSystemQueryUefiDisplayBandwidth_IMPL
+(
+    DispCommon *pDispCommon,
+    NV0073_CTRL_SYSTEM_QUERY_UEFI_DISPLAY_BANDWIDTH_PARAMS *pParams
+)
+{
+    OBJGPU        *pGpu;
+    KernelDisplay *pKernelDisplay;
+    NV_STATUS      status;
+
+    // client gave us a subdevice #: get right pGpu for it
+    status = dispapiSetUnicastAndSynchronize_HAL(
+                               staticCast(pDispCommon, DisplayApi),
+                               DISPAPI_GET_GPUGRP(pDispCommon),
+                               &pGpu,
+                               NULL,
+                               pParams->subDeviceInstance);
+    if (status != NV_OK)
+    {
+        return status;
+    }
+
+    status = dispapiValidateRmctrlPriv(pGpu);
+    if (status != NV_OK)
+    {
+        return status;
+    }
+
+    pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
+
+    status =
+        kdispGetUefiDisplayBandwidth_HAL(pGpu,
+                                         pKernelDisplay,
+                                         &pParams->isoBandwidthKBPS,
+                                         &pParams->floorBandwidthKBPS);
+
+    return status;
+}
+
 NV_STATUS
 dispcmnCtrlCmdSystemGetVblankEnable_IMPL
 (
diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c
index f85b85f..2aef019 100644
--- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c
+++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_desc.c
@@ -182,10 +182,16 @@ memdescCreate
     NvU32              gpuCacheAttrib = NV_MEMORY_UNCACHED;
     NV_STATUS          status         = NV_OK;
     NvU64              pageArraySize;
+    MemoryManager     *pMemoryManager = NULL;
 
 
     allocSize = Size;
 
+    if (allocSize == 0)
+    {
+        return NV_ERR_INVALID_ARGUMENT;
+    }
+
     //
     // this memdesc may have gotten forced to sysmem if no carveout,
     // but for VPR it needs to be in vidmem, so check and re-direct here,
@@ -201,25 +207,29 @@ memdescCreate
 
     if (pGpu != NULL)
     {
-        MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu);
+        pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu);
+    }
 
-        if (((AddressSpace == ADDR_SYSMEM) || (AddressSpace == ADDR_UNKNOWN)) &&
-            !(Flags & MEMDESC_FLAGS_OWNED_BY_CTX_BUF_POOL))
+    if (((AddressSpace == ADDR_SYSMEM) || (AddressSpace == ADDR_UNKNOWN)) &&
+        !(Flags & MEMDESC_FLAGS_OWNED_BY_CTX_BUF_POOL))
+    {
+        NvU64 pageSize = osGetPageSize();
+
+        if (pMemoryManager && pMemoryManager->sysmemPageSize)
         {
-            NvU64 pageSize = osGetPageSize();
-
-            if (pMemoryManager && pMemoryManager->sysmemPageSize)
-            {
-                pageSize = pMemoryManager->sysmemPageSize;
-            }
-
-            allocSize = RM_ALIGN_UP(allocSize, pageSize);
-            if (allocSize < Size)
-            {
-                return NV_ERR_INVALID_ARGUMENT;
-            }
+            pageSize = pMemoryManager->sysmemPageSize;
         }
 
+        allocSize = RM_ALIGN_UP(allocSize, pageSize);
+        if (allocSize < Size)
+        {
+            return NV_ERR_INVALID_ARGUMENT;
+        }
+    }
+
+
+    if (pGpu != NULL)
+    {
         if (RMCFG_FEATURE_PLATFORM_MODS || IsT194(pGpu) || IsT234(pGpu))
         {
             if ( (AddressSpace == ADDR_FBMEM) &&
@@ -260,16 +270,7 @@ memdescCreate
     // (4k >> 12 = 1). This modification helps us to avoid overflow of variable
     // allocSize, in case caller of this function passes highest value of NvU64.
     //
-    // If allocSize is passed as 0, PageCount should be returned as 0.
-    //
-    if (allocSize == 0)
-    {
-        PageCount = 0;
-    }
-    else
-    {
-        PageCount = ((allocSize - 1) >> RM_PAGE_SHIFT) + 1;
-    }
+    PageCount = ((allocSize - 1) >> RM_PAGE_SHIFT) + 1;
 
     if (PhysicallyContiguous)
     {
diff --git a/src/nvidia/src/kernel/mem_mgr/standard_mem.c b/src/nvidia/src/kernel/mem_mgr/standard_mem.c
index f27f508..e889e9e 100644
--- a/src/nvidia/src/kernel/mem_mgr/standard_mem.c
+++ b/src/nvidia/src/kernel/mem_mgr/standard_mem.c
@@ -55,7 +55,12 @@ NV_STATUS stdmemValidateParams
         return NV_ERR_INVALID_ARGUMENT;
     }
 
-   //
+    if (pAllocData->size == 0)
+    {
+        return NV_ERR_INVALID_ARGUMENT;
+    }
+
+    //
     // These flags don't do anything in this path. No mapping on alloc and
     // kernel map is controlled by TYPE
     //
diff --git a/src/nvidia/src/kernel/os/os_stubs.c b/src/nvidia/src/kernel/os/os_stubs.c
index bf95ffc..3ecabbb 100644
--- a/src/nvidia/src/kernel/os/os_stubs.c
+++ b/src/nvidia/src/kernel/os/os_stubs.c
@@ -411,6 +411,21 @@ osTegraSocPowerManagement
     return NV_OK;
 }
 
+#if !(RMCFG_FEATURE_PLATFORM_UNIX || RMCFG_FEATURE_PLATFORM_DCE) || \
+    (RMCFG_FEATURE_PLATFORM_UNIX && !RMCFG_FEATURE_TEGRA_SOC_NVDISPLAY)
+NV_STATUS
+osTegraSocGetDispClockRates
+(
+    OS_GPU_INFO *pOsGpuInfo,
+    NvU32       *pMaxDispClkRateDisppll,
+    NvU32       *pMaxDispClkRateSppllClkouta,
+    NvU32       *pMaxHubClkRateSppllClkoutb
+)
+{
+    return NV_ERR_NOT_SUPPORTED;
+}
+#endif
+
 NV_STATUS osLockPageableDataSection(RM_PAGEABLE_SECTION *pSection)
 {
     return NV_OK;