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git://nv-tegra.nvidia.com/tegra/kernel-src/nv-kernel-display-driver.git
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rel-36_eng
| Author | SHA1 | Date | |
|---|---|---|---|
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7296f7cc89 | ||
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6475e2b9c3 | ||
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21c5f3cb07 | ||
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609c9d9754 | ||
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8e45112c82 | ||
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844fb89169 | ||
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438e29f299 | ||
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dc2bae074b | ||
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fae7a52fa6 |
@@ -1,7 +1,7 @@
|
|||||||
# NVIDIA Linux Open GPU Kernel Module Source
|
# NVIDIA Linux Open GPU Kernel Module Source
|
||||||
|
|
||||||
This is the source release of the NVIDIA Linux open GPU kernel modules,
|
This is the source release of the NVIDIA Linux open GPU kernel modules,
|
||||||
version 540.3.0.
|
version 540.4.0.
|
||||||
|
|
||||||
|
|
||||||
## How to Build
|
## How to Build
|
||||||
@@ -17,7 +17,7 @@ as root:
|
|||||||
|
|
||||||
Note that the kernel modules built here must be used with GSP
|
Note that the kernel modules built here must be used with GSP
|
||||||
firmware and user-space NVIDIA GPU driver components from a corresponding
|
firmware and user-space NVIDIA GPU driver components from a corresponding
|
||||||
540.3.0 driver release. This can be achieved by installing
|
540.4.0 driver release. This can be achieved by installing
|
||||||
the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
|
the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
|
||||||
option. E.g.,
|
option. E.g.,
|
||||||
|
|
||||||
@@ -180,7 +180,7 @@ software applications.
|
|||||||
## Compatible GPUs
|
## Compatible GPUs
|
||||||
|
|
||||||
The open-gpu-kernel-modules can be used on any Turing or later GPU
|
The open-gpu-kernel-modules can be used on any Turing or later GPU
|
||||||
(see the table below). However, in the 540.3.0 release,
|
(see the table below). However, in the 540.4.0 release,
|
||||||
GeForce and Workstation support is still considered alpha-quality.
|
GeForce and Workstation support is still considered alpha-quality.
|
||||||
|
|
||||||
To enable use of the open kernel modules on GeForce and Workstation GPUs,
|
To enable use of the open kernel modules on GeForce and Workstation GPUs,
|
||||||
@@ -188,7 +188,7 @@ set the "NVreg_OpenRmEnableUnsupportedGpus" nvidia.ko kernel module
|
|||||||
parameter to 1. For more details, see the NVIDIA GPU driver end user
|
parameter to 1. For more details, see the NVIDIA GPU driver end user
|
||||||
README here:
|
README here:
|
||||||
|
|
||||||
https://us.download.nvidia.com/XFree86/Linux-x86_64/540.3.0/README/kernel_open.html
|
https://us.download.nvidia.com/XFree86/Linux-x86_64/540.4.0/README/kernel_open.html
|
||||||
|
|
||||||
In the below table, if three IDs are listed, the first is the PCI Device
|
In the below table, if three IDs are listed, the first is the PCI Device
|
||||||
ID, the second is the PCI Subsystem Vendor ID, and the third is the PCI
|
ID, the second is the PCI Subsystem Vendor ID, and the third is the PCI
|
||||||
|
|||||||
2427
commitFile.txt
2427
commitFile.txt
File diff suppressed because it is too large
Load Diff
@@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
|
|||||||
EXTRA_CFLAGS += -I$(src)
|
EXTRA_CFLAGS += -I$(src)
|
||||||
EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-error -Wno-format-extra-args
|
EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-error -Wno-format-extra-args
|
||||||
EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
|
EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
|
||||||
EXTRA_CFLAGS += -DNV_VERSION_STRING=\"540.3.0\"
|
EXTRA_CFLAGS += -DNV_VERSION_STRING=\"540.4.0\"
|
||||||
|
|
||||||
ifneq ($(SYSSRCHOST1X),)
|
ifneq ($(SYSSRCHOST1X),)
|
||||||
EXTRA_CFLAGS += -I$(SYSSRCHOST1X)
|
EXTRA_CFLAGS += -I$(SYSSRCHOST1X)
|
||||||
@@ -290,6 +290,7 @@ NV_HEADER_PRESENCE_TESTS = \
|
|||||||
linux/of_platform.h \
|
linux/of_platform.h \
|
||||||
linux/of_device.h \
|
linux/of_device.h \
|
||||||
linux/of_gpio.h \
|
linux/of_gpio.h \
|
||||||
|
linux/of_clk.h \
|
||||||
linux/gpio.h \
|
linux/gpio.h \
|
||||||
linux/gpio/consumer.h \
|
linux/gpio/consumer.h \
|
||||||
linux/interconnect.h \
|
linux/interconnect.h \
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -35,6 +35,6 @@ int nv_platform_count_devices(void);
|
|||||||
int nv_soc_register_irqs(nv_state_t *nv);
|
int nv_soc_register_irqs(nv_state_t *nv);
|
||||||
void nv_soc_free_irqs(nv_state_t *nv);
|
void nv_soc_free_irqs(nv_state_t *nv);
|
||||||
|
|
||||||
int nv_remove_conflicting_framebuffers(void);
|
int nv_disable_simplefb_clocks(void);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -1652,6 +1652,22 @@ compile_test() {
|
|||||||
fi
|
fi
|
||||||
;;
|
;;
|
||||||
|
|
||||||
|
of_clk_get_parent_count)
|
||||||
|
#
|
||||||
|
# Determine if the of_clk_get_parent_count function is present.
|
||||||
|
#
|
||||||
|
CODE="
|
||||||
|
#if defined(NV_LINUX_OF_CLK_H_PRESENT)
|
||||||
|
#include <linux/of_clk.h>
|
||||||
|
#endif
|
||||||
|
void conftest_of_clk_get_parent_count(void)
|
||||||
|
{
|
||||||
|
of_clk_get_parent_count();
|
||||||
|
}
|
||||||
|
"
|
||||||
|
compile_check_conftest "$CODE" "NV_OF_CLK_GET_PARENT_COUNT_PRESENT" "" "functions"
|
||||||
|
;;
|
||||||
|
|
||||||
of_node_to_nid)
|
of_node_to_nid)
|
||||||
#
|
#
|
||||||
# Determine if of_node_to_nid is present
|
# Determine if of_node_to_nid is present
|
||||||
@@ -5090,20 +5106,22 @@ compile_test() {
|
|||||||
compile_check_conftest "$CODE" "NV_PCI_CLASS_MULTIMEDIA_HD_AUDIO_PRESENT" "" "generic"
|
compile_check_conftest "$CODE" "NV_PCI_CLASS_MULTIMEDIA_HD_AUDIO_PRESENT" "" "generic"
|
||||||
;;
|
;;
|
||||||
|
|
||||||
unsafe_follow_pfn)
|
follow_pfn)
|
||||||
#
|
#
|
||||||
# Determine if unsafe_follow_pfn() is present.
|
# Determine if follow_pfn() is present.
|
||||||
#
|
#
|
||||||
# unsafe_follow_pfn() was added by commit 69bacee7f9ad
|
# follow_pfn() was added by commit 3b6748e2dd69
|
||||||
# ("mm: Add unsafe_follow_pfn") in v5.13-rc1.
|
# ("mm: introduce follow_pfn()") in v2.6.31-rc1, and removed
|
||||||
|
# by commit 233eb0bf3b94 ("mm: remove follow_pfn")
|
||||||
|
# from linux-next 233eb0bf3b94.
|
||||||
#
|
#
|
||||||
CODE="
|
CODE="
|
||||||
#include <linux/mm.h>
|
#include <linux/mm.h>
|
||||||
void conftest_unsafe_follow_pfn(void) {
|
void conftest_follow_pfn(void) {
|
||||||
unsafe_follow_pfn();
|
follow_pfn();
|
||||||
}"
|
}"
|
||||||
|
|
||||||
compile_check_conftest "$CODE" "NV_UNSAFE_FOLLOW_PFN_PRESENT" "" "functions"
|
compile_check_conftest "$CODE" "NV_FOLLOW_PFN_PRESENT" "" "functions"
|
||||||
;;
|
;;
|
||||||
|
|
||||||
drm_plane_atomic_check_has_atomic_state_arg)
|
drm_plane_atomic_check_has_atomic_state_arg)
|
||||||
@@ -6281,6 +6299,27 @@ compile_test() {
|
|||||||
compile_check_conftest "$CODE" "NV_MEMORY_FAILURE_MF_SW_SIMULATED_DEFINED" "" "types"
|
compile_check_conftest "$CODE" "NV_MEMORY_FAILURE_MF_SW_SIMULATED_DEFINED" "" "types"
|
||||||
;;
|
;;
|
||||||
|
|
||||||
|
drm_unlocked_ioctl_flag_present)
|
||||||
|
# Determine if DRM_UNLOCKED IOCTL flag is present.
|
||||||
|
#
|
||||||
|
# DRM_UNLOCKED was removed by commit 2798ffcc1d6a ("drm: Remove
|
||||||
|
# locking for legacy ioctls and DRM_UNLOCKED") in Linux
|
||||||
|
# next-20231208.
|
||||||
|
#
|
||||||
|
# DRM_UNLOCKED definition was moved from drmP.h to drm_ioctl.h by
|
||||||
|
# commit 2640981f3600 ("drm: document drm_ioctl.[hc]") in v4.12.
|
||||||
|
CODE="
|
||||||
|
#if defined(NV_DRM_DRM_IOCTL_H_PRESENT)
|
||||||
|
#include <drm/drm_ioctl.h>
|
||||||
|
#endif
|
||||||
|
#if defined(NV_DRM_DRMP_H_PRESENT)
|
||||||
|
#include <drm/drmP.h>
|
||||||
|
#endif
|
||||||
|
int flags = DRM_UNLOCKED;"
|
||||||
|
|
||||||
|
compile_check_conftest "$CODE" "NV_DRM_UNLOCKED_IOCTL_FLAG_PRESENT" "" "types"
|
||||||
|
;;
|
||||||
|
|
||||||
sync_file_get_fence)
|
sync_file_get_fence)
|
||||||
#
|
#
|
||||||
# Determine if sync_file_get_fence() function is present
|
# Determine if sync_file_get_fence() function is present
|
||||||
@@ -6422,20 +6461,19 @@ compile_test() {
|
|||||||
compile_check_conftest "$CODE" "NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_HAS_DRIVER_ARG" "" "types"
|
compile_check_conftest "$CODE" "NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_HAS_DRIVER_ARG" "" "types"
|
||||||
;;
|
;;
|
||||||
|
|
||||||
remove_conflicting_framebuffers)
|
crypto_tfm_ctx_aligned)
|
||||||
|
# Determine if 'crypto_tfm_ctx_aligned' is defined.
|
||||||
#
|
#
|
||||||
# Determine if remove_conflicting_framebuffers function is present.
|
# Removed by commit 25c74a39e0f6 ("crypto: hmac - remove unnecessary
|
||||||
#
|
# alignment logic") in v6.7.
|
||||||
# Added by commit 06415c5 ("fbmem, drm/nouveau: kick firmware framebuffers as soon as possible")
|
|
||||||
# in v2.6.35-rc1 (2010-05-18)
|
|
||||||
#
|
#
|
||||||
CODE="
|
CODE="
|
||||||
#include <linux/fb.h>
|
#include <crypto/algapi.h>
|
||||||
void conftest_remove_conflicting_framebuffers(void) {
|
void conftest_crypto_tfm_ctx_aligned(void) {
|
||||||
remove_conflicting_framebuffers();
|
(void)crypto_tfm_ctx_aligned();
|
||||||
}"
|
}"
|
||||||
|
|
||||||
compile_check_conftest "$CODE" "NV_REMOVE_CONFLICTING_FRAMEBUFFERS_PRESENT" "" "functions"
|
compile_check_conftest "$CODE" "NV_CRYPTO_TFM_CTX_ALIGNED_PRESENT" "" "functions"
|
||||||
;;
|
;;
|
||||||
|
|
||||||
crypto)
|
crypto)
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2015-2024, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
@@ -604,9 +604,7 @@ static int nv_drm_plane_atomic_set_property(
|
|||||||
to_nv_drm_plane_state(state);
|
to_nv_drm_plane_state(state);
|
||||||
|
|
||||||
if (property == nv_dev->nv_out_fence_property) {
|
if (property == nv_dev->nv_out_fence_property) {
|
||||||
#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST)
|
|
||||||
nv_drm_plane_state->fd_user_ptr = u64_to_user_ptr(val);
|
nv_drm_plane_state->fd_user_ptr = u64_to_user_ptr(val);
|
||||||
#endif
|
|
||||||
return 0;
|
return 0;
|
||||||
} else if (property == nv_dev->nv_input_colorspace_property) {
|
} else if (property == nv_dev->nv_input_colorspace_property) {
|
||||||
nv_drm_plane_state->input_colorspace = val;
|
nv_drm_plane_state->input_colorspace = val;
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2015-2024, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
@@ -354,19 +354,15 @@ static int nv_drm_create_properties(struct nv_drm_device *nv_dev)
|
|||||||
len++;
|
len++;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST)
|
if (nv_dev->supportsSyncpts) {
|
||||||
if (!nv_dev->supportsSyncpts) {
|
nv_dev->nv_out_fence_property =
|
||||||
return 0;
|
drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC,
|
||||||
|
"NV_DRM_OUT_FENCE_PTR", 0, U64_MAX);
|
||||||
|
if (nv_dev->nv_out_fence_property == NULL) {
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
nv_dev->nv_out_fence_property =
|
|
||||||
drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC,
|
|
||||||
"NV_DRM_OUT_FENCE_PTR", 0, U64_MAX);
|
|
||||||
if (nv_dev->nv_out_fence_property == NULL) {
|
|
||||||
return -ENOMEM;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
nv_dev->nv_input_colorspace_property =
|
nv_dev->nv_input_colorspace_property =
|
||||||
drm_property_create_enum(nv_dev->dev, 0, "NV_INPUT_COLORSPACE",
|
drm_property_create_enum(nv_dev->dev, 0, "NV_INPUT_COLORSPACE",
|
||||||
enum_list, len);
|
enum_list, len);
|
||||||
@@ -1332,9 +1328,21 @@ static const struct drm_ioctl_desc nv_drm_ioctls[] = {
|
|||||||
DRM_RENDER_ALLOW|DRM_UNLOCKED),
|
DRM_RENDER_ALLOW|DRM_UNLOCKED),
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* DRM_UNLOCKED is implicit for all non-legacy DRM driver IOCTLs since Linux
|
||||||
|
* v4.10 commit fa5386459f06 "drm: Used DRM_LEGACY for all legacy functions"
|
||||||
|
* (Linux v4.4 commit ea487835e887 "drm: Enforce unlocked ioctl operation
|
||||||
|
* for kms driver ioctls" previously did it only for drivers that set the
|
||||||
|
* DRM_MODESET flag), so this will race with SET_CLIENT_CAP. Linux v4.11
|
||||||
|
* commit dcf727ab5d17 "drm: setclientcap doesn't need the drm BKL" also
|
||||||
|
* removed locking from SET_CLIENT_CAP so there is no use attempting to lock
|
||||||
|
* manually. The latter commit acknowledges that this can expose userspace
|
||||||
|
* to inconsistent behavior when racing with itself, but accepts that risk.
|
||||||
|
*/
|
||||||
DRM_IOCTL_DEF_DRV(NVIDIA_GET_CLIENT_CAPABILITY,
|
DRM_IOCTL_DEF_DRV(NVIDIA_GET_CLIENT_CAPABILITY,
|
||||||
nv_drm_get_client_capability_ioctl,
|
nv_drm_get_client_capability_ioctl,
|
||||||
0),
|
0),
|
||||||
|
|
||||||
#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
|
#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
|
||||||
DRM_IOCTL_DEF_DRV(NVIDIA_GET_CRTC_CRC32,
|
DRM_IOCTL_DEF_DRV(NVIDIA_GET_CRTC_CRC32,
|
||||||
nv_drm_get_crtc_crc32_ioctl,
|
nv_drm_get_crtc_crc32_ioctl,
|
||||||
|
|||||||
@@ -582,6 +582,19 @@ static inline int nv_drm_format_num_planes(uint32_t format)
|
|||||||
|
|
||||||
#endif /* defined(NV_DRM_FORMAT_MODIFIERS_PRESENT) */
|
#endif /* defined(NV_DRM_FORMAT_MODIFIERS_PRESENT) */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* DRM_UNLOCKED was removed with linux-next commit 2798ffcc1d6a ("drm: Remove
|
||||||
|
* locking for legacy ioctls and DRM_UNLOCKED"), but it was previously made
|
||||||
|
* implicit for all non-legacy DRM driver IOCTLs since Linux v4.10 commit
|
||||||
|
* fa5386459f06 "drm: Used DRM_LEGACY for all legacy functions" (Linux v4.4
|
||||||
|
* commit ea487835e887 "drm: Enforce unlocked ioctl operation for kms driver
|
||||||
|
* ioctls" previously did it only for drivers that set the DRM_MODESET flag), so
|
||||||
|
* it was effectively a no-op anyway.
|
||||||
|
*/
|
||||||
|
#if !defined(NV_DRM_UNLOCKED_IOCTL_FLAG_PRESENT)
|
||||||
|
#define DRM_UNLOCKED 0
|
||||||
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* drm_vma_offset_exact_lookup_locked() were added
|
* drm_vma_offset_exact_lookup_locked() were added
|
||||||
* by kernel commit 2225cfe46bcc which was Signed-off-by:
|
* by kernel commit 2225cfe46bcc which was Signed-off-by:
|
||||||
|
|||||||
@@ -139,3 +139,4 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += drm_connector_put
|
|||||||
NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags
|
NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags
|
||||||
NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_dumb_destroy
|
NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_dumb_destroy
|
||||||
NV_CONFTEST_TYPE_COMPILE_TESTS += fence_ops_use_64bit_seqno
|
NV_CONFTEST_TYPE_COMPILE_TESTS += fence_ops_use_64bit_seqno
|
||||||
|
NV_CONFTEST_TYPE_COMPILE_TESTS += drm_unlocked_ioctl_flag_present
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2015-21 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -99,6 +99,20 @@ NvBool nvkms_disable_hdmi_frl(void)
|
|||||||
return disable_hdmi_frl;
|
return disable_hdmi_frl;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
NvBool nvkms_kernel_supports_syncpts(void)
|
||||||
|
{
|
||||||
|
/*
|
||||||
|
* Note this only checks that the kernel has the prerequisite
|
||||||
|
* support for syncpts; callers must also check that the hardware
|
||||||
|
* supports syncpts.
|
||||||
|
*/
|
||||||
|
#if (defined(CONFIG_TEGRA_GRHOST) || defined(NV_LINUX_HOST1X_NEXT_H_PRESENT))
|
||||||
|
return NV_TRUE;
|
||||||
|
#else
|
||||||
|
return NV_FALSE;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
#define NVKMS_SYNCPT_STUBS_NEEDED
|
#define NVKMS_SYNCPT_STUBS_NEEDED
|
||||||
|
|
||||||
/*************************************************************************
|
/*************************************************************************
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -300,6 +300,11 @@ NvU32 nvkms_enumerate_gpus(nv_gpu_info_t *gpu_info);
|
|||||||
|
|
||||||
NvBool nvkms_allow_write_combining(void);
|
NvBool nvkms_allow_write_combining(void);
|
||||||
|
|
||||||
|
/*!
|
||||||
|
* Check if OS supports syncpoints.
|
||||||
|
*/
|
||||||
|
NvBool nvkms_kernel_supports_syncpts(void);
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
* Checks whether the fd is associated with an nvidia character device.
|
* Checks whether the fd is associated with an nvidia character device.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@@ -23,6 +23,10 @@
|
|||||||
|
|
||||||
#include "internal_crypt_lib.h"
|
#include "internal_crypt_lib.h"
|
||||||
|
|
||||||
|
#ifndef NV_CRYPTO_TFM_CTX_ALIGNED_PRESENT
|
||||||
|
#include <crypto/internal/hash.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
void *lkca_hash_new(const char* alg_name)
|
void *lkca_hash_new(const char* alg_name)
|
||||||
{
|
{
|
||||||
#ifndef USE_LKCA
|
#ifndef USE_LKCA
|
||||||
@@ -87,9 +91,24 @@ bool lkca_hmac_duplicate(struct shash_desc *dst, struct shash_desc const *src)
|
|||||||
|
|
||||||
struct crypto_shash *src_tfm = src->tfm;
|
struct crypto_shash *src_tfm = src->tfm;
|
||||||
struct crypto_shash *dst_tfm = dst->tfm;
|
struct crypto_shash *dst_tfm = dst->tfm;
|
||||||
|
int ss = crypto_shash_statesize(dst_tfm);
|
||||||
|
|
||||||
|
#ifdef NV_CRYPTO_TFM_CTX_ALIGNED_PRESENT
|
||||||
char *src_ipad = crypto_tfm_ctx_aligned(&src_tfm->base);
|
char *src_ipad = crypto_tfm_ctx_aligned(&src_tfm->base);
|
||||||
char *dst_ipad = crypto_tfm_ctx_aligned(&dst_tfm->base);
|
char *dst_ipad = crypto_tfm_ctx_aligned(&dst_tfm->base);
|
||||||
int ss = crypto_shash_statesize(dst_tfm);
|
#else
|
||||||
|
int ctx_size = crypto_shash_alg(dst_tfm)->base.cra_ctxsize;
|
||||||
|
char *src_ipad = crypto_shash_ctx(src_tfm);
|
||||||
|
char *dst_ipad = crypto_shash_ctx(dst_tfm);
|
||||||
|
/*
|
||||||
|
* Actual struct definition is hidden, so I assume data we need is at
|
||||||
|
* the end. In 6.0 the struct has a pointer to crpyto_shash followed by:
|
||||||
|
* 'u8 ipad[statesize];', then 'u8 opad[statesize];'
|
||||||
|
*/
|
||||||
|
src_ipad += ctx_size - 2 * ss;
|
||||||
|
dst_ipad += ctx_size - 2 * ss;
|
||||||
|
#endif
|
||||||
|
|
||||||
memcpy(dst_ipad, src_ipad, crypto_shash_blocksize(src->tfm));
|
memcpy(dst_ipad, src_ipad, crypto_shash_blocksize(src->tfm));
|
||||||
memcpy(dst_ipad + ss, src_ipad + ss, crypto_shash_blocksize(src->tfm));
|
memcpy(dst_ipad + ss, src_ipad + ss, crypto_shash_blocksize(src->tfm));
|
||||||
crypto_shash_clear_flags(dst->tfm, CRYPTO_TFM_NEED_KEY);
|
crypto_shash_clear_flags(dst->tfm, CRYPTO_TFM_NEED_KEY);
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -607,7 +607,7 @@ nv_imp_icc_get
|
|||||||
}
|
}
|
||||||
else if (IS_ERR(nvl->nv_imp_icc_path))
|
else if (IS_ERR(nvl->nv_imp_icc_path))
|
||||||
{
|
{
|
||||||
nv_printf(NV_DBG_ERRORS, "NVRM: invalid path = %s\n",
|
nv_printf(NV_DBG_ERRORS, "NVRM: invalid path = %d\n",
|
||||||
PTR_ERR(nvl->nv_imp_icc_path));
|
PTR_ERR(nvl->nv_imp_icc_path));
|
||||||
nvl->nv_imp_icc_path = NULL;
|
nvl->nv_imp_icc_path = NULL;
|
||||||
status = NV_ERR_GENERIC;
|
status = NV_ERR_GENERIC;
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -1386,9 +1386,10 @@ NvBool nv_get_hdcp_enabled(nv_state_t *nv)
|
|||||||
return NV_FALSE;
|
return NV_FALSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
int nv_remove_conflicting_framebuffers(void)
|
int nv_disable_simplefb_clocks(void)
|
||||||
{
|
{
|
||||||
int status = 0;
|
int status = 0;
|
||||||
|
static bool is_coldboot = true;
|
||||||
|
|
||||||
#if defined(CONFIG_FB) && defined(NV_NUM_REGISTERED_FB_PRESENT)
|
#if defined(CONFIG_FB) && defined(NV_NUM_REGISTERED_FB_PRESENT)
|
||||||
if (num_registered_fb > 0)
|
if (num_registered_fb > 0)
|
||||||
@@ -1399,8 +1400,39 @@ int nv_remove_conflicting_framebuffers(void)
|
|||||||
{
|
{
|
||||||
if (!registered_fb[i])
|
if (!registered_fb[i])
|
||||||
continue;
|
continue;
|
||||||
#if defined(NV_REMOVE_CONFLICTING_FRAMEBUFFERS_PRESENT)
|
|
||||||
status = remove_conflicting_framebuffers(registered_fb[i]->apertures, nv_platform_driver.driver.name, false);
|
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
|
||||||
|
struct clk *clock;
|
||||||
|
struct device_node *np = NULL;
|
||||||
|
unsigned int clk_count = 0;
|
||||||
|
int j;
|
||||||
|
|
||||||
|
np = of_find_node_by_name(NULL, "framebuffer");
|
||||||
|
if ((np != NULL) && of_device_is_available(np) && is_coldboot)
|
||||||
|
{
|
||||||
|
#if defined(NV_LINUX_OF_CLK_H_PRESENT) && defined(NV_OF_CLK_GET_PARENT_COUNT_PRESENT)
|
||||||
|
clk_count = of_clk_get_parent_count(np);
|
||||||
|
for (j = 0; j < clk_count; j++)
|
||||||
|
{
|
||||||
|
clock = of_clk_get(np, j);
|
||||||
|
if (IS_ERR(clock))
|
||||||
|
{
|
||||||
|
nv_printf(NV_DBG_ERRORS, "clock %d not found %ld\n", j, PTR_ERR(clock));
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if (__clk_is_enabled(clock))
|
||||||
|
{
|
||||||
|
clk_disable_unprepare(clock);
|
||||||
|
}
|
||||||
|
clk_put(clock);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
is_coldboot = false;
|
||||||
|
}
|
||||||
|
of_node_put(np);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -29,7 +29,7 @@
|
|||||||
NvU64 NV_API_CALL nv_get_kern_phys_address(NvU64 address)
|
NvU64 NV_API_CALL nv_get_kern_phys_address(NvU64 address)
|
||||||
{
|
{
|
||||||
/* direct-mapped kernel address */
|
/* direct-mapped kernel address */
|
||||||
if (virt_addr_valid(address))
|
if (virt_addr_valid((void *)address))
|
||||||
return __pa(address);
|
return __pa(address);
|
||||||
|
|
||||||
nv_printf(NV_DBG_ERRORS,
|
nv_printf(NV_DBG_ERRORS,
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -1255,11 +1255,11 @@ static int nv_start_device(nv_state_t *nv, nvidia_stack_t *sp)
|
|||||||
goto failed;
|
goto failed;
|
||||||
}
|
}
|
||||||
|
|
||||||
rc = nv_remove_conflicting_framebuffers();
|
rc = nv_disable_simplefb_clocks();
|
||||||
if (rc)
|
if (rc)
|
||||||
{
|
{
|
||||||
NV_DEV_PRINTF(NV_DBG_ERRORS, nv,
|
NV_DEV_PRINTF(NV_DBG_ERRORS, nv,
|
||||||
"nv_remove_conflicting_framebuffers failed, status %d\n",
|
"nv_disable_simplefb_clocks failed, status %d\n",
|
||||||
rc);
|
rc);
|
||||||
goto failed;
|
goto failed;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -161,7 +161,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += pci_enable_atomic_ops_to_root
|
|||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += vga_tryget
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += vga_tryget
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += cc_platform_has
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += cc_platform_has
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += seq_read_iter
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += seq_read_iter
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += unsafe_follow_pfn
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += follow_pfn
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_object_get
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_object_get
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_object_put_unlocked
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_object_put_unlocked
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += add_memory_driver_managed
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += add_memory_driver_managed
|
||||||
@@ -196,7 +196,8 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += devm_clk_bulk_get_all
|
|||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += get_task_ioprio
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += get_task_ioprio
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += mdev_set_iommu_device
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += mdev_set_iommu_device
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += offline_and_remove_memory
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += offline_and_remove_memory
|
||||||
NV_CONFTEST_FUNCTION_COMPILE_TESTS += remove_conflicting_framebuffers
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += of_clk_get_parent_count
|
||||||
|
NV_CONFTEST_FUNCTION_COMPILE_TESTS += crypto_tfm_ctx_aligned
|
||||||
|
|
||||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_of_node_to_nid
|
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_of_node_to_nid
|
||||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_sme_active
|
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_sme_active
|
||||||
@@ -227,6 +228,7 @@ NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_clear_in
|
|||||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_alloc_mem_from_gscco
|
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_alloc_mem_from_gscco
|
||||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_free_gscco_mem
|
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_free_gscco_mem
|
||||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += crypto
|
NV_CONFTEST_SYMBOL_COMPILE_TESTS += crypto
|
||||||
|
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_follow_pte
|
||||||
|
|
||||||
NV_CONFTEST_TYPE_COMPILE_TESTS += dma_ops
|
NV_CONFTEST_TYPE_COMPILE_TESTS += dma_ops
|
||||||
NV_CONFTEST_TYPE_COMPILE_TESTS += swiotlb_dma_ops
|
NV_CONFTEST_TYPE_COMPILE_TESTS += swiotlb_dma_ops
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -1218,9 +1218,6 @@ void NV_API_CALL os_get_screen_info(
|
|||||||
if (!registered_fb[i])
|
if (!registered_fb[i])
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* Make sure base address is mapped to GPU BAR */
|
|
||||||
if ((registered_fb[i]->fix.smem_start == consoleBar1Address) ||
|
|
||||||
(registered_fb[i]->fix.smem_start == consoleBar2Address))
|
|
||||||
{
|
{
|
||||||
*pPhysicalAddress = registered_fb[i]->fix.smem_start;
|
*pPhysicalAddress = registered_fb[i]->fix.smem_start;
|
||||||
*pFbWidth = registered_fb[i]->var.xres;
|
*pFbWidth = registered_fb[i]->var.xres;
|
||||||
|
|||||||
@@ -30,10 +30,28 @@ static inline int nv_follow_pfn(struct vm_area_struct *vma,
|
|||||||
unsigned long address,
|
unsigned long address,
|
||||||
unsigned long *pfn)
|
unsigned long *pfn)
|
||||||
{
|
{
|
||||||
#if defined(NV_UNSAFE_FOLLOW_PFN_PRESENT)
|
#if defined(NV_FOLLOW_PFN_PRESENT)
|
||||||
return unsafe_follow_pfn(vma, address, pfn);
|
|
||||||
#else
|
|
||||||
return follow_pfn(vma, address, pfn);
|
return follow_pfn(vma, address, pfn);
|
||||||
|
#else
|
||||||
|
#if NV_IS_EXPORT_SYMBOL_PRESENT_follow_pte
|
||||||
|
int status = 0;
|
||||||
|
spinlock_t *ptl;
|
||||||
|
pte_t *ptep;
|
||||||
|
|
||||||
|
if (!(vma->vm_flags & (VM_IO | VM_PFNMAP)))
|
||||||
|
return status;
|
||||||
|
|
||||||
|
status = follow_pte(vma, address, &ptep, &ptl);
|
||||||
|
if (status)
|
||||||
|
return status;
|
||||||
|
*pfn = pte_pfn(ptep_get(ptep));
|
||||||
|
|
||||||
|
// The lock is acquired inside follow_pte()
|
||||||
|
pte_unmap_unlock(ptep, ptl);
|
||||||
|
return 0;
|
||||||
|
#else // NV_IS_EXPORT_SYMBOL_PRESENT_follow_pte
|
||||||
|
return -1;
|
||||||
|
#endif // NV_IS_EXPORT_SYMBOL_PRESENT_follow_pte
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1 +1 @@
|
|||||||
rel-36_eng_2024-01-03
|
rel-36_eng_2024-06-26
|
||||||
|
|||||||
@@ -4,7 +4,7 @@
|
|||||||
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
|
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
|
||||||
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
|
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
|
||||||
|
|
||||||
#define NV_VERSION_STRING "540.3.0"
|
#define NV_VERSION_STRING "540.4.0"
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -300,6 +300,11 @@ NvU32 nvkms_enumerate_gpus(nv_gpu_info_t *gpu_info);
|
|||||||
|
|
||||||
NvBool nvkms_allow_write_combining(void);
|
NvBool nvkms_allow_write_combining(void);
|
||||||
|
|
||||||
|
/*!
|
||||||
|
* Check if OS supports syncpoints.
|
||||||
|
*/
|
||||||
|
NvBool nvkms_kernel_supports_syncpts(void);
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
* Checks whether the fd is associated with an nvidia character device.
|
* Checks whether the fd is associated with an nvidia character device.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@@ -8094,7 +8094,11 @@ NVEvoHAL nvEvoC6 = {
|
|||||||
TRUE, /* supportsVblankSyncObjects */
|
TRUE, /* supportsVblankSyncObjects */
|
||||||
FALSE, /* requiresScalingTapsInBothDimensions */
|
FALSE, /* requiresScalingTapsInBothDimensions */
|
||||||
TRUE, /* supportsMergeMode */
|
TRUE, /* supportsMergeMode */
|
||||||
TRUE, /* supportsHDMI10BPC */
|
// XXX HDMI TODO: Enable 10bpc support in Bug 4590142
|
||||||
|
// HDMI RGB 10bpc support is not fully working on rel-36 yet for Tegra SOC
|
||||||
|
// resulting in issues with specific monitors. Hence disabling it temporarily
|
||||||
|
// until it is fully enabled along with HDR support in above tracking bug.
|
||||||
|
FALSE, /* supportsHDMI10BPC */
|
||||||
NV_EVO3_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */
|
NV_EVO3_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */
|
||||||
sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */
|
sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */
|
||||||
NV_EVO_SCALER_2TAPS, /* minScalerTaps */
|
NV_EVO_SCALER_2TAPS, /* minScalerTaps */
|
||||||
|
|||||||
@@ -561,6 +561,10 @@ SendHDMIVendorSpecificInfoFrame(const NVDispEvoRec *pDispEvo,
|
|||||||
NVT_VENDOR_SPECIFIC_INFOFRAME vendorInfoFrame;
|
NVT_VENDOR_SPECIFIC_INFOFRAME vendorInfoFrame;
|
||||||
NVT_STATUS status;
|
NVT_STATUS status;
|
||||||
|
|
||||||
|
if (!vendorCtrl.Enable) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
status = NvTiming_ConstructVendorSpecificInfoframe(pEdidInfo,
|
status = NvTiming_ConstructVendorSpecificInfoframe(pEdidInfo,
|
||||||
&vendorCtrl,
|
&vendorCtrl,
|
||||||
&vendorInfoFrame);
|
&vendorInfoFrame);
|
||||||
|
|||||||
@@ -1994,6 +1994,7 @@ static NvBool ConstructModeTimingsMetaData(
|
|||||||
// Currently hardcoded to send infoframe necessary for HDMI 1.4a 4kx2k extended modes.
|
// Currently hardcoded to send infoframe necessary for HDMI 1.4a 4kx2k extended modes.
|
||||||
if (NVT_GET_TIMING_STATUS_TYPE(timing.etc.status) == NVT_TYPE_HDMI_EXT) {
|
if (NVT_GET_TIMING_STATUS_TYPE(timing.etc.status) == NVT_TYPE_HDMI_EXT) {
|
||||||
pVendorInfoFrameCtrl->Enable = 1;
|
pVendorInfoFrameCtrl->Enable = 1;
|
||||||
|
pVendorInfoFrameCtrl->HDMIRevision = 14;
|
||||||
pVendorInfoFrameCtrl->HDMIFormat = NVT_HDMI_VS_BYTE4_HDMI_VID_FMT_EXT;
|
pVendorInfoFrameCtrl->HDMIFormat = NVT_HDMI_VS_BYTE4_HDMI_VID_FMT_EXT;
|
||||||
pVendorInfoFrameCtrl->HDMI_VIC = NVT_GET_TIMING_STATUS_SEQ(timing.etc.status);
|
pVendorInfoFrameCtrl->HDMI_VIC = NVT_GET_TIMING_STATUS_SEQ(timing.etc.status);
|
||||||
pVendorInfoFrameCtrl->ThreeDStruc = NVT_HDMI_VS_BYTE5_HDMI_3DS_NA;
|
pVendorInfoFrameCtrl->ThreeDStruc = NVT_HDMI_VS_BYTE5_HDMI_3DS_NA;
|
||||||
@@ -2001,7 +2002,9 @@ static NvBool ConstructModeTimingsMetaData(
|
|||||||
pVendorInfoFrameCtrl->MetadataPresent = 0;
|
pVendorInfoFrameCtrl->MetadataPresent = 0;
|
||||||
pVendorInfoFrameCtrl->MetadataType = NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_TYPE_NA;
|
pVendorInfoFrameCtrl->MetadataType = NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_TYPE_NA;
|
||||||
} else {
|
} else {
|
||||||
pVendorInfoFrameCtrl->Enable = 0;
|
pVendorInfoFrameCtrl->Enable = 1;
|
||||||
|
pVendorInfoFrameCtrl->HDMIRevision = 14;
|
||||||
|
pVendorInfoFrameCtrl->HDMIFormat = NVT_HDMI_VS_BYTE4_HDMI_VID_FMT_NONE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -266,6 +266,7 @@ static NvBool QueryGpuCapabilities(NVDevEvoPtr pDevEvo)
|
|||||||
}
|
}
|
||||||
|
|
||||||
pDevEvo->supportsSyncpts =
|
pDevEvo->supportsSyncpts =
|
||||||
|
nvkms_kernel_supports_syncpts() &&
|
||||||
nvRmEvoClassListCheck(pDevEvo, NV01_MEMORY_SYNCPOINT);
|
nvRmEvoClassListCheck(pDevEvo, NV01_MEMORY_SYNCPOINT);
|
||||||
|
|
||||||
return TRUE;
|
return TRUE;
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -239,12 +239,6 @@ deviceCtrlCmdOsUnixVTSwitch_IMPL
|
|||||||
return NV_OK;
|
return NV_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL(Device *pDevice,
|
|
||||||
NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams)
|
|
||||||
{
|
|
||||||
return NV_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
NV_STATUS NV_API_CALL rm_save_low_res_mode(
|
NV_STATUS NV_API_CALL rm_save_low_res_mode(
|
||||||
nvidia_stack_t *sp,
|
nvidia_stack_t *sp,
|
||||||
nv_state_t *pNv
|
nv_state_t *pNv
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -45,6 +45,7 @@
|
|||||||
#include <objtmr.h>
|
#include <objtmr.h>
|
||||||
#include "nverror.h"
|
#include "nverror.h"
|
||||||
#include <gpu/mem_mgr/mem_mgr.h>
|
#include <gpu/mem_mgr/mem_mgr.h>
|
||||||
|
#include <gpu/disp/console_mem/disp_console_mem.h>
|
||||||
#include <mem_mgr/io_vaspace.h>
|
#include <mem_mgr/io_vaspace.h>
|
||||||
#include <gpu/disp/kern_disp.h>
|
#include <gpu/disp/kern_disp.h>
|
||||||
|
|
||||||
@@ -603,6 +604,36 @@ osInitNvMapping(
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
RmTegraSetConsolePreservationParams(OBJGPU *pGpu)
|
||||||
|
{
|
||||||
|
nv_state_t *nv = NV_GET_NV_STATE(pGpu);
|
||||||
|
NvU64 fbBaseAddress = 0;
|
||||||
|
NvU64 fbConsoleSize = 0;
|
||||||
|
|
||||||
|
if (!gpuFuseSupportsDisplay_HAL(pGpu))
|
||||||
|
{
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the OS layer for any video memory used by a console
|
||||||
|
// driver that should be reserved.
|
||||||
|
//
|
||||||
|
fbConsoleSize = rm_get_uefi_console_size(nv, &fbBaseAddress);
|
||||||
|
|
||||||
|
if (fbConsoleSize == 0)
|
||||||
|
{
|
||||||
|
NV_PRINTF(LEVEL_INFO, "No Frame Buffer Present\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
|
||||||
|
DisplayConsoleMemory *pConsoleMem = KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay);
|
||||||
|
|
||||||
|
consolememSetMemory(pGpu, pConsoleMem, fbBaseAddress, fbConsoleSize);
|
||||||
|
}
|
||||||
|
|
||||||
static NV_STATUS
|
static NV_STATUS
|
||||||
RmInitDeviceDma(
|
RmInitDeviceDma(
|
||||||
nv_state_t *nv
|
nv_state_t *nv
|
||||||
@@ -1249,6 +1280,7 @@ NvBool RmInitAdapter(
|
|||||||
|
|
||||||
pOS = SYS_GET_OS(pSys);
|
pOS = SYS_GET_OS(pSys);
|
||||||
|
|
||||||
|
RmTegraSetConsolePreservationParams(pGpu);
|
||||||
RmInitAcpiMethods(pOS, pSys, pGpu);
|
RmInitAcpiMethods(pOS, pSys, pGpu);
|
||||||
|
|
||||||
if (IS_GSP_CLIENT(pGpu) && IsT234DorBetter(pGpu))
|
if (IS_GSP_CLIENT(pGpu) && IsT234DorBetter(pGpu))
|
||||||
|
|||||||
142
src/nvidia/arch/nvalloc/unix/src/unix_console.c
Normal file
142
src/nvidia/arch/nvalloc/unix/src/unix_console.c
Normal file
@@ -0,0 +1,142 @@
|
|||||||
|
/*
|
||||||
|
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
|
* SPDX-License-Identifier: MIT
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <core/locks.h>
|
||||||
|
#include <ctrl/ctrl0080/ctrl0080unix.h>
|
||||||
|
#include <gpu/device/device.h>
|
||||||
|
#include <gpu/gpu.h>
|
||||||
|
#include <nv-priv.h>
|
||||||
|
#include <nv.h>
|
||||||
|
#include <osapi.h>
|
||||||
|
#include <gpu/mem_mgr/mem_mgr.h>
|
||||||
|
#include <gpu/disp/kern_disp.h>
|
||||||
|
#include <gpu/disp/console_mem/disp_console_mem.h>
|
||||||
|
|
||||||
|
static NvBool
|
||||||
|
RmDisplayConsoleMemDescPresent
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu
|
||||||
|
)
|
||||||
|
{
|
||||||
|
NvBool bPresent = NV_FALSE;
|
||||||
|
|
||||||
|
KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
|
||||||
|
DisplayConsoleMemory *pConsoleMem = KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay);
|
||||||
|
|
||||||
|
if (consolememGetMemDesc(pGpu, pConsoleMem) != NULL)
|
||||||
|
{
|
||||||
|
bPresent = NV_TRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
return bPresent;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL
|
||||||
|
(
|
||||||
|
Device *pDevice,
|
||||||
|
NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams
|
||||||
|
)
|
||||||
|
{
|
||||||
|
OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice);
|
||||||
|
NvBool bContinue = NV_TRUE;
|
||||||
|
|
||||||
|
if (rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_FB) == NV_OK)
|
||||||
|
{
|
||||||
|
// See if the console is on one of the subdevices of this device.
|
||||||
|
portMemSet(pParams, 0, sizeof(*pParams));
|
||||||
|
|
||||||
|
SLI_LOOP_START(SLI_LOOP_FLAGS_NONE)
|
||||||
|
|
||||||
|
nv_state_t *nv = NV_GET_NV_STATE(pGpu);
|
||||||
|
|
||||||
|
if (RmDisplayConsoleMemDescPresent(pGpu) && bContinue)
|
||||||
|
{
|
||||||
|
NvU64 baseAddr;
|
||||||
|
NvU32 width, height, depth, pitch;
|
||||||
|
|
||||||
|
// There should only be one.
|
||||||
|
NV_ASSERT(pParams->width == 0);
|
||||||
|
|
||||||
|
pParams->subDeviceInstance = gpumgrGetSubDeviceInstanceFromGpu(pGpu);
|
||||||
|
|
||||||
|
// Console is either mapped to BAR1 or BAR2 + 16 MB
|
||||||
|
os_get_screen_info(&baseAddr, &width, &height, &depth, &pitch,
|
||||||
|
nv->bars[NV_GPU_BAR_INDEX_FB].cpu_address,
|
||||||
|
nv->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address + 0x1000000);
|
||||||
|
|
||||||
|
pParams->width = (NvU16)width;
|
||||||
|
pParams->height = (NvU16)height;
|
||||||
|
pParams->depth = (NvU16)depth;
|
||||||
|
pParams->pitch = (NvU16)pitch;
|
||||||
|
|
||||||
|
if (baseAddr != 0)
|
||||||
|
{
|
||||||
|
bContinue = NV_FALSE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
SLI_LOOP_END
|
||||||
|
|
||||||
|
rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
NV_PRINTF(LEVEL_INFO,"%s: Failed to acquire GPU lock", __FUNCTION__);
|
||||||
|
}
|
||||||
|
|
||||||
|
return NV_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
dispdeviceFillVgaSavedDisplayState
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
NvU64 vgaAddr,
|
||||||
|
NvU8 vgaMemType,
|
||||||
|
NvBool vgaValid,
|
||||||
|
NvU64 workspaceAddr,
|
||||||
|
NvU8 workspaceMemType,
|
||||||
|
NvBool workspaceValid,
|
||||||
|
NvBool baseValid,
|
||||||
|
NvBool workspaceBaseValid
|
||||||
|
)
|
||||||
|
{
|
||||||
|
nv_state_t *nv = NV_GET_NV_STATE(pGpu);
|
||||||
|
nv_priv_t *nvp = NV_GET_NV_PRIV(nv);
|
||||||
|
NvBool use_vbios = NV_PRIMARY_VGA(nv) && RmGpuHasIOSpaceEnabled(nv);
|
||||||
|
|
||||||
|
if (use_vbios)
|
||||||
|
{
|
||||||
|
nvp->vga.base.addr = vgaAddr;
|
||||||
|
nvp->vga.base.memTarget = vgaMemType;
|
||||||
|
nvp->vga.base.valid = vgaValid;
|
||||||
|
nvp->vga.baseValid = baseValid;
|
||||||
|
|
||||||
|
nvp->vga.workspaceBase.addr = workspaceAddr;
|
||||||
|
nvp->vga.workspaceBase.memTarget = workspaceMemType;
|
||||||
|
nvp->vga.workspaceBase.valid = workspaceValid;
|
||||||
|
nvp->vga.workspaceBaseValid = workspaceBaseValid;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
@@ -45,6 +45,7 @@
|
|||||||
#include <class/cl003e.h> // NV01_MEMORY_SYSTEM
|
#include <class/cl003e.h> // NV01_MEMORY_SYSTEM
|
||||||
#include <class/cl00c3.h> // NV01_MEMORY_SYNCPOINT
|
#include <class/cl00c3.h> // NV01_MEMORY_SYNCPOINT
|
||||||
#include <class/cl0071.h> // NV01_MEMORY_SYSTEM_OS_DESCRIPTOR
|
#include <class/cl0071.h> // NV01_MEMORY_SYSTEM_OS_DESCRIPTOR
|
||||||
|
#include <class/cl0076.h> // NV01_MEMORY_FRAMEBUFFER_CONSOLE
|
||||||
#include <class/cl00f2.h> // IO_VASPACE_A
|
#include <class/cl00f2.h> // IO_VASPACE_A
|
||||||
#include <class/cl0005.h> // NV01_EVENT
|
#include <class/cl0005.h> // NV01_EVENT
|
||||||
#include <nvos.h> // NV01_EVENT_KERNEL_CALLBACK
|
#include <nvos.h> // NV01_EVENT_KERNEL_CALLBACK
|
||||||
@@ -129,6 +130,10 @@
|
|||||||
#define NV01_MEMORY_SYSTEM_OS_DESCRIPTOR (0x00000071)
|
#define NV01_MEMORY_SYSTEM_OS_DESCRIPTOR (0x00000071)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifndef NV01_MEMORY_FRAMEBUFFER_CONSOLE
|
||||||
|
#define NV01_MEMORY_FRAMEBUFFER_CONSOLE (0x00000076)
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifndef IO_VASPACE_A
|
#ifndef IO_VASPACE_A
|
||||||
#define IO_VASPACE_A (0x000000f2)
|
#define IO_VASPACE_A (0x000000f2)
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
356
src/nvidia/generated/g_console_mem_nvoc.c
Normal file
356
src/nvidia/generated/g_console_mem_nvoc.c
Normal file
@@ -0,0 +1,356 @@
|
|||||||
|
#define NVOC_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
|
||||||
|
#include "nvoc/runtime.h"
|
||||||
|
#include "nvoc/rtti.h"
|
||||||
|
#include "nvtypes.h"
|
||||||
|
#include "nvport/nvport.h"
|
||||||
|
#include "nvport/inline/util_valist.h"
|
||||||
|
#include "utils/nvassert.h"
|
||||||
|
#include "g_console_mem_nvoc.h"
|
||||||
|
|
||||||
|
#ifdef DEBUG
|
||||||
|
char __nvoc_class_id_uniqueness_check_0xaac69e = 1;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory;
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource;
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon;
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource;
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Memory;
|
||||||
|
|
||||||
|
void __nvoc_init_ConsoleMemory(ConsoleMemory*);
|
||||||
|
void __nvoc_init_funcTable_ConsoleMemory(ConsoleMemory*);
|
||||||
|
NV_STATUS __nvoc_ctor_ConsoleMemory(ConsoleMemory*, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams);
|
||||||
|
void __nvoc_init_dataField_ConsoleMemory(ConsoleMemory*);
|
||||||
|
void __nvoc_dtor_ConsoleMemory(ConsoleMemory*);
|
||||||
|
extern const struct NVOC_EXPORT_INFO __nvoc_export_info_ConsoleMemory;
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_ConsoleMemory = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_ConsoleMemory,
|
||||||
|
/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_ConsoleMemory,
|
||||||
|
/*offset=*/ 0,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_Object = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_Object,
|
||||||
|
/*dtor=*/ &__nvoc_destructFromBase,
|
||||||
|
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object),
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_RsResource = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_RsResource,
|
||||||
|
/*dtor=*/ &__nvoc_destructFromBase,
|
||||||
|
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource),
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_RmResourceCommon = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_RmResourceCommon,
|
||||||
|
/*dtor=*/ &__nvoc_destructFromBase,
|
||||||
|
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon),
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_RmResource = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_RmResource,
|
||||||
|
/*dtor=*/ &__nvoc_destructFromBase,
|
||||||
|
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource),
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_Memory = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_Memory,
|
||||||
|
/*dtor=*/ &__nvoc_destructFromBase,
|
||||||
|
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory),
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_CASTINFO __nvoc_castinfo_ConsoleMemory = {
|
||||||
|
/*numRelatives=*/ 6,
|
||||||
|
/*relatives=*/ {
|
||||||
|
&__nvoc_rtti_ConsoleMemory_ConsoleMemory,
|
||||||
|
&__nvoc_rtti_ConsoleMemory_Memory,
|
||||||
|
&__nvoc_rtti_ConsoleMemory_RmResource,
|
||||||
|
&__nvoc_rtti_ConsoleMemory_RmResourceCommon,
|
||||||
|
&__nvoc_rtti_ConsoleMemory_RsResource,
|
||||||
|
&__nvoc_rtti_ConsoleMemory_Object,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory =
|
||||||
|
{
|
||||||
|
/*classInfo=*/ {
|
||||||
|
/*size=*/ sizeof(ConsoleMemory),
|
||||||
|
/*classId=*/ classId(ConsoleMemory),
|
||||||
|
/*providerId=*/ &__nvoc_rtti_provider,
|
||||||
|
#if NV_PRINTF_STRINGS_ALLOWED
|
||||||
|
/*name=*/ "ConsoleMemory",
|
||||||
|
#endif
|
||||||
|
},
|
||||||
|
/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_ConsoleMemory,
|
||||||
|
/*pCastInfo=*/ &__nvoc_castinfo_ConsoleMemory,
|
||||||
|
/*pExportInfo=*/ &__nvoc_export_info_ConsoleMemory
|
||||||
|
};
|
||||||
|
|
||||||
|
static NvBool __nvoc_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory) {
|
||||||
|
return conmemCanCopy((struct ConsoleMemory *)(((unsigned char *)pConsoleMemory) - __nvoc_rtti_ConsoleMemory_RsResource.offset));
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) {
|
||||||
|
return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bSubdeviceHandleProvided);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NvBool __nvoc_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) {
|
||||||
|
return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) {
|
||||||
|
return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) {
|
||||||
|
return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NvU32 __nvoc_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource) {
|
||||||
|
return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset));
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __nvoc_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) {
|
||||||
|
resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pReference);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NvBool __nvoc_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) {
|
||||||
|
return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pGpu);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) {
|
||||||
|
return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __nvoc_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_RsResource_conmemControlLookup(struct ConsoleMemory *pResource, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams, const struct NVOC_EXPORTED_METHOD_DEF **ppEntry) {
|
||||||
|
return resControlLookup((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams, ppEntry);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) {
|
||||||
|
return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pCpuMapping);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) {
|
||||||
|
return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) {
|
||||||
|
return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), ppMemDesc);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) {
|
||||||
|
return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bCopyConstructorContext);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) {
|
||||||
|
return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pDstGpu, pDstDevice);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __nvoc_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource) {
|
||||||
|
resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset));
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) {
|
||||||
|
return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), hMemory, pDuplicate);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __nvoc_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NV_STATUS __nvoc_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) {
|
||||||
|
return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams, pCpuMapping);
|
||||||
|
}
|
||||||
|
|
||||||
|
static NvBool __nvoc_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) {
|
||||||
|
return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight);
|
||||||
|
}
|
||||||
|
|
||||||
|
const struct NVOC_EXPORT_INFO __nvoc_export_info_ConsoleMemory =
|
||||||
|
{
|
||||||
|
/*numEntries=*/ 0,
|
||||||
|
/*pExportEntries=*/ 0
|
||||||
|
};
|
||||||
|
|
||||||
|
void __nvoc_dtor_Memory(Memory*);
|
||||||
|
void __nvoc_dtor_ConsoleMemory(ConsoleMemory *pThis) {
|
||||||
|
__nvoc_dtor_Memory(&pThis->__nvoc_base_Memory);
|
||||||
|
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_dataField_ConsoleMemory(ConsoleMemory *pThis) {
|
||||||
|
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_ctor_Memory(Memory* , CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *);
|
||||||
|
NV_STATUS __nvoc_ctor_ConsoleMemory(ConsoleMemory *pThis, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) {
|
||||||
|
NV_STATUS status = NV_OK;
|
||||||
|
status = __nvoc_ctor_Memory(&pThis->__nvoc_base_Memory, arg_pCallContext, arg_pParams);
|
||||||
|
if (status != NV_OK) goto __nvoc_ctor_ConsoleMemory_fail_Memory;
|
||||||
|
__nvoc_init_dataField_ConsoleMemory(pThis);
|
||||||
|
|
||||||
|
status = __nvoc_conmemConstruct(pThis, arg_pCallContext, arg_pParams);
|
||||||
|
if (status != NV_OK) goto __nvoc_ctor_ConsoleMemory_fail__init;
|
||||||
|
goto __nvoc_ctor_ConsoleMemory_exit; // Success
|
||||||
|
|
||||||
|
__nvoc_ctor_ConsoleMemory_fail__init:
|
||||||
|
__nvoc_dtor_Memory(&pThis->__nvoc_base_Memory);
|
||||||
|
__nvoc_ctor_ConsoleMemory_fail_Memory:
|
||||||
|
__nvoc_ctor_ConsoleMemory_exit:
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __nvoc_init_funcTable_ConsoleMemory_1(ConsoleMemory *pThis) {
|
||||||
|
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||||
|
|
||||||
|
pThis->__conmemCanCopy__ = &conmemCanCopy_IMPL;
|
||||||
|
|
||||||
|
pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_ConsoleMemory_resCanCopy;
|
||||||
|
|
||||||
|
pThis->__conmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_conmemCheckMemInterUnmap;
|
||||||
|
|
||||||
|
pThis->__conmemShareCallback__ = &__nvoc_thunk_RmResource_conmemShareCallback;
|
||||||
|
|
||||||
|
pThis->__conmemMapTo__ = &__nvoc_thunk_RsResource_conmemMapTo;
|
||||||
|
|
||||||
|
pThis->__conmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_conmemGetMapAddrSpace;
|
||||||
|
|
||||||
|
pThis->__conmemGetRefCount__ = &__nvoc_thunk_RsResource_conmemGetRefCount;
|
||||||
|
|
||||||
|
pThis->__conmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_conmemAddAdditionalDependants;
|
||||||
|
|
||||||
|
pThis->__conmemControl_Prologue__ = &__nvoc_thunk_RmResource_conmemControl_Prologue;
|
||||||
|
|
||||||
|
pThis->__conmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_conmemIsGpuMapAllowed;
|
||||||
|
|
||||||
|
pThis->__conmemUnmapFrom__ = &__nvoc_thunk_RsResource_conmemUnmapFrom;
|
||||||
|
|
||||||
|
pThis->__conmemControl_Epilogue__ = &__nvoc_thunk_RmResource_conmemControl_Epilogue;
|
||||||
|
|
||||||
|
pThis->__conmemControlLookup__ = &__nvoc_thunk_RsResource_conmemControlLookup;
|
||||||
|
|
||||||
|
pThis->__conmemControl__ = &__nvoc_thunk_Memory_conmemControl;
|
||||||
|
|
||||||
|
pThis->__conmemUnmap__ = &__nvoc_thunk_Memory_conmemUnmap;
|
||||||
|
|
||||||
|
pThis->__conmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_conmemGetMemInterMapParams;
|
||||||
|
|
||||||
|
pThis->__conmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_conmemGetMemoryMappingDescriptor;
|
||||||
|
|
||||||
|
pThis->__conmemControlFilter__ = &__nvoc_thunk_RsResource_conmemControlFilter;
|
||||||
|
|
||||||
|
pThis->__conmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_conmemControlSerialization_Prologue;
|
||||||
|
|
||||||
|
pThis->__conmemIsReady__ = &__nvoc_thunk_Memory_conmemIsReady;
|
||||||
|
|
||||||
|
pThis->__conmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_conmemCheckCopyPermissions;
|
||||||
|
|
||||||
|
pThis->__conmemPreDestruct__ = &__nvoc_thunk_RsResource_conmemPreDestruct;
|
||||||
|
|
||||||
|
pThis->__conmemIsDuplicate__ = &__nvoc_thunk_Memory_conmemIsDuplicate;
|
||||||
|
|
||||||
|
pThis->__conmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_conmemControlSerialization_Epilogue;
|
||||||
|
|
||||||
|
pThis->__conmemMap__ = &__nvoc_thunk_Memory_conmemMap;
|
||||||
|
|
||||||
|
pThis->__conmemAccessCallback__ = &__nvoc_thunk_RmResource_conmemAccessCallback;
|
||||||
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_funcTable_ConsoleMemory(ConsoleMemory *pThis) {
|
||||||
|
__nvoc_init_funcTable_ConsoleMemory_1(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_Memory(Memory*);
|
||||||
|
void __nvoc_init_ConsoleMemory(ConsoleMemory *pThis) {
|
||||||
|
pThis->__nvoc_pbase_ConsoleMemory = pThis;
|
||||||
|
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object;
|
||||||
|
pThis->__nvoc_pbase_RsResource = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource;
|
||||||
|
pThis->__nvoc_pbase_RmResourceCommon = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon;
|
||||||
|
pThis->__nvoc_pbase_RmResource = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource;
|
||||||
|
pThis->__nvoc_pbase_Memory = &pThis->__nvoc_base_Memory;
|
||||||
|
__nvoc_init_Memory(&pThis->__nvoc_base_Memory);
|
||||||
|
__nvoc_init_funcTable_ConsoleMemory(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreate_ConsoleMemory(ConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) {
|
||||||
|
NV_STATUS status;
|
||||||
|
Object *pParentObj;
|
||||||
|
ConsoleMemory *pThis;
|
||||||
|
|
||||||
|
status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(ConsoleMemory), (void**)&pThis, (void**)ppThis);
|
||||||
|
if (status != NV_OK)
|
||||||
|
return status;
|
||||||
|
|
||||||
|
portMemSet(pThis, 0, sizeof(ConsoleMemory));
|
||||||
|
|
||||||
|
__nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_ConsoleMemory);
|
||||||
|
|
||||||
|
pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.createFlags = createFlags;
|
||||||
|
|
||||||
|
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
|
||||||
|
{
|
||||||
|
pParentObj = dynamicCast(pParent, Object);
|
||||||
|
objAddChild(pParentObj, &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.pParent = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
__nvoc_init_ConsoleMemory(pThis);
|
||||||
|
status = __nvoc_ctor_ConsoleMemory(pThis, arg_pCallContext, arg_pParams);
|
||||||
|
if (status != NV_OK) goto __nvoc_objCreate_ConsoleMemory_cleanup;
|
||||||
|
|
||||||
|
*ppThis = pThis;
|
||||||
|
|
||||||
|
return NV_OK;
|
||||||
|
|
||||||
|
__nvoc_objCreate_ConsoleMemory_cleanup:
|
||||||
|
// do not call destructors here since the constructor already called them
|
||||||
|
if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
|
||||||
|
portMemSet(pThis, 0, sizeof(ConsoleMemory));
|
||||||
|
else
|
||||||
|
portMemFree(pThis);
|
||||||
|
|
||||||
|
// coverity[leaked_storage:FALSE]
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreateDynamic_ConsoleMemory(ConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
|
||||||
|
NV_STATUS status;
|
||||||
|
CALL_CONTEXT * arg_pCallContext = va_arg(args, CALL_CONTEXT *);
|
||||||
|
struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams = va_arg(args, struct RS_RES_ALLOC_PARAMS_INTERNAL *);
|
||||||
|
|
||||||
|
status = __nvoc_objCreate_ConsoleMemory(ppThis, pParent, createFlags, arg_pCallContext, arg_pParams);
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
249
src/nvidia/generated/g_console_mem_nvoc.h
Normal file
249
src/nvidia/generated/g_console_mem_nvoc.h
Normal file
@@ -0,0 +1,249 @@
|
|||||||
|
#ifndef _G_CONSOLE_MEM_NVOC_H_
|
||||||
|
#define _G_CONSOLE_MEM_NVOC_H_
|
||||||
|
#include "nvoc/runtime.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
|
* SPDX-License-Identifier: MIT
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "g_console_mem_nvoc.h"
|
||||||
|
|
||||||
|
#ifndef _CONSOLE_MEMORY_H_
|
||||||
|
#define _CONSOLE_MEMORY_H_
|
||||||
|
|
||||||
|
#include "mem_mgr/mem.h"
|
||||||
|
|
||||||
|
/*!
|
||||||
|
* This class is used to create hMemory referencing reserved console memory
|
||||||
|
*/
|
||||||
|
#ifdef NVOC_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
|
||||||
|
#define PRIVATE_FIELD(x) x
|
||||||
|
#else
|
||||||
|
#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
|
||||||
|
#endif
|
||||||
|
struct ConsoleMemory {
|
||||||
|
const struct NVOC_RTTI *__nvoc_rtti;
|
||||||
|
struct Memory __nvoc_base_Memory;
|
||||||
|
struct Object *__nvoc_pbase_Object;
|
||||||
|
struct RsResource *__nvoc_pbase_RsResource;
|
||||||
|
struct RmResourceCommon *__nvoc_pbase_RmResourceCommon;
|
||||||
|
struct RmResource *__nvoc_pbase_RmResource;
|
||||||
|
struct Memory *__nvoc_pbase_Memory;
|
||||||
|
struct ConsoleMemory *__nvoc_pbase_ConsoleMemory;
|
||||||
|
NvBool (*__conmemCanCopy__)(struct ConsoleMemory *);
|
||||||
|
NV_STATUS (*__conmemCheckMemInterUnmap__)(struct ConsoleMemory *, NvBool);
|
||||||
|
NvBool (*__conmemShareCallback__)(struct ConsoleMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *);
|
||||||
|
NV_STATUS (*__conmemMapTo__)(struct ConsoleMemory *, RS_RES_MAP_TO_PARAMS *);
|
||||||
|
NV_STATUS (*__conmemGetMapAddrSpace__)(struct ConsoleMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *);
|
||||||
|
NvU32 (*__conmemGetRefCount__)(struct ConsoleMemory *);
|
||||||
|
void (*__conmemAddAdditionalDependants__)(struct RsClient *, struct ConsoleMemory *, RsResourceRef *);
|
||||||
|
NV_STATUS (*__conmemControl_Prologue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
|
||||||
|
NvBool (*__conmemIsGpuMapAllowed__)(struct ConsoleMemory *, struct OBJGPU *);
|
||||||
|
NV_STATUS (*__conmemUnmapFrom__)(struct ConsoleMemory *, RS_RES_UNMAP_FROM_PARAMS *);
|
||||||
|
void (*__conmemControl_Epilogue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
|
||||||
|
NV_STATUS (*__conmemControlLookup__)(struct ConsoleMemory *, struct RS_RES_CONTROL_PARAMS_INTERNAL *, const struct NVOC_EXPORTED_METHOD_DEF **);
|
||||||
|
NV_STATUS (*__conmemControl__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
|
||||||
|
NV_STATUS (*__conmemUnmap__)(struct ConsoleMemory *, CALL_CONTEXT *, RsCpuMapping *);
|
||||||
|
NV_STATUS (*__conmemGetMemInterMapParams__)(struct ConsoleMemory *, RMRES_MEM_INTER_MAP_PARAMS *);
|
||||||
|
NV_STATUS (*__conmemGetMemoryMappingDescriptor__)(struct ConsoleMemory *, MEMORY_DESCRIPTOR **);
|
||||||
|
NV_STATUS (*__conmemControlFilter__)(struct ConsoleMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
|
||||||
|
NV_STATUS (*__conmemControlSerialization_Prologue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
|
||||||
|
NV_STATUS (*__conmemIsReady__)(struct ConsoleMemory *, NvBool);
|
||||||
|
NV_STATUS (*__conmemCheckCopyPermissions__)(struct ConsoleMemory *, struct OBJGPU *, struct Device *);
|
||||||
|
void (*__conmemPreDestruct__)(struct ConsoleMemory *);
|
||||||
|
NV_STATUS (*__conmemIsDuplicate__)(struct ConsoleMemory *, NvHandle, NvBool *);
|
||||||
|
void (*__conmemControlSerialization_Epilogue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
|
||||||
|
NV_STATUS (*__conmemMap__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *);
|
||||||
|
NvBool (*__conmemAccessCallback__)(struct ConsoleMemory *, struct RsClient *, void *, RsAccessRight);
|
||||||
|
};
|
||||||
|
|
||||||
|
#ifndef __NVOC_CLASS_ConsoleMemory_TYPEDEF__
|
||||||
|
#define __NVOC_CLASS_ConsoleMemory_TYPEDEF__
|
||||||
|
typedef struct ConsoleMemory ConsoleMemory;
|
||||||
|
#endif /* __NVOC_CLASS_ConsoleMemory_TYPEDEF__ */
|
||||||
|
|
||||||
|
#ifndef __nvoc_class_id_ConsoleMemory
|
||||||
|
#define __nvoc_class_id_ConsoleMemory 0xaac69e
|
||||||
|
#endif /* __nvoc_class_id_ConsoleMemory */
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory;
|
||||||
|
|
||||||
|
#define __staticCast_ConsoleMemory(pThis) \
|
||||||
|
((pThis)->__nvoc_pbase_ConsoleMemory)
|
||||||
|
|
||||||
|
#ifdef __nvoc_console_mem_h_disabled
|
||||||
|
#define __dynamicCast_ConsoleMemory(pThis) ((ConsoleMemory*)NULL)
|
||||||
|
#else //__nvoc_console_mem_h_disabled
|
||||||
|
#define __dynamicCast_ConsoleMemory(pThis) \
|
||||||
|
((ConsoleMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ConsoleMemory)))
|
||||||
|
#endif //__nvoc_console_mem_h_disabled
|
||||||
|
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreateDynamic_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, va_list);
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreate_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams);
|
||||||
|
#define __objCreate_ConsoleMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \
|
||||||
|
__nvoc_objCreate_ConsoleMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams)
|
||||||
|
|
||||||
|
#define conmemCanCopy(pConsoleMemory) conmemCanCopy_DISPATCH(pConsoleMemory)
|
||||||
|
#define conmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) conmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided)
|
||||||
|
#define conmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) conmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy)
|
||||||
|
#define conmemMapTo(pResource, pParams) conmemMapTo_DISPATCH(pResource, pParams)
|
||||||
|
#define conmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) conmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace)
|
||||||
|
#define conmemGetRefCount(pResource) conmemGetRefCount_DISPATCH(pResource)
|
||||||
|
#define conmemAddAdditionalDependants(pClient, pResource, pReference) conmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference)
|
||||||
|
#define conmemControl_Prologue(pResource, pCallContext, pParams) conmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams)
|
||||||
|
#define conmemIsGpuMapAllowed(pMemory, pGpu) conmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu)
|
||||||
|
#define conmemUnmapFrom(pResource, pParams) conmemUnmapFrom_DISPATCH(pResource, pParams)
|
||||||
|
#define conmemControl_Epilogue(pResource, pCallContext, pParams) conmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams)
|
||||||
|
#define conmemControlLookup(pResource, pParams, ppEntry) conmemControlLookup_DISPATCH(pResource, pParams, ppEntry)
|
||||||
|
#define conmemControl(pMemory, pCallContext, pParams) conmemControl_DISPATCH(pMemory, pCallContext, pParams)
|
||||||
|
#define conmemUnmap(pMemory, pCallContext, pCpuMapping) conmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping)
|
||||||
|
#define conmemGetMemInterMapParams(pMemory, pParams) conmemGetMemInterMapParams_DISPATCH(pMemory, pParams)
|
||||||
|
#define conmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) conmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc)
|
||||||
|
#define conmemControlFilter(pResource, pCallContext, pParams) conmemControlFilter_DISPATCH(pResource, pCallContext, pParams)
|
||||||
|
#define conmemControlSerialization_Prologue(pResource, pCallContext, pParams) conmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams)
|
||||||
|
#define conmemIsReady(pMemory, bCopyConstructorContext) conmemIsReady_DISPATCH(pMemory, bCopyConstructorContext)
|
||||||
|
#define conmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) conmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice)
|
||||||
|
#define conmemPreDestruct(pResource) conmemPreDestruct_DISPATCH(pResource)
|
||||||
|
#define conmemIsDuplicate(pMemory, hMemory, pDuplicate) conmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate)
|
||||||
|
#define conmemControlSerialization_Epilogue(pResource, pCallContext, pParams) conmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams)
|
||||||
|
#define conmemMap(pMemory, pCallContext, pParams, pCpuMapping) conmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping)
|
||||||
|
#define conmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) conmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight)
|
||||||
|
NvBool conmemCanCopy_IMPL(struct ConsoleMemory *pConsoleMemory);
|
||||||
|
|
||||||
|
static inline NvBool conmemCanCopy_DISPATCH(struct ConsoleMemory *pConsoleMemory) {
|
||||||
|
return pConsoleMemory->__conmemCanCopy__(pConsoleMemory);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemCheckMemInterUnmap_DISPATCH(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) {
|
||||||
|
return pMemory->__conmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NvBool conmemShareCallback_DISPATCH(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) {
|
||||||
|
return pResource->__conmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemMapTo_DISPATCH(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) {
|
||||||
|
return pResource->__conmemMapTo__(pResource, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemGetMapAddrSpace_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) {
|
||||||
|
return pMemory->__conmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NvU32 conmemGetRefCount_DISPATCH(struct ConsoleMemory *pResource) {
|
||||||
|
return pResource->__conmemGetRefCount__(pResource);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void conmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) {
|
||||||
|
pResource->__conmemAddAdditionalDependants__(pClient, pResource, pReference);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemControl_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return pResource->__conmemControl_Prologue__(pResource, pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NvBool conmemIsGpuMapAllowed_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) {
|
||||||
|
return pMemory->__conmemIsGpuMapAllowed__(pMemory, pGpu);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemUnmapFrom_DISPATCH(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) {
|
||||||
|
return pResource->__conmemUnmapFrom__(pResource, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void conmemControl_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
pResource->__conmemControl_Epilogue__(pResource, pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemControlLookup_DISPATCH(struct ConsoleMemory *pResource, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams, const struct NVOC_EXPORTED_METHOD_DEF **ppEntry) {
|
||||||
|
return pResource->__conmemControlLookup__(pResource, pParams, ppEntry);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemControl_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return pMemory->__conmemControl__(pMemory, pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemUnmap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) {
|
||||||
|
return pMemory->__conmemUnmap__(pMemory, pCallContext, pCpuMapping);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemGetMemInterMapParams_DISPATCH(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) {
|
||||||
|
return pMemory->__conmemGetMemInterMapParams__(pMemory, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemGetMemoryMappingDescriptor_DISPATCH(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) {
|
||||||
|
return pMemory->__conmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemControlFilter_DISPATCH(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return pResource->__conmemControlFilter__(pResource, pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemControlSerialization_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
return pResource->__conmemControlSerialization_Prologue__(pResource, pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemIsReady_DISPATCH(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) {
|
||||||
|
return pMemory->__conmemIsReady__(pMemory, bCopyConstructorContext);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemCheckCopyPermissions_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) {
|
||||||
|
return pMemory->__conmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void conmemPreDestruct_DISPATCH(struct ConsoleMemory *pResource) {
|
||||||
|
pResource->__conmemPreDestruct__(pResource);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemIsDuplicate_DISPATCH(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) {
|
||||||
|
return pMemory->__conmemIsDuplicate__(pMemory, hMemory, pDuplicate);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void conmemControlSerialization_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
|
||||||
|
pResource->__conmemControlSerialization_Epilogue__(pResource, pCallContext, pParams);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NV_STATUS conmemMap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) {
|
||||||
|
return pMemory->__conmemMap__(pMemory, pCallContext, pParams, pCpuMapping);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline NvBool conmemAccessCallback_DISPATCH(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) {
|
||||||
|
return pResource->__conmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight);
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS conmemConstruct_IMPL(struct ConsoleMemory *arg_pConsoleMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams);
|
||||||
|
|
||||||
|
#define __nvoc_conmemConstruct(arg_pConsoleMemory, arg_pCallContext, arg_pParams) conmemConstruct_IMPL(arg_pConsoleMemory, arg_pCallContext, arg_pParams)
|
||||||
|
#undef PRIVATE_FIELD
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
} // extern "C"
|
||||||
|
#endif
|
||||||
|
#endif // _G_CONSOLE_MEM_NVOC_H_
|
||||||
163
src/nvidia/generated/g_disp_console_mem_nvoc.c
Normal file
163
src/nvidia/generated/g_disp_console_mem_nvoc.c
Normal file
@@ -0,0 +1,163 @@
|
|||||||
|
#define NVOC_DISP_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
|
||||||
|
#include "nvoc/runtime.h"
|
||||||
|
#include "nvoc/rtti.h"
|
||||||
|
#include "nvtypes.h"
|
||||||
|
#include "nvport/nvport.h"
|
||||||
|
#include "nvport/inline/util_valist.h"
|
||||||
|
#include "utils/nvassert.h"
|
||||||
|
#include "g_disp_console_mem_nvoc.h"
|
||||||
|
|
||||||
|
#ifdef DEBUG
|
||||||
|
char __nvoc_class_id_uniqueness_check_0x0f96d3 = 1;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayConsoleMemory;
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
|
||||||
|
|
||||||
|
void __nvoc_init_DisplayConsoleMemory(DisplayConsoleMemory*);
|
||||||
|
void __nvoc_init_funcTable_DisplayConsoleMemory(DisplayConsoleMemory*);
|
||||||
|
NV_STATUS __nvoc_ctor_DisplayConsoleMemory(DisplayConsoleMemory*);
|
||||||
|
void __nvoc_init_dataField_DisplayConsoleMemory(DisplayConsoleMemory*);
|
||||||
|
void __nvoc_dtor_DisplayConsoleMemory(DisplayConsoleMemory*);
|
||||||
|
extern const struct NVOC_EXPORT_INFO __nvoc_export_info_DisplayConsoleMemory;
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_DisplayConsoleMemory_DisplayConsoleMemory = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_DisplayConsoleMemory,
|
||||||
|
/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_DisplayConsoleMemory,
|
||||||
|
/*offset=*/ 0,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_RTTI __nvoc_rtti_DisplayConsoleMemory_Object = {
|
||||||
|
/*pClassDef=*/ &__nvoc_class_def_Object,
|
||||||
|
/*dtor=*/ &__nvoc_destructFromBase,
|
||||||
|
/*offset=*/ NV_OFFSETOF(DisplayConsoleMemory, __nvoc_base_Object),
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct NVOC_CASTINFO __nvoc_castinfo_DisplayConsoleMemory = {
|
||||||
|
/*numRelatives=*/ 2,
|
||||||
|
/*relatives=*/ {
|
||||||
|
&__nvoc_rtti_DisplayConsoleMemory_DisplayConsoleMemory,
|
||||||
|
&__nvoc_rtti_DisplayConsoleMemory_Object,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayConsoleMemory =
|
||||||
|
{
|
||||||
|
/*classInfo=*/ {
|
||||||
|
/*size=*/ sizeof(DisplayConsoleMemory),
|
||||||
|
/*classId=*/ classId(DisplayConsoleMemory),
|
||||||
|
/*providerId=*/ &__nvoc_rtti_provider,
|
||||||
|
#if NV_PRINTF_STRINGS_ALLOWED
|
||||||
|
/*name=*/ "DisplayConsoleMemory",
|
||||||
|
#endif
|
||||||
|
},
|
||||||
|
/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_DisplayConsoleMemory,
|
||||||
|
/*pCastInfo=*/ &__nvoc_castinfo_DisplayConsoleMemory,
|
||||||
|
/*pExportInfo=*/ &__nvoc_export_info_DisplayConsoleMemory
|
||||||
|
};
|
||||||
|
|
||||||
|
const struct NVOC_EXPORT_INFO __nvoc_export_info_DisplayConsoleMemory =
|
||||||
|
{
|
||||||
|
/*numEntries=*/ 0,
|
||||||
|
/*pExportEntries=*/ 0
|
||||||
|
};
|
||||||
|
|
||||||
|
void __nvoc_dtor_Object(Object*);
|
||||||
|
void __nvoc_dtor_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
|
||||||
|
__nvoc_consolememDestruct(pThis);
|
||||||
|
__nvoc_dtor_Object(&pThis->__nvoc_base_Object);
|
||||||
|
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_dataField_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
|
||||||
|
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_ctor_Object(Object* );
|
||||||
|
NV_STATUS __nvoc_ctor_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
|
||||||
|
NV_STATUS status = NV_OK;
|
||||||
|
status = __nvoc_ctor_Object(&pThis->__nvoc_base_Object);
|
||||||
|
if (status != NV_OK) goto __nvoc_ctor_DisplayConsoleMemory_fail_Object;
|
||||||
|
__nvoc_init_dataField_DisplayConsoleMemory(pThis);
|
||||||
|
|
||||||
|
status = __nvoc_consolememConstruct(pThis);
|
||||||
|
if (status != NV_OK) goto __nvoc_ctor_DisplayConsoleMemory_fail__init;
|
||||||
|
goto __nvoc_ctor_DisplayConsoleMemory_exit; // Success
|
||||||
|
|
||||||
|
__nvoc_ctor_DisplayConsoleMemory_fail__init:
|
||||||
|
__nvoc_dtor_Object(&pThis->__nvoc_base_Object);
|
||||||
|
__nvoc_ctor_DisplayConsoleMemory_fail_Object:
|
||||||
|
__nvoc_ctor_DisplayConsoleMemory_exit:
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __nvoc_init_funcTable_DisplayConsoleMemory_1(DisplayConsoleMemory *pThis) {
|
||||||
|
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_funcTable_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
|
||||||
|
__nvoc_init_funcTable_DisplayConsoleMemory_1(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_Object(Object*);
|
||||||
|
void __nvoc_init_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
|
||||||
|
pThis->__nvoc_pbase_DisplayConsoleMemory = pThis;
|
||||||
|
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Object;
|
||||||
|
__nvoc_init_Object(&pThis->__nvoc_base_Object);
|
||||||
|
__nvoc_init_funcTable_DisplayConsoleMemory(pThis);
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreate_DisplayConsoleMemory(DisplayConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags) {
|
||||||
|
NV_STATUS status;
|
||||||
|
Object *pParentObj;
|
||||||
|
DisplayConsoleMemory *pThis;
|
||||||
|
|
||||||
|
status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(DisplayConsoleMemory), (void**)&pThis, (void**)ppThis);
|
||||||
|
if (status != NV_OK)
|
||||||
|
return status;
|
||||||
|
|
||||||
|
portMemSet(pThis, 0, sizeof(DisplayConsoleMemory));
|
||||||
|
|
||||||
|
__nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_DisplayConsoleMemory);
|
||||||
|
|
||||||
|
pThis->__nvoc_base_Object.createFlags = createFlags;
|
||||||
|
|
||||||
|
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
|
||||||
|
{
|
||||||
|
pParentObj = dynamicCast(pParent, Object);
|
||||||
|
objAddChild(pParentObj, &pThis->__nvoc_base_Object);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
pThis->__nvoc_base_Object.pParent = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
__nvoc_init_DisplayConsoleMemory(pThis);
|
||||||
|
status = __nvoc_ctor_DisplayConsoleMemory(pThis);
|
||||||
|
if (status != NV_OK) goto __nvoc_objCreate_DisplayConsoleMemory_cleanup;
|
||||||
|
|
||||||
|
*ppThis = pThis;
|
||||||
|
|
||||||
|
return NV_OK;
|
||||||
|
|
||||||
|
__nvoc_objCreate_DisplayConsoleMemory_cleanup:
|
||||||
|
// do not call destructors here since the constructor already called them
|
||||||
|
if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
|
||||||
|
portMemSet(pThis, 0, sizeof(DisplayConsoleMemory));
|
||||||
|
else
|
||||||
|
portMemFree(pThis);
|
||||||
|
|
||||||
|
// coverity[leaked_storage:FALSE]
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreateDynamic_DisplayConsoleMemory(DisplayConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
|
||||||
|
NV_STATUS status;
|
||||||
|
|
||||||
|
status = __nvoc_objCreate_DisplayConsoleMemory(ppThis, pParent, createFlags);
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
174
src/nvidia/generated/g_disp_console_mem_nvoc.h
Normal file
174
src/nvidia/generated/g_disp_console_mem_nvoc.h
Normal file
@@ -0,0 +1,174 @@
|
|||||||
|
#ifndef _G_DISP_CONSOLE_MEM_NVOC_H_
|
||||||
|
#define _G_DISP_CONSOLE_MEM_NVOC_H_
|
||||||
|
#include "nvoc/runtime.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
|
* SPDX-License-Identifier: MIT
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "g_disp_console_mem_nvoc.h"
|
||||||
|
|
||||||
|
#ifndef DISPLAY_CONSOLE_MEMORY_H
|
||||||
|
#define DISPLAY_CONSOLE_MEMORY_H
|
||||||
|
|
||||||
|
/* ------------------------ Includes --------------------------------------- */
|
||||||
|
#include "nvtypes.h"
|
||||||
|
#include "nvoc/utility.h"
|
||||||
|
#include "gpu/disp/kern_disp.h"
|
||||||
|
#include "gpu/mem_mgr/mem_desc.h"
|
||||||
|
|
||||||
|
/* ------------------------ Forward Declaration ---------------------------- */
|
||||||
|
|
||||||
|
/* ------------------------ Macros & Defines ------------------------------- */
|
||||||
|
#define KERNEL_DISPLAY_GET_CONSOLE_MEM(p) ((p)->pConsoleMem)
|
||||||
|
|
||||||
|
/* ------------------------ Types definitions ------------------------------ */
|
||||||
|
|
||||||
|
#ifdef NVOC_DISP_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
|
||||||
|
#define PRIVATE_FIELD(x) x
|
||||||
|
#else
|
||||||
|
#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
|
||||||
|
#endif
|
||||||
|
struct DisplayConsoleMemory {
|
||||||
|
const struct NVOC_RTTI *__nvoc_rtti;
|
||||||
|
struct Object __nvoc_base_Object;
|
||||||
|
struct Object *__nvoc_pbase_Object;
|
||||||
|
struct DisplayConsoleMemory *__nvoc_pbase_DisplayConsoleMemory;
|
||||||
|
NV_ADDRESS_SPACE consoleMemAddrSpace;
|
||||||
|
NvU32 consoleMemAttr;
|
||||||
|
NvU64 consoleMemBaseAddress;
|
||||||
|
NvU64 consoleMemSize;
|
||||||
|
MEMORY_DESCRIPTOR *pConsoleMemDesc;
|
||||||
|
void *pConsoleMem;
|
||||||
|
};
|
||||||
|
|
||||||
|
#ifndef __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
|
||||||
|
#define __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
|
||||||
|
typedef struct DisplayConsoleMemory DisplayConsoleMemory;
|
||||||
|
#endif /* __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__ */
|
||||||
|
|
||||||
|
#ifndef __nvoc_class_id_DisplayConsoleMemory
|
||||||
|
#define __nvoc_class_id_DisplayConsoleMemory 0x0f96d3
|
||||||
|
#endif /* __nvoc_class_id_DisplayConsoleMemory */
|
||||||
|
|
||||||
|
extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayConsoleMemory;
|
||||||
|
|
||||||
|
#define __staticCast_DisplayConsoleMemory(pThis) \
|
||||||
|
((pThis)->__nvoc_pbase_DisplayConsoleMemory)
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
#define __dynamicCast_DisplayConsoleMemory(pThis) ((DisplayConsoleMemory*)NULL)
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define __dynamicCast_DisplayConsoleMemory(pThis) \
|
||||||
|
((DisplayConsoleMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DisplayConsoleMemory)))
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreateDynamic_DisplayConsoleMemory(DisplayConsoleMemory**, Dynamic*, NvU32, va_list);
|
||||||
|
|
||||||
|
NV_STATUS __nvoc_objCreate_DisplayConsoleMemory(DisplayConsoleMemory**, Dynamic*, NvU32);
|
||||||
|
#define __objCreate_DisplayConsoleMemory(ppNewObj, pParent, createFlags) \
|
||||||
|
__nvoc_objCreate_DisplayConsoleMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
|
||||||
|
|
||||||
|
NV_STATUS consolememConstruct_IMPL(struct DisplayConsoleMemory *arg_pConsoleMem);
|
||||||
|
|
||||||
|
#define __nvoc_consolememConstruct(arg_pConsoleMem) consolememConstruct_IMPL(arg_pConsoleMem)
|
||||||
|
void consolememDestruct_IMPL(struct DisplayConsoleMemory *pConsoleMem);
|
||||||
|
|
||||||
|
#define __nvoc_consolememDestruct(pConsoleMem) consolememDestruct_IMPL(pConsoleMem)
|
||||||
|
NV_STATUS consolememStateInitLocked_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem);
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
static inline NV_STATUS consolememStateInitLocked(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
|
||||||
|
return NV_ERR_NOT_SUPPORTED;
|
||||||
|
}
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define consolememStateInitLocked(pGpu, pConsoleMem) consolememStateInitLocked_IMPL(pGpu, pConsoleMem)
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
void consolememStateDestroy_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem);
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
static inline void consolememStateDestroy(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
|
||||||
|
}
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define consolememStateDestroy(pGpu, pConsoleMem) consolememStateDestroy_IMPL(pGpu, pConsoleMem)
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
NV_STATUS consolememStateLoad_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags);
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
static inline NV_STATUS consolememStateLoad(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
|
||||||
|
return NV_ERR_NOT_SUPPORTED;
|
||||||
|
}
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define consolememStateLoad(pGpu, pConsoleMem, flags) consolememStateLoad_IMPL(pGpu, pConsoleMem, flags)
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
NV_STATUS consolememStateUnload_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags);
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
static inline NV_STATUS consolememStateUnload(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
|
||||||
|
return NV_ERR_NOT_SUPPORTED;
|
||||||
|
}
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define consolememStateUnload(pGpu, pConsoleMem, flags) consolememStateUnload_IMPL(pGpu, pConsoleMem, flags)
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
PMEMORY_DESCRIPTOR consolememGetMemDesc_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem);
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
static inline PMEMORY_DESCRIPTOR consolememGetMemDesc(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define consolememGetMemDesc(pGpu, pConsoleMem) consolememGetMemDesc_IMPL(pGpu, pConsoleMem)
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
void consolememSetMemory_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU64 memoryRegionBaseAddress, NvU64 memoryRegionSize);
|
||||||
|
|
||||||
|
#ifdef __nvoc_disp_console_mem_h_disabled
|
||||||
|
static inline void consolememSetMemory(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU64 memoryRegionBaseAddress, NvU64 memoryRegionSize) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
|
||||||
|
}
|
||||||
|
#else //__nvoc_disp_console_mem_h_disabled
|
||||||
|
#define consolememSetMemory(pGpu, pConsoleMem, memoryRegionBaseAddress, memoryRegionSize) consolememSetMemory_IMPL(pGpu, pConsoleMem, memoryRegionBaseAddress, memoryRegionSize)
|
||||||
|
#endif //__nvoc_disp_console_mem_h_disabled
|
||||||
|
|
||||||
|
#undef PRIVATE_FIELD
|
||||||
|
|
||||||
|
|
||||||
|
#endif // DISPLAY_CONSOLE_MEMORY_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
} // extern "C"
|
||||||
|
#endif
|
||||||
|
#endif // _G_DISP_CONSOLE_MEM_NVOC_H_
|
||||||
@@ -572,6 +572,18 @@ typedef struct DisplayInstanceMemory DisplayInstanceMemory;
|
|||||||
#endif /* __nvoc_class_id_DisplayInstanceMemory */
|
#endif /* __nvoc_class_id_DisplayInstanceMemory */
|
||||||
|
|
||||||
|
|
||||||
|
struct DisplayConsoleMemory;
|
||||||
|
|
||||||
|
#ifndef __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
|
||||||
|
#define __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
|
||||||
|
typedef struct DisplayConsoleMemory DisplayConsoleMemory;
|
||||||
|
#endif /* __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__ */
|
||||||
|
|
||||||
|
#ifndef __nvoc_class_id_DisplayConsoleMemory
|
||||||
|
#define __nvoc_class_id_DisplayConsoleMemory 0x0f96d3
|
||||||
|
#endif /* __nvoc_class_id_DisplayConsoleMemory */
|
||||||
|
|
||||||
|
|
||||||
struct KernelHead;
|
struct KernelHead;
|
||||||
|
|
||||||
#ifndef __NVOC_CLASS_KernelHead_TYPEDEF__
|
#ifndef __NVOC_CLASS_KernelHead_TYPEDEF__
|
||||||
@@ -1380,6 +1392,7 @@ typedef struct OBJGMMU OBJGMMU;
|
|||||||
#define ENG_DPU MKENGDESC(classId(OBJDPU), 0)
|
#define ENG_DPU MKENGDESC(classId(OBJDPU), 0)
|
||||||
#define ENG_FAN MKENGDESC(classId(Fan), 0)
|
#define ENG_FAN MKENGDESC(classId(Fan), 0)
|
||||||
#define ENG_INST MKENGDESC(classId(DisplayInstanceMemory), 0)
|
#define ENG_INST MKENGDESC(classId(DisplayInstanceMemory), 0)
|
||||||
|
#define ENG_CONSOLE_MEM MKENGDESC(classId(DisplayConsoleMemory), 0)
|
||||||
#define ENG_KERNEL_HEAD MKENGDESC(classId(KernelHead), 0)
|
#define ENG_KERNEL_HEAD MKENGDESC(classId(KernelHead), 0)
|
||||||
#define ENG_VOLT MKENGDESC(classId(OBJVOLT), 0)
|
#define ENG_VOLT MKENGDESC(classId(OBJVOLT), 0)
|
||||||
#define ENG_INTR MKENGDESC(classId(Intr), 0)
|
#define ENG_INTR MKENGDESC(classId(Intr), 0)
|
||||||
|
|||||||
@@ -115,6 +115,7 @@ struct KernelDisplay {
|
|||||||
NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE;
|
NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE;
|
||||||
NvBool PDB_PROP_KDISP_IN_AWAKEN_INTR;
|
NvBool PDB_PROP_KDISP_IN_AWAKEN_INTR;
|
||||||
struct DisplayInstanceMemory *pInst;
|
struct DisplayInstanceMemory *pInst;
|
||||||
|
struct DisplayConsoleMemory *pConsoleMem;
|
||||||
struct KernelHead *pKernelHead[4];
|
struct KernelHead *pKernelHead[4];
|
||||||
const KernelDisplayStaticInfo *pStaticInfo;
|
const KernelDisplayStaticInfo *pStaticInfo;
|
||||||
NvBool bWarPurgeSatellitesOnCoreFree;
|
NvBool bWarPurgeSatellitesOnCoreFree;
|
||||||
@@ -208,6 +209,33 @@ static inline void kdispDestructInstMem(struct KernelDisplay *pKernelDisplay) {
|
|||||||
|
|
||||||
#define kdispDestructInstMem_HAL(pKernelDisplay) kdispDestructInstMem(pKernelDisplay)
|
#define kdispDestructInstMem_HAL(pKernelDisplay) kdispDestructInstMem(pKernelDisplay)
|
||||||
|
|
||||||
|
NV_STATUS kdispConstructConsoleMem_IMPL(struct KernelDisplay *pKernelDisplay);
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __nvoc_kern_disp_h_disabled
|
||||||
|
static inline NV_STATUS kdispConstructConsoleMem(struct KernelDisplay *pKernelDisplay) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!");
|
||||||
|
return NV_ERR_NOT_SUPPORTED;
|
||||||
|
}
|
||||||
|
#else //__nvoc_kern_disp_h_disabled
|
||||||
|
#define kdispConstructConsoleMem(pKernelDisplay) kdispConstructConsoleMem_IMPL(pKernelDisplay)
|
||||||
|
#endif //__nvoc_kern_disp_h_disabled
|
||||||
|
|
||||||
|
#define kdispConstructConsoleMem_HAL(pKernelDisplay) kdispConstructConsoleMem(pKernelDisplay)
|
||||||
|
|
||||||
|
void kdispDestructConsoleMem_IMPL(struct KernelDisplay *pKernelDisplay);
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef __nvoc_kern_disp_h_disabled
|
||||||
|
static inline void kdispDestructConsoleMem(struct KernelDisplay *pKernelDisplay) {
|
||||||
|
NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!");
|
||||||
|
}
|
||||||
|
#else //__nvoc_kern_disp_h_disabled
|
||||||
|
#define kdispDestructConsoleMem(pKernelDisplay) kdispDestructConsoleMem_IMPL(pKernelDisplay)
|
||||||
|
#endif //__nvoc_kern_disp_h_disabled
|
||||||
|
|
||||||
|
#define kdispDestructConsoleMem_HAL(pKernelDisplay) kdispDestructConsoleMem(pKernelDisplay)
|
||||||
|
|
||||||
NV_STATUS kdispSelectClass_v03_00_KERNEL(struct OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass);
|
NV_STATUS kdispSelectClass_v03_00_KERNEL(struct OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass);
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -387,6 +387,17 @@ typedef struct SyncpointMemory SyncpointMemory;
|
|||||||
#define __nvoc_class_id_SyncpointMemory 0x529def
|
#define __nvoc_class_id_SyncpointMemory 0x529def
|
||||||
#endif /* __nvoc_class_id_SyncpointMemory */
|
#endif /* __nvoc_class_id_SyncpointMemory */
|
||||||
|
|
||||||
|
struct ConsoleMemory;
|
||||||
|
|
||||||
|
#ifndef __NVOC_CLASS_ConsoleMemory_TYPEDEF__
|
||||||
|
#define __NVOC_CLASS_ConsoleMemory_TYPEDEF__
|
||||||
|
typedef struct ConsoleMemory ConsoleMemory;
|
||||||
|
#endif /* __NVOC_CLASS_ConsoleMemory_TYPEDEF__ */
|
||||||
|
|
||||||
|
#ifndef __nvoc_class_id_ConsoleMemory
|
||||||
|
#define __nvoc_class_id_ConsoleMemory 0xaac69e
|
||||||
|
#endif /* __nvoc_class_id_ConsoleMemory */
|
||||||
|
|
||||||
struct DispSfUser;
|
struct DispSfUser;
|
||||||
|
|
||||||
#ifndef __NVOC_CLASS_DispSfUser_TYPEDEF__
|
#ifndef __NVOC_CLASS_DispSfUser_TYPEDEF__
|
||||||
@@ -502,6 +513,7 @@ struct NVOCFwdDeclHack {
|
|||||||
struct SystemMemory *PRIVATE_FIELD(SystemMemory_NV01_MEMORY_SYSTEM);
|
struct SystemMemory *PRIVATE_FIELD(SystemMemory_NV01_MEMORY_SYSTEM);
|
||||||
struct OsDescMemory *PRIVATE_FIELD(OsDescMemory_NV01_MEMORY_SYSTEM_OS_DESCRIPTOR);
|
struct OsDescMemory *PRIVATE_FIELD(OsDescMemory_NV01_MEMORY_SYSTEM_OS_DESCRIPTOR);
|
||||||
struct SyncpointMemory *PRIVATE_FIELD(SyncpointMemory_NV01_MEMORY_SYNCPOINT);
|
struct SyncpointMemory *PRIVATE_FIELD(SyncpointMemory_NV01_MEMORY_SYNCPOINT);
|
||||||
|
struct ConsoleMemory *PRIVATE_FIELD(ConsoleMemory_NV01_MEMORY_FRAMEBUFFER_CONSOLE);
|
||||||
struct DispSfUser *PRIVATE_FIELD(DispSfUser_NVC671_DISP_SF_USER);
|
struct DispSfUser *PRIVATE_FIELD(DispSfUser_NVC671_DISP_SF_USER);
|
||||||
struct NvDispApi *PRIVATE_FIELD(NvDispApi_NVC670_DISPLAY);
|
struct NvDispApi *PRIVATE_FIELD(NvDispApi_NVC670_DISPLAY);
|
||||||
struct DispSwObj *PRIVATE_FIELD(DispSwObj_NVC372_DISPLAY_SW);
|
struct DispSwObj *PRIVATE_FIELD(DispSwObj_NVC372_DISPLAY_SW);
|
||||||
|
|||||||
@@ -303,7 +303,7 @@
|
|||||||
#define RMCFG_CLASS_NV01_MEMORY_SYNCPOINT 1
|
#define RMCFG_CLASS_NV01_MEMORY_SYNCPOINT 1
|
||||||
#define RMCFG_CLASS_NV01_MEMORY_SYSTEM_OS_DESCRIPTOR 1
|
#define RMCFG_CLASS_NV01_MEMORY_SYSTEM_OS_DESCRIPTOR 1
|
||||||
#define RMCFG_CLASS_NV01_MEMORY_DEVICELESS 0
|
#define RMCFG_CLASS_NV01_MEMORY_DEVICELESS 0
|
||||||
#define RMCFG_CLASS_NV01_MEMORY_FRAMEBUFFER_CONSOLE 0
|
#define RMCFG_CLASS_NV01_MEMORY_FRAMEBUFFER_CONSOLE 1
|
||||||
#define RMCFG_CLASS_NV01_MEMORY_HW_RESOURCES 0
|
#define RMCFG_CLASS_NV01_MEMORY_HW_RESOURCES 0
|
||||||
#define RMCFG_CLASS_NV01_MEMORY_LIST_SYSTEM 0
|
#define RMCFG_CLASS_NV01_MEMORY_LIST_SYSTEM 0
|
||||||
#define RMCFG_CLASS_NV01_MEMORY_LIST_FBMEM 0
|
#define RMCFG_CLASS_NV01_MEMORY_LIST_FBMEM 0
|
||||||
@@ -528,6 +528,7 @@
|
|||||||
#define RMCFG_MODULE_SF 1 // Display component: Serial Formatter, output protocol formatting
|
#define RMCFG_MODULE_SF 1 // Display component: Serial Formatter, output protocol formatting
|
||||||
#define RMCFG_MODULE_DISPLAY_INSTANCE_MEMORY 1
|
#define RMCFG_MODULE_DISPLAY_INSTANCE_MEMORY 1
|
||||||
#define RMCFG_MODULE_KERNEL_HEAD 1
|
#define RMCFG_MODULE_KERNEL_HEAD 1
|
||||||
|
#define RMCFG_MODULE_DISPLAY_CONSOLE_MEMORY 1
|
||||||
#define RMCFG_MODULE_INTR 0
|
#define RMCFG_MODULE_INTR 0
|
||||||
#define RMCFG_MODULE_MC 0
|
#define RMCFG_MODULE_MC 0
|
||||||
#define RMCFG_MODULE_KERNEL_MC 0 // Master Control-related code needed in Kernel RM
|
#define RMCFG_MODULE_KERNEL_MC 0 // Master Control-related code needed in Kernel RM
|
||||||
|
|||||||
@@ -0,0 +1,3 @@
|
|||||||
|
|
||||||
|
#include "g_disp_console_mem_nvoc.h"
|
||||||
|
|
||||||
3
src/nvidia/inc/kernel/mem_mgr/console_mem.h
Normal file
3
src/nvidia/inc/kernel/mem_mgr/console_mem.h
Normal file
@@ -0,0 +1,3 @@
|
|||||||
|
|
||||||
|
#include "g_console_mem_nvoc.h"
|
||||||
|
|
||||||
224
src/nvidia/src/kernel/gpu/disp/console_mem/disp_console_mem.c
Normal file
224
src/nvidia/src/kernel/gpu/disp/console_mem/disp_console_mem.c
Normal file
@@ -0,0 +1,224 @@
|
|||||||
|
/*
|
||||||
|
* SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
|
* SPDX-License-Identifier: MIT
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**************************** Instmem Routines *****************************\
|
||||||
|
* *
|
||||||
|
* Display console memory object function Definitions. *
|
||||||
|
* *
|
||||||
|
\***************************************************************************/
|
||||||
|
|
||||||
|
#define RM_STRICT_CONFIG_EMIT_DISP_ENGINE_DEFINITIONS 0
|
||||||
|
|
||||||
|
#include "gpu/disp/kern_disp.h"
|
||||||
|
#include "gpu/disp/console_mem/disp_console_mem.h"
|
||||||
|
#include "gpu/mem_mgr/mem_mgr.h"
|
||||||
|
#include "os/nv_memory_type.h"
|
||||||
|
|
||||||
|
|
||||||
|
/*! @brief Constructor */
|
||||||
|
NV_STATUS
|
||||||
|
consolememConstruct_IMPL
|
||||||
|
(
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
pConsoleMem->pConsoleMem = NULL;
|
||||||
|
pConsoleMem->pConsoleMemDesc = NULL;
|
||||||
|
|
||||||
|
return NV_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/*! @brief destructor */
|
||||||
|
void
|
||||||
|
consolememDestruct_IMPL
|
||||||
|
(
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
// Free up the console mem descriptors
|
||||||
|
memdescDestroy(pConsoleMem->pConsoleMemDesc);
|
||||||
|
pConsoleMem->pConsoleMemDesc = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*! @brief Set console memory params */
|
||||||
|
void
|
||||||
|
consolememSetMemory_IMPL
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem,
|
||||||
|
NvU64 memoryRegionBaseAddress,
|
||||||
|
NvU64 memoryRegionSize
|
||||||
|
)
|
||||||
|
{
|
||||||
|
pConsoleMem->consoleMemBaseAddress = memoryRegionBaseAddress;
|
||||||
|
pConsoleMem->consoleMemSize = memoryRegionSize;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*! @brief Initialize console memory descriptor */
|
||||||
|
static NV_STATUS
|
||||||
|
consolememInitMemDesc
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
NV_STATUS status = NV_OK;
|
||||||
|
MEMORY_DESCRIPTOR *pMemDesc = NULL;
|
||||||
|
RmPhysAddr *pPteArray = NULL;
|
||||||
|
|
||||||
|
if (pGpu->getProperty(pGpu, PDB_PROP_GPU_TEGRA_SOC_NVDISPLAY))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// FB reserved memory logic not be getting called for Tegra system memory scanout.
|
||||||
|
// So as ConsoleMem Desc is not getting initialized, currently hardcoding
|
||||||
|
// dispConsoleMemAttr to NV_MEMORY_UNCACHED this needs to be set based on system configuration/registry parameter.
|
||||||
|
//
|
||||||
|
pConsoleMem->consoleMemAttr = NV_MEMORY_UNCACHED;
|
||||||
|
pConsoleMem->consoleMemAddrSpace = ADDR_SYSMEM;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
NV_PRINTF(LEVEL_ERROR, "DisplayConsoleMemory is not supported for non Tegra SOC Display yet.\n");
|
||||||
|
NV_ASSERT(0);
|
||||||
|
status = NV_ERR_NOT_SUPPORTED;
|
||||||
|
goto exit;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (pConsoleMem->consoleMemAddrSpace)
|
||||||
|
{
|
||||||
|
default:
|
||||||
|
case ADDR_FBMEM:
|
||||||
|
{
|
||||||
|
NV_PRINTF(LEVEL_ERROR, "DisplayConsoleMemory is not supported for ADDR_FBMEM address space yet.\n");
|
||||||
|
NV_ASSERT(0);
|
||||||
|
status = NV_ERR_NOT_SUPPORTED;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case ADDR_SYSMEM:
|
||||||
|
{
|
||||||
|
if (pConsoleMem->consoleMemSize > 0)
|
||||||
|
{
|
||||||
|
NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR,
|
||||||
|
memdescCreate(&pConsoleMem->pConsoleMemDesc, pGpu,
|
||||||
|
pConsoleMem->consoleMemSize,
|
||||||
|
RM_PAGE_SIZE,
|
||||||
|
NV_MEMORY_CONTIGUOUS, pConsoleMem->consoleMemAddrSpace,
|
||||||
|
pConsoleMem->consoleMemAttr,
|
||||||
|
MEMDESC_FLAGS_SKIP_RESOURCE_COMPUTE),
|
||||||
|
exit);
|
||||||
|
|
||||||
|
pMemDesc = pConsoleMem->pConsoleMemDesc;
|
||||||
|
memdescSetAddress(pMemDesc, NvP64_NULL);
|
||||||
|
memdescSetMemData(pMemDesc, NULL, NULL);
|
||||||
|
memdescSetFlag(pMemDesc, MEMDESC_FLAGS_SKIP_IOMMU_MAPPING, NV_TRUE);
|
||||||
|
pPteArray = memdescGetPteArray(pMemDesc, AT_GPU);
|
||||||
|
pPteArray[0] = pConsoleMem->consoleMemBaseAddress;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
exit:
|
||||||
|
// Clean-up is handled by the caller
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*! @brief Free all memory allocations done for display console memory */
|
||||||
|
static void
|
||||||
|
consolememDestroy
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
// Free up the console mem descriptors
|
||||||
|
memdescDestroy(pConsoleMem->pConsoleMemDesc);
|
||||||
|
pConsoleMem->pConsoleMemDesc = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS
|
||||||
|
consolememStateInitLocked_IMPL
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
NV_STATUS status = NV_OK;
|
||||||
|
// Memory descriptor has to be created in StateInit call and not in Construct call
|
||||||
|
// because console memory region parameters are read from linux kernel after
|
||||||
|
// construct call.
|
||||||
|
NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR,
|
||||||
|
consolememInitMemDesc(pGpu, pConsoleMem), exit);
|
||||||
|
|
||||||
|
exit:
|
||||||
|
if (status != NV_OK)
|
||||||
|
{
|
||||||
|
consolememDestroy(pGpu, pConsoleMem);
|
||||||
|
}
|
||||||
|
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
consolememStateDestroy_IMPL
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
consolememDestroy(pGpu, pConsoleMem);
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS
|
||||||
|
consolememStateLoad_IMPL
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem,
|
||||||
|
NvU32 flags
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return NV_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS
|
||||||
|
consolememStateUnload_IMPL
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem,
|
||||||
|
NvU32 flags
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return NV_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
PMEMORY_DESCRIPTOR
|
||||||
|
consolememGetMemDesc_IMPL
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu,
|
||||||
|
DisplayConsoleMemory *pConsoleMem
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return pConsoleMem->pConsoleMemDesc;
|
||||||
|
}
|
||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -39,6 +39,7 @@
|
|||||||
#include "gpu/device/device.h"
|
#include "gpu/device/device.h"
|
||||||
#include "gpu/disp/kern_disp.h"
|
#include "gpu/disp/kern_disp.h"
|
||||||
#include "gpu/disp/inst_mem/disp_inst_mem.h"
|
#include "gpu/disp/inst_mem/disp_inst_mem.h"
|
||||||
|
#include "gpu/disp/console_mem/disp_console_mem.h"
|
||||||
#include "gpu/disp/head/kernel_head.h"
|
#include "gpu/disp/head/kernel_head.h"
|
||||||
#include "gpu/disp/disp_objs.h"
|
#include "gpu/disp/disp_objs.h"
|
||||||
#include "gpu_mgr/gpu_mgr.h"
|
#include "gpu_mgr/gpu_mgr.h"
|
||||||
@@ -111,6 +112,13 @@ kdispConstructEngine_IMPL(OBJGPU *pGpu,
|
|||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
pKernelDisplay->pConsoleMem = NULL;
|
||||||
|
status = kdispConstructConsoleMem_HAL(pKernelDisplay);
|
||||||
|
if (status != NV_OK)
|
||||||
|
{
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
status = kdispConstructKhead(pKernelDisplay);
|
status = kdispConstructKhead(pKernelDisplay);
|
||||||
|
|
||||||
// We defer checking whether DISP has been disabled some other way until
|
// We defer checking whether DISP has been disabled some other way until
|
||||||
@@ -127,6 +135,7 @@ kdispDestruct_IMPL
|
|||||||
{
|
{
|
||||||
// Destroy children
|
// Destroy children
|
||||||
kdispDestructInstMem_HAL(pKernelDisplay);
|
kdispDestructInstMem_HAL(pKernelDisplay);
|
||||||
|
kdispDestructConsoleMem_HAL(pKernelDisplay);
|
||||||
kdispDestructKhead(pKernelDisplay);
|
kdispDestructKhead(pKernelDisplay);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -161,6 +170,37 @@ kdispDestructInstMem_IMPL
|
|||||||
pKernelDisplay->pInst = NULL;
|
pKernelDisplay->pInst = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*! Constructor for DisplayConsoleMemory */
|
||||||
|
NV_STATUS
|
||||||
|
kdispConstructConsoleMem_IMPL
|
||||||
|
(
|
||||||
|
KernelDisplay *pKernelDisplay
|
||||||
|
)
|
||||||
|
{
|
||||||
|
NV_STATUS status;
|
||||||
|
DisplayConsoleMemory *pConsole;
|
||||||
|
|
||||||
|
status = objCreate(&pConsole, pKernelDisplay, DisplayConsoleMemory);
|
||||||
|
if (status != NV_OK)
|
||||||
|
{
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
pKernelDisplay->pConsoleMem = pConsole;
|
||||||
|
|
||||||
|
return NV_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*! Destructor for DisplayConsoleMemory */
|
||||||
|
void
|
||||||
|
kdispDestructConsoleMem_IMPL
|
||||||
|
(
|
||||||
|
KernelDisplay *pKernelDisplay
|
||||||
|
)
|
||||||
|
{
|
||||||
|
objDelete(pKernelDisplay->pConsoleMem);
|
||||||
|
pKernelDisplay->pConsoleMem = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
/*! Constructor for Kernel head */
|
/*! Constructor for Kernel head */
|
||||||
NV_STATUS
|
NV_STATUS
|
||||||
kdispConstructKhead_IMPL
|
kdispConstructKhead_IMPL
|
||||||
@@ -448,6 +488,12 @@ kdispStateInitLocked_IMPL(OBJGPU *pGpu,
|
|||||||
instmemStateInitLocked(pGpu, pKernelDisplay->pInst), exit);
|
instmemStateInitLocked(pGpu, pKernelDisplay->pInst), exit);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (pKernelDisplay->pConsoleMem != NULL)
|
||||||
|
{
|
||||||
|
NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR,
|
||||||
|
consolememStateInitLocked(pGpu, pKernelDisplay->pConsoleMem), exit);
|
||||||
|
}
|
||||||
|
|
||||||
if (pKernelDisplay->getProperty(pKernelDisplay, PDB_PROP_KDISP_IMP_ENABLE))
|
if (pKernelDisplay->getProperty(pKernelDisplay, PDB_PROP_KDISP_IMP_ENABLE))
|
||||||
{
|
{
|
||||||
// NOTE: Fills IMP parameters and populate those to disp object in Tegra
|
// NOTE: Fills IMP parameters and populate those to disp object in Tegra
|
||||||
@@ -469,7 +515,10 @@ kdispStateDestroy_IMPL(OBJGPU *pGpu,
|
|||||||
{
|
{
|
||||||
instmemStateDestroy(pGpu, pKernelDisplay->pInst);
|
instmemStateDestroy(pGpu, pKernelDisplay->pInst);
|
||||||
}
|
}
|
||||||
|
if (pKernelDisplay->pConsoleMem != NULL)
|
||||||
|
{
|
||||||
|
consolememStateDestroy(pGpu, pKernelDisplay->pConsoleMem);
|
||||||
|
}
|
||||||
portMemFree((void*) pKernelDisplay->pStaticInfo);
|
portMemFree((void*) pKernelDisplay->pStaticInfo);
|
||||||
pKernelDisplay->pStaticInfo = NULL;
|
pKernelDisplay->pStaticInfo = NULL;
|
||||||
|
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
* SPDX-License-Identifier: MIT
|
* SPDX-License-Identifier: MIT
|
||||||
*
|
*
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
@@ -31,6 +31,7 @@
|
|||||||
#include "gpu/gpu.h"
|
#include "gpu/gpu.h"
|
||||||
#include "gpu/disp/kern_disp.h"
|
#include "gpu/disp/kern_disp.h"
|
||||||
#include "gpu/disp/inst_mem/disp_inst_mem.h"
|
#include "gpu/disp/inst_mem/disp_inst_mem.h"
|
||||||
|
#include "gpu/disp/console_mem/disp_console_mem.h"
|
||||||
#include "gpu/subdevice/subdevice.h"
|
#include "gpu/subdevice/subdevice.h"
|
||||||
#include "gpu/eng_desc.h"
|
#include "gpu/eng_desc.h"
|
||||||
#include "nv_ref.h"
|
#include "nv_ref.h"
|
||||||
@@ -3807,6 +3808,13 @@ gpuInitDispIpHal_IMPL
|
|||||||
pRmHalspecOwner);
|
pRmHalspecOwner);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void __nvoc_init_funcTable_DisplayConsoleMemory(DisplayConsoleMemory *, RmHalspecOwner *);
|
||||||
|
void __nvoc_init_dataField_DisplayConsoleMemory(DisplayConsoleMemory *, RmHalspecOwner *);
|
||||||
|
__nvoc_init_funcTable_DisplayConsoleMemory(KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay),
|
||||||
|
pRmHalspecOwner);
|
||||||
|
__nvoc_init_dataField_DisplayConsoleMemory(KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay),
|
||||||
|
pRmHalspecOwner);
|
||||||
|
|
||||||
return NV_OK;
|
return NV_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
98
src/nvidia/src/kernel/mem_mgr/console_mem.c
Normal file
98
src/nvidia/src/kernel/mem_mgr/console_mem.c
Normal file
@@ -0,0 +1,98 @@
|
|||||||
|
/*
|
||||||
|
* SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||||
|
* SPDX-License-Identifier: MIT
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "mem_mgr_internal.h"
|
||||||
|
#include "mem_mgr/console_mem.h"
|
||||||
|
#include "gpu/mem_mgr/mem_desc.h"
|
||||||
|
#include <gpu/disp/kern_disp.h>
|
||||||
|
#include <gpu/disp/console_mem/disp_console_mem.h>
|
||||||
|
#include "os/os.h"
|
||||||
|
#include "gpu/mem_mgr/mem_mgr.h"
|
||||||
|
#include "rmapi/client.h"
|
||||||
|
#include "virtualization/hypervisor/hypervisor.h"
|
||||||
|
|
||||||
|
#include "class/cl003e.h" // NV01_MEMORY_SYSTEM
|
||||||
|
#include "class/cl0040.h" // NV01_MEMORY_LOCAL_USER
|
||||||
|
|
||||||
|
static PMEMORY_DESCRIPTOR
|
||||||
|
_getDisplayConsoleMemDesc
|
||||||
|
(
|
||||||
|
OBJGPU *pGpu
|
||||||
|
)
|
||||||
|
{
|
||||||
|
MEMORY_DESCRIPTOR *pMemDesc = NULL;
|
||||||
|
|
||||||
|
KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
|
||||||
|
DisplayConsoleMemory *pConsoleMem = KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay);
|
||||||
|
|
||||||
|
pMemDesc = consolememGetMemDesc(pGpu, pConsoleMem);
|
||||||
|
|
||||||
|
return pMemDesc;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_STATUS
|
||||||
|
conmemConstruct_IMPL
|
||||||
|
(
|
||||||
|
ConsoleMemory *pConsoleMemory,
|
||||||
|
CALL_CONTEXT *pCallContext,
|
||||||
|
RS_RES_ALLOC_PARAMS_INTERNAL *pParams
|
||||||
|
)
|
||||||
|
{
|
||||||
|
NV_STATUS status = NV_OK;
|
||||||
|
Memory *pMemory = staticCast(pConsoleMemory, Memory);
|
||||||
|
OBJGPU *pGpu = pMemory->pGpu;
|
||||||
|
MEMORY_DESCRIPTOR *pMemDesc = _getDisplayConsoleMemDesc(pGpu);
|
||||||
|
|
||||||
|
NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED);
|
||||||
|
|
||||||
|
// Copy-construction has already been done by the base Memory class
|
||||||
|
if (RS_IS_COPY_CTOR(pParams))
|
||||||
|
return NV_OK;
|
||||||
|
|
||||||
|
if (pMemDesc == NULL)
|
||||||
|
{
|
||||||
|
return NV_ERR_INVALID_ARGUMENT;
|
||||||
|
}
|
||||||
|
|
||||||
|
NV_ASSERT(pMemDesc->Allocated == 0);
|
||||||
|
memdescAddRef(pMemDesc);
|
||||||
|
pMemDesc->DupCount++;
|
||||||
|
|
||||||
|
status = memConstructCommon(pMemory, NV01_MEMORY_SYSTEM, 0, pMemDesc,
|
||||||
|
0, NULL, 0, 0, 0, 0, NVOS32_MEM_TAG_NONE,
|
||||||
|
(HWRESOURCE_INFO *)NULL);
|
||||||
|
if (status != NV_OK)
|
||||||
|
{
|
||||||
|
memdescDestroy(pMemDesc);
|
||||||
|
}
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
NvBool
|
||||||
|
conmemCanCopy_IMPL
|
||||||
|
(
|
||||||
|
ConsoleMemory *pConsoleMemory
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return NV_TRUE;
|
||||||
|
}
|
||||||
@@ -181,6 +181,16 @@ RS_ENTRY(
|
|||||||
/* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT,
|
/* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT,
|
||||||
/* Flags */ RS_FLAGS_ALLOC_PRIVILEGED | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK,
|
/* Flags */ RS_FLAGS_ALLOC_PRIVILEGED | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK,
|
||||||
/* Required Access Rights */ RS_ACCESS_NONE
|
/* Required Access Rights */ RS_ACCESS_NONE
|
||||||
|
)
|
||||||
|
RS_ENTRY(
|
||||||
|
/* External Class */ NV01_MEMORY_FRAMEBUFFER_CONSOLE,
|
||||||
|
/* Internal Class */ ConsoleMemory,
|
||||||
|
/* Multi-Instance */ NV_TRUE,
|
||||||
|
/* Parents */ RS_LIST(classId(Device)),
|
||||||
|
/* Alloc Param Info */ RS_NONE,
|
||||||
|
/* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT,
|
||||||
|
/* Flags */ RS_FLAGS_ALLOC_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK,
|
||||||
|
/* Required Access Rights */ RS_ACCESS_NONE
|
||||||
)
|
)
|
||||||
/* Subdevice Children: */
|
/* Subdevice Children: */
|
||||||
RS_ENTRY(
|
RS_ENTRY(
|
||||||
|
|||||||
@@ -5,11 +5,13 @@ SRCS += generated/g_binary_api_nvoc.c
|
|||||||
SRCS += generated/g_chips2halspec_nvoc.c
|
SRCS += generated/g_chips2halspec_nvoc.c
|
||||||
SRCS += generated/g_client_nvoc.c
|
SRCS += generated/g_client_nvoc.c
|
||||||
SRCS += generated/g_client_resource_nvoc.c
|
SRCS += generated/g_client_resource_nvoc.c
|
||||||
|
SRCS += generated/g_console_mem_nvoc.c
|
||||||
SRCS += generated/g_context_dma_nvoc.c
|
SRCS += generated/g_context_dma_nvoc.c
|
||||||
SRCS += generated/g_dce_client_nvoc.c
|
SRCS += generated/g_dce_client_nvoc.c
|
||||||
SRCS += generated/g_device_nvoc.c
|
SRCS += generated/g_device_nvoc.c
|
||||||
SRCS += generated/g_disp_capabilities_nvoc.c
|
SRCS += generated/g_disp_capabilities_nvoc.c
|
||||||
SRCS += generated/g_disp_channel_nvoc.c
|
SRCS += generated/g_disp_channel_nvoc.c
|
||||||
|
SRCS += generated/g_disp_console_mem_nvoc.c
|
||||||
SRCS += generated/g_disp_inst_mem_nvoc.c
|
SRCS += generated/g_disp_inst_mem_nvoc.c
|
||||||
SRCS += generated/g_disp_objs_nvoc.c
|
SRCS += generated/g_disp_objs_nvoc.c
|
||||||
SRCS += generated/g_disp_sf_user_nvoc.c
|
SRCS += generated/g_disp_sf_user_nvoc.c
|
||||||
@@ -68,6 +70,7 @@ SRCS += arch/nvalloc/unix/src/osunix.c
|
|||||||
SRCS += arch/nvalloc/unix/src/power-management-tegra.c
|
SRCS += arch/nvalloc/unix/src/power-management-tegra.c
|
||||||
SRCS += arch/nvalloc/unix/src/registry.c
|
SRCS += arch/nvalloc/unix/src/registry.c
|
||||||
SRCS += arch/nvalloc/unix/src/rmobjexportimport.c
|
SRCS += arch/nvalloc/unix/src/rmobjexportimport.c
|
||||||
|
SRCS += arch/nvalloc/unix/src/unix_console.c
|
||||||
SRCS += interface/deprecated/rmapi_deprecated_utils.c
|
SRCS += interface/deprecated/rmapi_deprecated_utils.c
|
||||||
SRCS += interface/rmapi/src/g_finn_rm_api.c
|
SRCS += interface/rmapi/src/g_finn_rm_api.c
|
||||||
SRCS += src/kernel/core/hal/hal.c
|
SRCS += src/kernel/core/hal/hal.c
|
||||||
@@ -90,6 +93,7 @@ SRCS += src/kernel/gpu/device_ctrl.c
|
|||||||
SRCS += src/kernel/gpu/device_share.c
|
SRCS += src/kernel/gpu/device_share.c
|
||||||
SRCS += src/kernel/gpu/disp/arch/v03/kern_disp_0300.c
|
SRCS += src/kernel/gpu/disp/arch/v03/kern_disp_0300.c
|
||||||
SRCS += src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
|
SRCS += src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
|
||||||
|
SRCS += src/kernel/gpu/disp/console_mem/disp_console_mem.c
|
||||||
SRCS += src/kernel/gpu/disp/disp_capabilities.c
|
SRCS += src/kernel/gpu/disp/disp_capabilities.c
|
||||||
SRCS += src/kernel/gpu/disp/disp_channel.c
|
SRCS += src/kernel/gpu/disp/disp_channel.c
|
||||||
SRCS += src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
|
SRCS += src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
|
||||||
@@ -128,6 +132,7 @@ SRCS += src/kernel/gpu_mgr/gpu_db.c
|
|||||||
SRCS += src/kernel/gpu_mgr/gpu_group.c
|
SRCS += src/kernel/gpu_mgr/gpu_group.c
|
||||||
SRCS += src/kernel/gpu_mgr/gpu_mgmt_api.c
|
SRCS += src/kernel/gpu_mgr/gpu_mgmt_api.c
|
||||||
SRCS += src/kernel/gpu_mgr/gpu_mgr.c
|
SRCS += src/kernel/gpu_mgr/gpu_mgr.c
|
||||||
|
SRCS += src/kernel/mem_mgr/console_mem.c
|
||||||
SRCS += src/kernel/mem_mgr/io_vaspace.c
|
SRCS += src/kernel/mem_mgr/io_vaspace.c
|
||||||
SRCS += src/kernel/mem_mgr/mem.c
|
SRCS += src/kernel/mem_mgr/mem.c
|
||||||
SRCS += src/kernel/mem_mgr/os_desc_mem.c
|
SRCS += src/kernel/mem_mgr/os_desc_mem.c
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
NVIDIA_VERSION = 540.3.0
|
NVIDIA_VERSION = 540.4.0
|
||||||
|
|
||||||
# This file.
|
# This file.
|
||||||
VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))
|
VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))
|
||||||
|
|||||||
Reference in New Issue
Block a user