Files
nv-kernel-display-driver/src/nvidia-modeset/kapi/src/nvkms-kapi.c
svcmobrel-release 95cde7ef1c Updating prebuilts and/or headers
d13779dbbab1c776db15f462cd46b29f2c0f8c7c - Makefile
7d577fdb9594ae572ff38fdda682a4796ab832ca - COPYING
5728867ce2e96b63b29367be6aa1c0e47bcafc8f - SECURITY.md
6b73bf6a534ddc0f64e8ba88739381c3b7fb4b5c - nv-compiler.sh
ac7f91dfb6c5c469d2d8196c6baebe46ede5aee0 - CHANGELOG.md
fe4e34f7f517ffe6976a020c22fefcf24ec0c211 - README.md
ec5f1eb408e0b650158e0310fb1ddd8e9b323a6f - CONTRIBUTING.md
af3ee56442f16029cb9b13537477c384226b22fc - CODE_OF_CONDUCT.md
41123f5c3015f9a14cf35b7c75c5b720f5fbed07 - kernel-open/Kbuild
4f4410c3c8db46e5a98d7a35f7d909a49de6cb43 - kernel-open/Makefile
aca7afeeee3cd44b43a8cc8aebacdffd0da96ff9 - kernel-open/conftest.sh
0b1508742a1c5a04b6c3a4be1b48b506f4180848 - kernel-open/dkms.conf
19a5da412ce1557b721b8550a4a80196f6162ba6 - kernel-open/common/inc/os_dsi_panel_props.h
4750735d6f3b334499c81d499a06a654a052713d - kernel-open/common/inc/nv-caps.h
60ef64c0f15526ae2d786e5cec07f28570f0663b - kernel-open/common/inc/conftest.h
880e45b68b19fdb91ac94991f0e6d7fc3b406b1f - kernel-open/common/inc/nv-pci-types.h
03257213e55fff1c07c75c6dcf69afa920372822 - kernel-open/common/inc/nvtypes.h
c45b2faf17ca2a205c56daa11e3cb9d864be2238 - kernel-open/common/inc/nv-modeset-interface.h
e42d91cd7e6c17796fa89a172146950261f45d42 - kernel-open/common/inc/nv-lock.h
b249abc0a7d0c9889008e98cb2f8515a9d310b85 - kernel-open/common/inc/nvgputypes.h
e4a4f57abb8769d204468b2f5000c81f5ea7c92f - kernel-open/common/inc/nv-procfs.h
fc319569799d54944cd09b0e170e29d67b33072d - kernel-open/common/inc/nv.h
751abf80513898b35a6449725e27724b1e23ac50 - kernel-open/common/inc/nvmisc.h
e1144f5bd643d24f67b7577c16c687294cb50d39 - kernel-open/common/inc/rm-gpu-ops.h
3f7b20e27e6576ee1f2f0557d269697a0b8af7ec - kernel-open/common/inc/nv-firmware-registry.h
5fd1da24ae8263c43dc5dada4702564b6f0ca3d9 - kernel-open/common/inc/dce_rm_client_ipc.h
1c49c1642d44ec347f82ff0aa06d0fca6213bad2 - kernel-open/common/inc/nvimpshared.h
befb2c0bf0a31b61be5469575ce3c73a9204f4e9 - kernel-open/common/inc/nv_stdarg.h
0e70d16576584082ee4c7f3ff9944f3bd107b1c1 - kernel-open/common/inc/cpuopsys.h
d7ab0ee225361daacd280ff98848851933a10a98 - kernel-open/common/inc/nv-list-helpers.h
b02c378ac0521c380fc2403f0520949f785b1db6 - kernel-open/common/inc/nv-dmabuf.h
689d6be9302d488000e57a329373feeb14e93798 - kernel-open/common/inc/nv-procfs-utils.h
b417d06ed1845f5ed69181d8eb9de6b6a87fa973 - kernel-open/common/inc/nv-firmware.h
a69cfed9725a8ade97036a1cb795e9144be1836d - kernel-open/common/inc/nv-platform.h
b986bc6591ba17a74ad81ec4c93347564c6d5165 - kernel-open/common/inc/nvkms-format.h
fa267c903e9c449e62dbb6945906400d43417eff - kernel-open/common/inc/nvlimits.h
143051f69a53db0e7c5d2f846a9c14d666e264b4 - kernel-open/common/inc/nv-kref.h
3603c631c6cf784ec862e4e45f05939d98679002 - kernel-open/common/inc/nv-kthread-q.h
b4c5d759f035b540648117b1bff6b1701476a398 - kernel-open/common/inc/nvCpuUuid.h
a0c57e8ffbe1ae12de70e56b740737dae5394a18 - kernel-open/common/inc/nv-linux.h
4a8b7f3cc65fa530670f510796bef51cf8c4bb6b - kernel-open/common/inc/nv-register-module.h
5cf4b517c9bd8f14593c1a6450078a774a39dd08 - kernel-open/common/inc/nv-hypervisor.h
b7f5d125ca0cbd4631012894b635a58cfc9f8e06 - kernel-open/common/inc/nv-pgprot.h
4a97d807a225d792544578f8112c9a3f90cc38f6 - kernel-open/common/inc/nvstatuscodes.h
7b2e2e6ff278acddc6980b330f68e374f38e0a6c - kernel-open/common/inc/nv-timer.h
d25291d32caef187daf3589ce4976e4fa6bec70d - kernel-open/common/inc/nv-time.h
906329ae5773732896e6fe94948f7674d0b04c17 - kernel-open/common/inc/os_gpio.h
57937fb42f6fb312f7c3cf63aa399e43bad13c8c - kernel-open/common/inc/nv-proto.h
507d35d1d4c5ba94ef975f75e16c63244d6cd650 - kernel-open/common/inc/nv-ioctl.h
3665b1e35c52be6b971ab5117ce614109e110b7d - kernel-open/common/inc/nv-mm.h
4856fe869a5f3141e5d7f7d1b0a6affad94cbc31 - kernel-open/common/inc/nv-pci.h
95bf694a98ba78d5a19e66463b8adda631e6ce4c - kernel-open/common/inc/nvstatus.h
b15c5fe5d969414640a2cb374b707c230e7597e4 - kernel-open/common/inc/nv-hash.h
ba72879894c335c61a67f7bae9f6ea94c3b74e1f - kernel-open/common/inc/nvkms-kapi.h
f428218ee6f5d0289602495a1cfb287db4fb0823 - kernel-open/common/inc/nv_uvm_interface.h
1e7eec6561b04d2d21c3515987aaa116e9401c1f - kernel-open/common/inc/nv-kernel-interface-api.h
314f2400c5f4342ebec578c24689329ab79e497d - kernel-open/common/inc/nvkms-api-types.h
c9120c6a33932c7514608601f82ea85d2386b84f - kernel-open/common/inc/os-interface.h
ceac0fe7333f3a67b8fb63de42ab567dd905949f - kernel-open/common/inc/nv-ioctl-numa.h
c75bfc368c6ce3fc2c1a0c5062834e90d822b365 - kernel-open/common/inc/nv-memdbg.h
1d17329caf26cdf931122b3c3b7edf4932f43c38 - kernel-open/common/inc/nv-msi.h
3b12d770f8592b94a8c7774c372e80ad08c5774c - kernel-open/common/inc/nvi2c.h
e20882a9b14f2bf887e7465d3f238e5ac17bc2f5 - kernel-open/common/inc/nv_speculation_barrier.h
1d8b347e4b92c340a0e9eac77e0f63b9fb4ae977 - kernel-open/common/inc/nv-ioctl-numbers.h
891192c9aabdb45fb4a798cc24cd89d205972d3f - kernel-open/common/inc/nv_uvm_types.h
b642fb649ce2ba17f37c8aa73f61b38f99a74986 - kernel-open/common/inc/nv-retpoline.h
3a26838c4edd3525daa68ac6fc7b06842dc6fc07 - kernel-open/common/inc/nv-gpu-info.h
cda75171ca7d8bf920aab6d56ef9aadec16fd15d - kernel-open/common/inc/os/nv_memory_type.h
e0a37b715684ae0f434327e4ce1b5832caf7ea4e - kernel-open/nvidia/nv-nano-timer.c
1a98a2aaf386cd3d03b4b5513d6a511c60f71c2c - kernel-open/nvidia/nv-reg.h
363185059b03b6756b434c6ba9a2ebd79a888cf0 - kernel-open/nvidia/nv-imp.c
b8d361216db85fe897cbced2a9600507b7708c61 - kernel-open/nvidia/libspdm_hkdf_sha.c
64f1c96761f6d9e7e02ab049dd0c810196568036 - kernel-open/nvidia/nv-pat.c
946fb049ca50c9bb39897eca4b8443278043eea2 - kernel-open/nvidia/nv-vm.c
4e5a330fa40dab218821976ac1b530c649d48994 - kernel-open/nvidia/libspdm_ecc.c
94c406f36836c3396b0ca08b4ff71496666b9c43 - kernel-open/nvidia/os-usermap.c
7ac10bc4b3b1c5a261388c3f5f9ce0e9b35d7b44 - kernel-open/nvidia/nv-usermap.c
7af675f85642229b7e7de05dcadd622550fe7ad7 - kernel-open/nvidia/nv-vtophys.c
d11ab03a617b29efcf00f85e24ebce60f91cf82c - kernel-open/nvidia/nv-backlight.c
ef8fd76c55625aeaa71c9b789c4cf519ef6116b2 - kernel-open/nvidia/libspdm_hkdf.c
cf90d9ea3abced81d182ab3c4161e1b5d3ad280d - kernel-open/nvidia/nv-rsync.h
6710f4603a9d3e14bcaefdf415b1cfff9ec9b7ec - kernel-open/nvidia/libspdm_aead.c
d68af9144d3d487308e73d0a52f4474f8047d6ca - kernel-open/nvidia/nv-gpio.c
fc22bea3040ae178492cb9c7a62f1d0012b1c113 - kernel-open/nvidia/nv-procfs.c
aa6cf0ed774330e4afe4eaa55b3463ed31a2f7ae - kernel-open/nvidia/nv.c
e0aff92ee8ddec261d8f0d81c41f837503c4b571 - kernel-open/nvidia/nv-dsi-parse-panel-props.c
9104dc5f36a825aaf1208b54b167965625d4a433 - kernel-open/nvidia/nv_uvm_interface.c
fbae5663e3c278d8206d07ec6446ca4c2781795f - kernel-open/nvidia/nv-ibmnpu.h
ab04c42e0e8e7f48f1a7074885278bbb6006d65f - kernel-open/nvidia/nv-bpmp.c
01d4701e8302e345275f1ec60b9718e645b5663c - kernel-open/nvidia/libspdm_x509.c
e5cd40b060a69cf71220c910e9428d7f261892f7 - kernel-open/nvidia/internal_crypt_lib.h
dc39c4ee87f4dc5f5ccc179a98e07ddb82bb8bce - kernel-open/nvidia/nv-modeset-interface.c
70a9117dce7471a07178d9456b146a033d6b544b - kernel-open/nvidia/nv-dma.c
0a3ad5cdacfe156b02f53c0087bdc0ec9509cd6a - kernel-open/nvidia/nv-ipc-soc.c
06e7ec77cd21c43f900984553a4960064753e444 - kernel-open/nvidia/nv-platform-pm.c
04596e9a57955df30de2f21122aa7e38f3c8825a - kernel-open/nvidia/os-mlock.c
646e6b03521587cc1a02617afd697183e5d1a83a - kernel-open/nvidia/nv-kthread-q.c
94344ec0af21bd9c7c7ab912f7bd3a8668a3e0aa - kernel-open/nvidia/os-pci.c
6e669fe32e4b69dcdbc9739dc8a45fb800547d53 - kernel-open/nvidia/nv-p2p.c
d9221522e02e18b037b8929fbc075dc3c1e58654 - kernel-open/nvidia/nv-pci-table.c
e8daae4e6106429378673988293aaa1fcd80f0eb - kernel-open/nvidia/nv-pci.c
57a06cab892f111b0fb1ebe182c0c688560e750e - kernel-open/nvidia/nvspdm_cryptlib_extensions.h
8c9fd9590d7e3ad333ae03d5f22b72ffbdbe6e70 - kernel-open/nvidia/nv-dmabuf.c
6d4fbea733fdcd92fc6a8a5884e8bb359f9e8abd - kernel-open/nvidia/rmp2pdefines.h
b71bf4426322ab59e78e2a1500509a5f4b2b71ab - kernel-open/nvidia/nv-pat.h
bb4b87fbfa85a21af5b3ed26cc8ff5cbaae78266 - kernel-open/nvidia/os-interface.c
ce537a7d786bd11a4429bf7c59836d5373a66f61 - kernel-open/nvidia/nv-i2c.c
8bedc7374d7a43250e49fb09139c511b489d45e3 - kernel-open/nvidia/nv-pci-table.h
c7f1aaa6a5f3a3cdf1e5f80adf40b3c9f185fb94 - kernel-open/nvidia/nv-report-err.c
3b27e4eaa97bd6fa71f1a075b50af69b1ec16454 - kernel-open/nvidia/libspdm_ec.c
dd9e367cba9e0672c998ec6d570be38084a365ab - kernel-open/nvidia/libspdm_rand.c
37654472e65659be229b5e35c6f25c0724929511 - kernel-open/nvidia/nv-frontend.c
8f87a475c202458948025d1521968677fc11dd50 - kernel-open/nvidia/nv-msi.c
6084c207652ea4bc02a6c94275cad00880acc059 - kernel-open/nvidia/nv-platform.c
dd819a875c584bc469082fcf519779ea00b1d952 - kernel-open/nvidia/libspdm_aead_aes_gcm.c
69f203ad21e643f7b7c85e7e86bd4b674a3536de - kernel-open/nvidia/nv-acpi.c
cf98395acb4430a7c105218f7a4b5f7e810b39cf - kernel-open/nvidia/os-registry.c
4eee7319202366822e17d29ecec9f662c075e7ac - kernel-open/nvidia/nv-rsync.c
980556d84bc56e819955b9338a43a9d970dba11d - kernel-open/nvidia/nv_gpu_ops.h
642c3a7d10b263ab9a63073f83ad843566927b58 - kernel-open/nvidia/libspdm_hmac_sha.c
86443277db67b64c70260e5668bb4140bc90165c - kernel-open/nvidia/nv-clk.c
4c64885083621f5f313a7dee72e14eee8abed2a0 - kernel-open/nvidia/nvidia-sources.Kbuild
2fab5ae911554508e6e7a3b25824e8b2c27e85c2 - kernel-open/nvidia/nv-ibmnpu.c
9883eb32e5d4377c3dce1c7cb54d0e05c05e128b - kernel-open/nvidia/nv-mmap.c
68d781e929d103e6fa55fa92b5d4f933fbfb6526 - kernel-open/nvidia/nv-report-err.h
95ae148b016e4111122c2d9f8f004b53e78998f3 - kernel-open/nvidia/nv-memdbg.c
af3ddc5641076d1618e5a0d5dcc16c63a3d7d011 - kernel-open/nvidia/nvidia.Kbuild
6060392eec4e707ac61ebca3995b6a966eba7fc1 - kernel-open/nvidia/nv-p2p.h
7b1bd10726481626dd51f4eebb693794561c20f6 - kernel-open/nvidia/nv-host1x.c
11778961efc78ef488be5387fa3de0c1b761c0d9 - kernel-open/nvidia/libspdm_sha.c
02b1936dd9a9e30141245209d79b8304b7f12eb9 - kernel-open/nvidia/nv-cray.c
2f6e4c6ee6f809097c8b07a7b698e8614bf25e57 - kernel-open/nvidia/nv-caps.c
9b701fe42a0e87d62c58b15c553086a608e89f7b - kernel-open/nvidia/nv-frontend.h
d2ce61cd7fc2c0d384f9caa40e98bdeb032bab86 - kernel-open/nvidia/libspdm_shash.c
fa178a7209f56008e67b553a2c5ad1b2dd383aac - kernel-open/nvidia/hal/library/cryptlib/cryptlib_rng.h
34de62da6f880ba8022299c77eddbb11d7fc68d2 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_hash.h
95b97f5a3ddcf73ed5d7fa0be9e27aec776d7c13 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_rsa.h
cf94004b7b5729982806f7d6ef7cc6db53e3de56 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_aead.h
9a6e164ec60c2feb1eb8782e3028afbffe420927 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_mac.h
92ab7c0bf545029c4c1d9a0ab68b53eedc655f9c - kernel-open/nvidia/hal/library/cryptlib/cryptlib_ec.h
d007df1d642e836595331598ca0313084922f3ee - kernel-open/nvidia/hal/library/cryptlib/cryptlib_sm2.h
c276be3eb63bb451edfe9ed13859c251530743e6 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_ecd.h
5b79fbc90502b1ba8d1f9966fc7b9a6fd7ef07b4 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_cert.h
0dcb1fd3982e6307b07c917cb453cddbcd1d2f43 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_dh.h
7ff12b437215b77c920a845943e4101dcde289c4 - kernel-open/nvidia/hal/library/cryptlib/cryptlib_hkdf.h
d5ddc354e191d6178625b0df8e8b34e8c3e4c474 - kernel-open/nvidia/library/spdm_lib_config.h
19b5d633f4560d545f622ada0dd352d5aa02c651 - kernel-open/nvidia/library/cryptlib.h
7398ff33b24fa58315cc40776bc3451e090aa437 - kernel-open/nvidia/internal/libspdm_lib_config.h
487db563f4e5153ffc976fc2aa26636ebb4cd534 - kernel-open/nvidia-drm/nvidia-drm-crtc.h
7c1eb7d5d928bb5677634cedde4a234266d4344d - kernel-open/nvidia-drm/nvidia-drm-linux.c
8b2063f0cc2e328f4f986c2ce556cfb626c89810 - kernel-open/nvidia-drm/nvidia-drm-utils.c
6d65ea9f067e09831a8196022bfe00a145bec270 - kernel-open/nvidia-drm/nvidia-drm-gem-dma-buf.h
f454b9ae53a2c308d6909d197c2b9a6543f7d8c3 - kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c
4d390f6b4c50510ffa5aca47977ec12e47b3947c - kernel-open/nvidia-drm/nvidia-drm-modeset.c
23586447526d9ffedd7878b6cf5ba00139fadb5e - kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.h
99642b76e9a84b5a1d2e2f4a8c7fb7bcd77a44fd - kernel-open/nvidia-drm/nvidia-drm.h
66b33e4ac9abe09835635f6776c1222deefad741 - kernel-open/nvidia-drm/nvidia-drm-fb.h
2eba218d75f3802d7bab34d0dd6320f872b2d604 - kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h
c52acdbc07f16aa78570d9e6a7f62e493264fde1 - kernel-open/nvidia-drm/nvidia-drm-helper.c
ae6efc1bbec8a5e948b7244f4801f0b4b398f203 - kernel-open/nvidia-drm/nvidia-drm.c
86666530006fc4446d7e3bbe175ce9d3350d8d81 - kernel-open/nvidia-drm/nvidia-drm-ioctl.h
511ea7cd9e7778c6adc028ae13377c1a8856b72a - kernel-open/nvidia-drm/nvidia-drm-format.c
14b62226771ac7d69ea048b567bcf22ab6a59cb7 - kernel-open/nvidia-drm/nvidia-drm-drv.h
b91df730fba3c2f9401321557bb1bc2e64bbf980 - kernel-open/nvidia-drm/nvidia-drm-connector.h
646e6b03521587cc1a02617afd697183e5d1a83a - kernel-open/nvidia-drm/nv-kthread-q.c
d9221522e02e18b037b8929fbc075dc3c1e58654 - kernel-open/nvidia-drm/nv-pci-table.c
eb98761cdc99141ad937966e5533c57189db376a - kernel-open/nvidia-drm/nvidia-drm-fence.h
eca70b3b8146903ec678a60eebb0462e6ccf4569 - kernel-open/nvidia-drm/nvidia-drm-encoder.h
b1bc97e6e0564f1526dedaf8bb68d081fc509cc7 - kernel-open/nvidia-drm/nvidia-drm-helper.h
2a48c9643c836a1b0a0c133afa9439b4f5ce0feb - kernel-open/nvidia-drm/nvidia-drm-os-interface.h
b83e4c3ba825a75233eaedb0ac33feed74a53ab7 - kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c
b8128c6806ef60d0f0c59bd93ee84fc0fdf47f62 - kernel-open/nvidia-drm/nvidia-drm-drv.c
203295380efca7e422746805437b05ce22505424 - kernel-open/nvidia-drm/nvidia-drm-gem.c
c1a318e90decef16aa29768ea5c8946becc5a4a0 - kernel-open/nvidia-drm/nvidia-drm-encoder.c
8bedc7374d7a43250e49fb09139c511b489d45e3 - kernel-open/nvidia-drm/nv-pci-table.h
044071d60c8cc8ea66c6caaf1b70fe01c4081ad3 - kernel-open/nvidia-drm/nvidia-drm-conftest.h
ec550cba2bebff2c5054b6e12fc43d81e37ade48 - kernel-open/nvidia-drm/nvidia-dma-fence-helper.h
e362c64aa67b47becdbf5c8ba2a245e135adeedf - kernel-open/nvidia-drm/nvidia-drm-gem-dma-buf.c
492a1b0b02dcd2d60f05ac670daeeddcaa4b0da5 - kernel-open/nvidia-drm/nvidia-dma-resv-helper.h
61c61f91d1a29d6f7794a67eac337152b58aaac0 - kernel-open/nvidia-drm/nvidia-drm-connector.c
97b6c56b1407de976898e0a8b5a8f38a5211f8bb - kernel-open/nvidia-drm/nvidia-drm-format.h
b4cdad1b38e8fdac0f2c3ef8ebeb73a83973eed1 - kernel-open/nvidia-drm/nvidia-drm-priv.h
deb00fa4d1de972d93d8e72355d81ba87044c86f - kernel-open/nvidia-drm/nvidia-drm-fence.c
8a8b431f45bd0fe477759c1527d792cb9a1fa3f5 - kernel-open/nvidia-drm/nvidia-drm-gem.h
6528efa1f8061678b8543c5c0be8761cab860858 - kernel-open/nvidia-drm/nvidia-drm-modeset.h
7e87b94b550dbfba205959932a22cf943a4adb26 - kernel-open/nvidia-drm/nvidia-drm.Kbuild
40b5613d1fbbe6b74bff67a5d07974ad321f75f0 - kernel-open/nvidia-drm/nvidia-drm-utils.h
8da06bd922850e840c94ed380e3b92c63aecbf70 - kernel-open/nvidia-drm/nvidia-drm-fb.c
2f49d56a57e1dcb1ded646bf606172890a0f2dc7 - kernel-open/nvidia-drm/nvidia-drm-crtc.c
372ea4c8e7bbc0bdeb899e6f163c8f20c663ad22 - kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h
e02497b93f0f13d8e1624ff2effe417ec63bc2b0 - kernel-open/nvidia-modeset/nvidia-modeset-linux.c
0a0650835e8835d32418891a2fd25031f5d8770e - kernel-open/nvidia-modeset/nvkms.h
646e6b03521587cc1a02617afd697183e5d1a83a - kernel-open/nvidia-modeset/nv-kthread-q.c
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ea6d95de011af0039b1adc209733e524bc583c92 - src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fb.h
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33716a49ba4f7fcc0faa889d535e370a14edd582 - src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h
1066e2e0a0633b0dd1b9114f31079c30178a5ac8 - src/common/sdk/nvidia/inc/ctrl/ctrlc372/ctrlc372chnc.h
3f747a4fc98291329e0245a971248cf2c28a1b60 - src/common/sdk/nvidia/inc/ctrl/ctrlc372/ctrlc372base.h
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67a911b3177b75243e2fceef821ebcfd3668235e - src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h
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505860d3cd6f7d5144f97195b9fb32dd5b8f74aa - src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h
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6975ff971c7ed1ac1a429896a3be1d95353fa4bd - src/common/sdk/nvidia/inc/ctrl/ctrlc370/ctrlc370chnc.h
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18ed4b62c824c252abdd89a6616e3cc325ffa7fa - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080dmabuf.h
ecd312fabb249a25655e151cee3615c5ab61ffa7 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080pmgr.h
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1990d0c4fa84c6d078282d4d7d0624ccb0325ce7 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080unix.h
86737d12192b2e7dc878bbeb8e57a41dcc1a655e - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h
8b622186edb156e980d02bd59a71c01923d1aa23 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080tmr.h
4f31fe752e050953a0f87d04063dc152bba261fe - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080clk.h
920f69f6d8386a107160da834545f71172cc2f0f - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080boardobj.h
55cee85b56cb6ed5d017bab55c40cc8799789c8b - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvd.h
27341c2b0ad4eb10044fdf9fc2377024b4c63297 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h
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3db5bcbcae4063f2356ec76924b4bcc1d0df1a05 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ecc.h
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22b8cc6c4677e664904659c726425a62aa24124e - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h
4fa54b01cd70c3ca3b5cac93bade62dd09641b97 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080vgpumgrinternal.h
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359c6b06f2712a527d1ef08465179c14a8b4a751 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080acr.h
4c2af959d06536294d62b2366a6ba61ca744bd50 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080dma.h
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6627bf1716c0e06e870c083d264753d6a0abb439 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h
5013ec94fa6311100818efb422b013ed77cffe82 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h
0cd5e883dfafb74ce2ec9bccca6e688a27e6cfa9 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080perf_cf_pwr_model.h
07f82ae90cde3c6e2e6c5af135c40e01660c39a3 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080boardobjgrpclasses.h
48691dd2c8d93fbd162e207cdb5d27ea30741d36 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h
01a6a431e8aeffeec97755009b4e9575bdf0de7b - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h
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66aa4e08f838e1f87e4babacb42d3d59cb6837ff - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080pmu.h
74f1abf45a2a0f60c82e4825b9abfa6c57cab648 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080power.h
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bf976b3c428ccb9cb80d2f84f80b2c33d96e6ce1 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080perf.h
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5ac6c9a299256935259eaf94323ae58995a97ad7 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpio.h
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d411633fdeae66035e8c018ec8f6f25a9d5dd462 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h
496c7a1a0c283b25a637a996995d3987c9045346 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h
5c7b955ef5e6f6ca9c0944e8a2b2c4a1ae760e04 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spi.h
93a9fa93eb3d1099991e4682b6228124220ca293 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fla.h
e8d117ea0d596ed6415324bd136de337f1a36ff1 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fan.h
42dc8204c0f6da47c5f741344032fc02702cfac5 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ucodefuzzer.h
59254e4bdc475b70cfd0b445ef496f27c20faab0 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080cipher.h
59340a74f26b92f689fe99f8303775c87a4bbd58 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080hshub.h
2476f128437c0520204e13a4ddd2239ff3f40c21 - src/common/unix/common/inc/nv-float.h
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1c947cfc8a133b00727104684764e5bb900c9d28 - src/common/unix/common/inc/nv_mode_timings.h
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667b361db93e35d12d979c47e4d7a68be9aa93b6 - src/common/unix/common/utils/interface/nv_mode_timings_utils.h
07c675d22c4f0f4be6647b65b6487e2d6927c347 - src/common/unix/common/utils/interface/nv_memory_tracker.h
8d9c4d69394b23d689a4aa6727eb3da1d383765a - src/common/unix/common/utils/interface/unix_rm_handle.h
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8f0d91e1a8f0d3474fb91dc3e6234e55d2c79fcc - src/common/inc/rmosxfac.h
56f837b06862884abb82686948cafc024f210126 - src/common/inc/nvlog_defs.h
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6fa5359ffe91b624548c226b6139f241771a9289 - src/common/inc/jt.h
87bb66c50d1301edb50140e9896e1f67aaaa7175 - src/common/inc/nvVer.h
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8c41b32c479f0de04df38798c56fd180514736fc - src/common/inc/nvBldVer.h
62e510fa46465f69e9c55fabf1c8124bee3091c4 - src/common/inc/nvHdmiFrlCommon.h
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5257e84f2048b01258c78cec70987f158f6b0c44 - src/common/inc/nvlog_inc.h
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cd9253d1a83b171ca5aa514bc24ac87f2f9af961 - src/common/inc/nvUnixVersion.h
1fc95a17ddb619570063f6707d6a395684bfa884 - src/common/inc/displayport/dpcd20.h
90998aac8685a403fdec9ff875f7436373d76f71 - src/common/inc/displayport/dpcd14.h
669268ea1660e9e5b876f90da003599ba01356bb - src/common/inc/displayport/displayport.h
ee0105d1113ce6330939c7e8d597d899daae662e - src/common/inc/displayport/dpcd.h
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38edc89fd4148b5b013b9e07081ba1e9b34516ac - src/common/inc/swref/published/turing/tu102/kind_macros.h
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3cddaacf90bbbefedf500e6af7eaefb0f007813c - src/common/inc/swref/published/disp/v03_00/dev_disp.h
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4de33a60116ce3fa3f440db105561eddc21ce375 - src/common/shared/nvstatus/nvstatus.c
750ecc85242882a9e428d5a5cf1a64f418d59c5f - src/common/displayport/inc/dp_object.h
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80380945c76c58648756446435d615f74630f2da - src/common/displayport/inc/dp_timeout.h
cdb1e7797c250b0a7c0449e2df5ce71e42b83432 - src/common/displayport/inc/dp_merger.h
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02b65d96a7a345eaa87042faf6dd94052235009c - src/common/displayport/inc/dp_messageheader.h
78595e6262d5ab0e6232392dc0852feaf83c7585 - src/common/displayport/inc/dp_auxbus.h
e27519c72e533a69f7433638a1d292fb9df8772e - src/common/displayport/inc/dp_crc.h
325818d0a4d1b15447923e2ed92c938d293dc079 - src/common/displayport/inc/dp_hostimp.h
29ee5f4ef6670f06e96c07b36c11e3bad8bee6aa - src/common/displayport/inc/dp_address.h
36e80dd13c5adc64c3adc9a931d5ebbf922e9502 - src/common/displayport/inc/dp_groupimpl.h
8d8a5f0160922b6630fa796789c5d59cce94d9e0 - src/common/displayport/inc/dp_configcaps.h
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01f1dd58ed5bb12503fa45be7a6657cde0a857e2 - src/common/displayport/inc/dp_guid.h
cca426d571c6b01f7953180e2e550e55c629f0f4 - src/common/displayport/inc/dp_auxretry.h
11487c992494f502d1c48ff00982998504336800 - src/common/displayport/inc/dp_internal.h
f6e1b0850f5ed0f23f263d4104523d9290bb8669 - src/common/displayport/inc/dp_vrr.h
2f134665b274bb223c3f74e0ec5c6a0392fa6387 - src/common/displayport/inc/dp_discovery.h
07d22f84e6a386dad251761278a828dab64b6dd5 - src/common/displayport/inc/dp_bitstream.h
2a81681efef7ffced62c6d64cfdbc455d85fdb0a - src/common/displayport/inc/dp_mainlink.h
9a0aa25938adf3bda9451aeab67fb04e266d771d - src/common/displayport/inc/dp_deviceimpl.h
eb9cdbb0a907926b1afd2a551ec19830f06ae205 - src/common/displayport/inc/dp_splitter.h
5bd3706ceea585df76a75dda7f9581b91ee8f998 - src/common/displayport/inc/dp_tracing.h
4a098c4d09dedc33b86748d5fe9a30d097675e9f - src/common/displayport/inc/dp_list.h
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379d3933c90eaf9c35a0bad2bd6af960a321465f - src/common/displayport/inc/dp_wardatabase.h
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36d3c602cbbf0a52d574f841ba1b75125ec3b24a - src/common/displayport/inc/dp_linkconfig.h
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2067e2ca3b86014c3e6dfc51d6574d87ae12d907 - src/common/displayport/inc/dp_timer.h
a3fc03562a3fa0968ab8d4a50424465174392f0e - src/common/displayport/inc/dp_connectorimpl.h
34e808f745eaaff13aeb4e6cde1a8ce35f7b9def - src/common/displayport/inc/dp_connector.h
c2f5f82ddf1d0b5c976264ceb14fe9b67bf12851 - src/common/displayport/inc/dp_messagecodings.h
df11366a5bcfb641025f12cddf9b5e8c2ed008de - src/common/displayport/inc/dp_watermark.h
020194b85245bad5de4dfe372a7ccb0c247d6ede - src/common/displayport/inc/dptestutil/dp_testmessage.h
70b155b0da07a92ede884a9cec715f67e6b5c3e8 - src/common/displayport/src/dp_list.cpp
37eabb1ab51cb38660eb24e294c63c8320750b96 - src/common/displayport/src/dp_sst_edid.cpp
fea946e5320e7de8e9229bca8d4a6a14b9e8db59 - src/common/displayport/src/dp_crc.cpp
fbd877bac2efc8ee33e4e108e61c961e1fc42f44 - src/common/displayport/src/dp_messagecodings.cpp
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45da2aabdaf6b5b2bf17a3deeb045feed1545415 - src/common/displayport/src/dp_messages.cpp
719d2ddbfb8555636496cb5dd74ee6776059db92 - src/common/displayport/src/dp_timer.cpp
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9f31213ab8037d7bb18c96a67d2630d61546544a - src/common/displayport/src/dp_mst_edid.cpp
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54c516f23671ec703a4e000f700c16dce640367a - src/common/modeset/timing/nvt_dmt.c
890d8c2898a3277b0fed360301c2dc2688724f47 - src/common/modeset/timing/nvt_util.c
cc04c12ebe4e2f7e31d0619ddd16db0c46b9db9e - src/common/modeset/timing/nvtiming.h
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5b1ce39d595dfb88141f698e73b0a64d26e9b31d - src/common/modeset/timing/nvt_dsc_pps.c
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1997adbf2f6f5be7eb6c7a88e6660391a85d891b - src/common/modeset/timing/nvt_gtf.c
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849309f12f14d685acf548f9eed35fadea10c4e7 - src/common/modeset/timing/nvt_edidext_displayid20.c
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28d7b753825d5f4a9402aff14488c125453e95c5 - src/common/modeset/timing/nvt_tv.c
cb1923187030de8ad82780663eb7151b68c3b735 - src/common/modeset/timing/displayid20.h
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6f2eb25d57d2dc3c1e5db869cfbdf556878d3332 - src/nvidia-modeset/src/nvkms-console-restore.c
933829ff39c6d1fe41bd82a5af177f5059b4b69e - src/nvidia-modeset/src/nvkms-modepool.c
403e6dbff0a607c2aecf3204c56633bd7b612ae2 - src/nvidia-modeset/src/nvkms-stereo.c
93ab81a362c4ba29ed817dd14fbd75f2b36b62b8 - src/nvidia-modeset/src/nvkms-lut.c
f96cd982b4c05351faa31d04ac30d6fa7c866bcb - src/nvidia-modeset/src/dp/nvdp-timer.cpp
6b985fc50b5040ce1a81418bed73a60edb5d3289 - src/nvidia-modeset/src/dp/nvdp-timer.hpp
a90b2c295271631b4c3abe6afb8dfd92d6b429c8 - src/nvidia-modeset/src/dp/nvdp-connector.cpp
535ce9f743903eb83a341eef1be812f4e4b50887 - src/nvidia-modeset/src/dp/nvdp-evo-interface.cpp
c19775aebdaaaee3500378d47af6ff0b8eb486b8 - src/nvidia-modeset/src/dp/nvdp-device.cpp
a2a4b7063fa903cc434163ebceb7c8d48f703c33 - src/nvidia-modeset/src/dp/nvdp-connector-event-sink.cpp
51af3c1ee6b74ee0c9add3fb7d50cbc502980789 - src/nvidia-modeset/src/dp/nvdp-evo-interface.hpp
110ac212ee8832c3fa3c4f45d6d33eed0301e992 - src/nvidia-modeset/src/dp/nvdp-host.cpp
69fed95ab3954dd5cb26590d02cd8ba09cdff1ac - src/nvidia-modeset/src/dp/nvdp-connector-event-sink.hpp
372ea4c8e7bbc0bdeb899e6f163c8f20c663ad22 - src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h
0a0650835e8835d32418891a2fd25031f5d8770e - src/nvidia-modeset/os-interface/include/nvkms.h
5c987d408208e74a7e0e50d79e96508b07955d8e - src/nvidia-modeset/interface/nvkms-api.h
b986bc6591ba17a74ad81ec4c93347564c6d5165 - src/nvidia-modeset/interface/nvkms-format.h
2ea1436104463c5e3d177e8574c3b4298976d37e - src/nvidia-modeset/interface/nvkms-ioctl.h
314f2400c5f4342ebec578c24689329ab79e497d - src/nvidia-modeset/interface/nvkms-api-types.h
8e3e74d2b3f45381e7b0012d930cf451cbd1728f - src/nvidia-modeset/interface/nvkms-sync.h

Change-Id: Ibbf4c7469dfa50cd527fc6ff5c8946be48640a6f
2024-09-03 21:05:05 -07:00

3461 lines
106 KiB
C

/*
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "nvUnixVersion.h"
#include "nvidia-modeset-os-interface.h"
#include "nvkms-api.h"
#include "nvkms-rmapi.h"
#include "nvkms-vrr.h"
#include "nvkms-kapi.h"
#include "nvkms-kapi-private.h"
#include "nvkms-kapi-internal.h"
#include "nvkms-kapi-notifiers.h"
#include <class/cl0000.h> /* NV01_ROOT/NV01_NULL_OBJECT */
#include <class/cl003e.h> /* NV01_MEMORY_SYSTEM */
#include <class/cl0080.h> /* NV01_DEVICE */
#include <class/cl0040.h> /* NV01_MEMORY_LOCAL_USER */
#include <class/cl0071.h> /* NV01_MEMORY_SYSTEM_OS_DESCRIPTOR */
#include <class/cl2080.h> /* NV20_SUBDEVICE_0 */
#include <ctrl/ctrl0000/ctrl0000gpu.h> /* NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2 */
#include <ctrl/ctrl0000/ctrl0000unix.h> /* NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECT_FROM_FD */
#include <ctrl/ctrl0000/ctrl0000client.h> /* NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE_VIDMEM */
#include <ctrl/ctrl0080/ctrl0080gpu.h> /* NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES */
#include <ctrl/ctrl0080/ctrl0080fb.h> /* NV0080_CTRL_CMD_FB_GET_CAPS_V2 */
#include <ctrl/ctrl2080/ctrl2080fb.h> /* NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT */
#include <ctrl/ctrl2080/ctrl2080unix.h> /* NV2080_CTRL_CMD_OS_UNIX_GC6_BLOCKER_REFCNT */
#include "ctrl/ctrl003e.h" /* NV003E_CTRL_CMD_GET_SURFACE_PHYS_PAGES */
#include "ctrl/ctrl0041.h" /* NV0041_CTRL_SURFACE_INFO */
ct_assert(NVKMS_KAPI_LAYER_PRIMARY_IDX == NVKMS_MAIN_LAYER);
ct_assert(NVKMS_KAPI_LAYER_MAX == NVKMS_MAX_LAYERS_PER_HEAD);
/* XXX Move to NVKMS */
#define NV_EVO_PITCH_ALIGNMENT 0x100
#define NVKMS_KAPI_SUPPORTED_EVENTS_MASK \
((1 << NVKMS_EVENT_TYPE_DPY_CHANGED) | \
(1 << NVKMS_EVENT_TYPE_DYNAMIC_DPY_CONNECTED) | \
(1 << NVKMS_EVENT_TYPE_FLIP_OCCURRED))
static NvU32 EnumerateGpus(nv_gpu_info_t *gpuInfo)
{
return nvkms_enumerate_gpus(gpuInfo);
}
/*
* Helper function to free RM objects allocated for NvKmsKapiDevice.
*/
static void RmFreeDevice(struct NvKmsKapiDevice *device)
{
if (device->hRmSubDevice != 0x0) {
nvRmApiFree(device->hRmClient,
device->hRmDevice,
device->hRmSubDevice);
nvKmsKapiFreeRmHandle(device, device->hRmSubDevice);
device->hRmSubDevice = 0x0;
}
/* Free RM device object */
if (device->hRmDevice != 0x0) {
nvRmApiFree(device->hRmClient,
device->hRmClient,
device->hRmDevice);
nvKmsKapiFreeRmHandle(device, device->hRmDevice);
device->hRmDevice = 0x0;
}
nvTearDownUnixRmHandleAllocator(&device->handleAllocator);
device->deviceInstance = 0;
/* Free RM client */
if (device->hRmClient != 0x0) {
nvRmApiFree(device->hRmClient,
device->hRmClient,
device->hRmClient);
device->hRmClient = 0x0;
}
}
/*
* Helper function to allocate RM objects for NvKmsKapiDevice.
*/
static NvBool RmAllocateDevice(struct NvKmsKapiDevice *device)
{
NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS getNumSubDevicesParams = { 0 };
NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS idInfoParams = { };
NV2080_ALLOC_PARAMETERS subdevAllocParams = { 0 };
NV0080_ALLOC_PARAMETERS allocParams = { };
NV0080_CTRL_FB_GET_CAPS_V2_PARAMS fbCapsParams = { 0 };
NvU32 hRmDevice, hRmSubDevice;
NvBool supportsGenericPageKind;
NvU32 ret;
/* Allocate RM client */
ret = nvRmApiAlloc(NV01_NULL_OBJECT,
NV01_NULL_OBJECT,
NV01_NULL_OBJECT,
NV01_ROOT,
&device->hRmClient);
if (ret != NVOS_STATUS_SUCCESS || device->hRmClient == 0x0) {
nvKmsKapiLogDeviceDebug(device, "Failed to allocate RM client");
goto failed;
}
/* Query device instance */
idInfoParams.gpuId = device->gpuId;
ret = nvRmApiControl(device->hRmClient,
device->hRmClient,
NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2,
&idInfoParams,
sizeof(idInfoParams));
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(device, "Failed to query device instance");
goto failed;
}
device->deviceInstance = idInfoParams.deviceInstance;
device->isSOC =
FLD_TEST_DRF(0000, _CTRL_GPU_ID_INFO, _SOC, _TRUE,
idInfoParams.gpuFlags);
/* Initialize RM handle allocator */
if (!nvInitUnixRmHandleAllocator(&device->handleAllocator,
device->hRmClient,
device->deviceInstance + 1)) {
nvKmsKapiLogDeviceDebug(device, "Failed to initialize RM handle allocator");
goto failed;
}
/* Allocate RM device object */
hRmDevice = nvKmsKapiGenerateRmHandle(device);
if (hRmDevice == 0x0) {
nvKmsKapiLogDeviceDebug(device, "Failed to allocate RM handle");
goto failed;
}
allocParams.deviceId = device->deviceInstance;
allocParams.hClientShare = device->hRmClient;
ret = nvRmApiAlloc(device->hRmClient,
device->hRmClient,
hRmDevice,
NV01_DEVICE_0,
&allocParams);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(device, "Failed to allocate RM device object");
nvKmsKapiFreeRmHandle(device, hRmDevice);
goto failed;
}
device->hRmDevice = hRmDevice;
ret = nvRmApiControl(device->hRmClient,
device->hRmDevice,
NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES,
&getNumSubDevicesParams,
sizeof(getNumSubDevicesParams));
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(device, "Failed to determine number of GPUs");
goto failed;
}
if (getNumSubDevicesParams.numSubDevices != 1) {
nvKmsKapiLogDeviceDebug(
device,
"Unsupported number of GPUs: %d",
getNumSubDevicesParams.numSubDevices);
goto failed;
}
hRmSubDevice = nvKmsKapiGenerateRmHandle(device);
if (hRmDevice == 0x0) {
nvKmsKapiLogDeviceDebug(device, "Failed to allocate RM handle");
goto failed;
}
subdevAllocParams.subDeviceId = 0;
ret = nvRmApiAlloc(device->hRmClient,
device->hRmDevice,
hRmSubDevice,
NV20_SUBDEVICE_0,
&subdevAllocParams);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(device, "Failed to initialize subDevice");
nvKmsKapiFreeRmHandle(device, hRmSubDevice);
goto failed;
}
device->hRmSubDevice = hRmSubDevice;
if (device->isSOC) {
/* NVKMS is only used on T23X and later chips,
* which all support generic memory. */
supportsGenericPageKind = NV_TRUE;
} else {
ret = nvRmApiControl(device->hRmClient,
device->hRmDevice,
NV0080_CTRL_CMD_FB_GET_CAPS_V2,
&fbCapsParams,
sizeof (fbCapsParams));
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(device, "Failed to query framebuffer capabilities");
goto failed;
}
supportsGenericPageKind =
NV0080_CTRL_FB_GET_CAP(fbCapsParams.capsTbl,
NV0080_CTRL_FB_CAPS_GENERIC_PAGE_KIND);
}
device->caps.genericPageKind =
supportsGenericPageKind ?
0x06 /* NV_MMU_PTE_KIND_GENERIC_MEMORY */ :
0xfe /* NV_MMU_PTE_KIND_GENERIC_16BX2 */;
return NV_TRUE;
failed:
RmFreeDevice(device);
return NV_FALSE;
}
/*
* Helper function to free NVKMS objects allocated for NvKmsKapiDevice.
*/
static void KmsFreeDevice(struct NvKmsKapiDevice *device)
{
/* Free notifier memory */
nvKmsKapiFreeNotifiers(device);
/* Free NVKMS device */
if (device->hKmsDevice != 0x0) {
struct NvKmsFreeDeviceParams paramsFree = { };
paramsFree.request.deviceHandle = device->hKmsDevice;
nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_FREE_DEVICE,
&paramsFree, sizeof(paramsFree));
device->hKmsDevice = device->hKmsDisp = 0x0;
}
/* Close NVKMS */
if (device->pKmsOpen != NULL) {
nvkms_close_from_kapi(device->pKmsOpen);
device->pKmsOpen = NULL;
}
}
/*
* Helper function to allocate NVKMS objects for NvKmsKapiDevice.
*/
static NvBool KmsAllocateDevice(struct NvKmsKapiDevice *device)
{
struct NvKmsAllocDeviceParams *paramsAlloc;
NvBool status;
NvBool inVideoMemory = FALSE;
NvU32 head;
NvBool ret = FALSE;
NvU32 layer;
paramsAlloc = nvKmsKapiCalloc(1, sizeof(*paramsAlloc));
if (paramsAlloc == NULL) {
return FALSE;
}
/* Open NVKMS */
device->pKmsOpen = nvkms_open_from_kapi(device);
if (device->pKmsOpen == NULL) {
nvKmsKapiLogDeviceDebug(device, "Failed to Open NVKMS");
goto done;
}
/* Allocate NVKMS device */
nvkms_strncpy(
paramsAlloc->request.versionString,
NV_VERSION_STRING,
sizeof(paramsAlloc->request.versionString));
if (device->isSOC) {
paramsAlloc->request.deviceId = NVKMS_DEVICE_ID_TEGRA;
} else {
paramsAlloc->request.deviceId = device->deviceInstance;
}
paramsAlloc->request.sliMosaic = NV_FALSE;
paramsAlloc->request.enableConsoleHotplugHandling = NV_TRUE;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_ALLOC_DEVICE,
paramsAlloc, sizeof(*paramsAlloc));
if (!status ||
paramsAlloc->reply.status != NVKMS_ALLOC_DEVICE_STATUS_SUCCESS) {
if (paramsAlloc->reply.status ==
NVKMS_ALLOC_DEVICE_STATUS_NO_HARDWARE_AVAILABLE) {
nvKmsKapiLogDeviceDebug(
device,
"Display hardware is not available; falling back to "
"displayless mode");
ret = TRUE;
goto done;
}
nvKmsKapiLogDeviceDebug(
device,
"Failed to NVKM device %u(%u): %d %d\n",
device->gpuId,
paramsAlloc->request.deviceId,
status,
paramsAlloc->reply.status);
goto done;
}
device->hKmsDevice = paramsAlloc->reply.deviceHandle;
device->caps.cursorCompositionCaps =
paramsAlloc->reply.cursorCompositionCaps;
device->caps.overlayCompositionCaps =
paramsAlloc->reply.layerCaps[NVKMS_OVERLAY_LAYER].composition;
device->caps.validLayerRRTransforms =
paramsAlloc->reply.validLayerRRTransforms;
device->caps.maxWidthInPixels = paramsAlloc->reply.maxWidthInPixels;
device->caps.maxHeightInPixels = paramsAlloc->reply.maxHeightInPixels;
device->caps.maxCursorSizeInPixels = paramsAlloc->reply.maxCursorSize;
device->caps.requiresVrrSemaphores = paramsAlloc->reply.requiresVrrSemaphores;
/* The generic page kind was determined during RM device allocation,
* but it should match what NVKMS reports */
nvAssert(device->caps.genericPageKind == paramsAlloc->reply.genericPageKind);
/* XXX Add LUT support */
device->numHeads = paramsAlloc->reply.numHeads;
for (head = 0; head < device->numHeads; head++) {
if (paramsAlloc->reply.numLayers[head] < 2) {
goto done;
}
device->numLayers[head] = paramsAlloc->reply.numLayers[head];
}
for (layer = 0; layer < NVKMS_KAPI_LAYER_MAX; layer++) {
device->supportedSurfaceMemoryFormats[layer] =
paramsAlloc->reply.layerCaps[layer].supportedSurfaceMemoryFormats;
device->supportsHDR[layer] = paramsAlloc->reply.layerCaps[layer].supportsHDR;
}
if (paramsAlloc->reply.validNIsoFormatMask &
(1 << NVKMS_NISO_FORMAT_FOUR_WORD_NVDISPLAY)) {
device->notifier.format = NVKMS_NISO_FORMAT_FOUR_WORD_NVDISPLAY;
} else if (paramsAlloc->reply.validNIsoFormatMask &
(1 << NVKMS_NISO_FORMAT_FOUR_WORD)) {
device->notifier.format = NVKMS_NISO_FORMAT_FOUR_WORD;
} else {
nvAssert(paramsAlloc->reply.validNIsoFormatMask &
(1 << NVKMS_NISO_FORMAT_LEGACY));
device->notifier.format = NVKMS_NISO_FORMAT_LEGACY;
}
/* XXX Add support for SLI/multiple display engines per device */
if (paramsAlloc->reply.numDisps != 1)
{
nvKmsKapiLogDeviceDebug(device, "Found unsupported SLI configuration");
goto done;
}
device->hKmsDisp = paramsAlloc->reply.dispHandles[0];
device->dispIdx = 0;
device->subDeviceMask = paramsAlloc->reply.subDeviceMask;
device->isoIOCoherencyModes = paramsAlloc->reply.isoIOCoherencyModes;
device->nisoIOCoherencyModes = paramsAlloc->reply.nisoIOCoherencyModes;
device->supportsSyncpts = paramsAlloc->reply.supportsSyncpts;
if (paramsAlloc->reply.nIsoSurfacesInVidmemOnly) {
inVideoMemory = TRUE;
}
/* Allocate notifier memory */
if (!nvKmsKapiAllocateNotifiers(device, inVideoMemory)) {
nvKmsKapiLogDebug(
"Failed to allocate Notifier objects for GPU ID 0x%08x",
device->gpuId);
goto done;
}
ret = NV_TRUE;
done:
if (!ret) {
KmsFreeDevice(device);
}
nvKmsKapiFree(paramsAlloc);
return ret;
}
static void FreeDevice(struct NvKmsKapiDevice *device)
{
/* Free NVKMS objects allocated for NvKmsKapiDevice */
KmsFreeDevice(device);
/* Free RM objects allocated for NvKmsKapiDevice */
RmFreeDevice(device);
/* Lower the reference count of gpu. */
nvkms_close_gpu(device->gpuId);
if (device->pSema != NULL) {
nvkms_sema_free(device->pSema);
}
nvKmsKapiFree(device);
}
NvBool nvKmsKapiAllocateSystemMemory(struct NvKmsKapiDevice *device,
NvU32 hRmHandle,
enum NvKmsSurfaceMemoryLayout layout,
NvU64 size,
enum NvKmsKapiAllocationType type,
NvU8 *compressible)
{
NvU32 ret;
NV_MEMORY_ALLOCATION_PARAMS memAllocParams = { };
const NvKmsDispIOCoherencyModes *pIOCoherencyModes = NULL;
memAllocParams.owner = NVKMS_RM_HEAP_ID;
memAllocParams.size = size;
switch (layout) {
case NvKmsSurfaceMemoryLayoutBlockLinear:
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _FORMAT, _BLOCK_LINEAR,
memAllocParams.attr);
if (*compressible) {
/*
* RM will choose a compressed page kind and hence allocate
* comptags for color surfaces >= 32bpp. The actual kind
* chosen isn't important, as it can be overridden by creating
* a virtual alloc with a different kind when mapping the
* memory into the GPU.
*/
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _DEPTH, _32,
memAllocParams.attr);
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _COMPR, _ANY,
memAllocParams.attr);
} else {
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _DEPTH, _UNKNOWN,
memAllocParams.attr);
}
break;
case NvKmsSurfaceMemoryLayoutPitch:
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _FORMAT, _PITCH,
memAllocParams.attr);
break;
default:
nvKmsKapiLogDeviceDebug(device, "Unknown Memory Layout");
return NV_FALSE;
}
switch (type) {
case NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT:
/* XXX Note compression and scanout do not work together on
* any current GPUs. However, some use cases do involve scanning
* out a compression-capable surface:
*
* 1) Mapping the compressible surface as non-compressed when
* generating its content.
*
* 2) Using decompress-in-place to decompress the surface content
* before scanning it out.
*
* Hence creating compressed allocations of TYPE_SCANOUT is allowed.
*/
pIOCoherencyModes = &device->isoIOCoherencyModes;
break;
case NVKMS_KAPI_ALLOCATION_TYPE_NOTIFIER:
if (layout == NvKmsSurfaceMemoryLayoutBlockLinear) {
nvKmsKapiLogDeviceDebug(device,
"Attempting creation of BlockLinear notifier memory");
return NV_FALSE;
}
memAllocParams.attr2 = FLD_SET_DRF(OS32, _ATTR2, _NISO_DISPLAY,
_YES, memAllocParams.attr2);
pIOCoherencyModes = &device->nisoIOCoherencyModes;
break;
case NVKMS_KAPI_ALLOCATION_TYPE_OFFSCREEN:
memAllocParams.flags |= NVOS32_ALLOC_FLAGS_NO_SCANOUT;
break;
default:
nvKmsKapiLogDeviceDebug(device, "Unknown Allocation Type");
return NV_FALSE;
}
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _LOCATION, _PCI,
memAllocParams.attr);
memAllocParams.attr2 = FLD_SET_DRF(OS32, _ATTR2, _GPU_CACHEABLE, _NO,
memAllocParams.attr2);
if (pIOCoherencyModes == NULL || !pIOCoherencyModes->coherent) {
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _COHERENCY,
_WRITE_COMBINE, memAllocParams.attr);
} else {
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _COHERENCY,
_WRITE_BACK, memAllocParams.attr);
}
memAllocParams.attr = FLD_SET_DRF(OS32, _ATTR, _PHYSICALITY, _NONCONTIGUOUS,
memAllocParams.attr);
ret = nvRmApiAlloc(device->hRmClient,
device->hRmDevice,
hRmHandle,
NV01_MEMORY_SYSTEM,
&memAllocParams);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"nvRmApiAlloc failed with error code 0x%08x",
ret);
return NV_FALSE;
}
if (FLD_TEST_DRF(OS32, _ATTR, _COMPR, _NONE,
memAllocParams.attr)) {
*compressible = 0;
} else {
*compressible = 1;
}
return TRUE;
}
NvBool nvKmsKapiAllocateVideoMemory(struct NvKmsKapiDevice *device,
NvU32 hRmHandle,
enum NvKmsSurfaceMemoryLayout layout,
NvU64 size,
enum NvKmsKapiAllocationType type,
NvU8 *compressible)
{
NV_MEMORY_ALLOCATION_PARAMS memAllocParams = { };
NvU32 ret;
memAllocParams.owner = NVKMS_RM_HEAP_ID;
memAllocParams.size = size;
switch (layout) {
case NvKmsSurfaceMemoryLayoutBlockLinear:
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _FORMAT, _BLOCK_LINEAR,
memAllocParams.attr);
if (*compressible) {
/*
* RM will choose a compressed page kind and hence allocate
* comptags for color surfaces >= 32bpp. The actual kind
* chosen isn't important, as it can be overridden by creating
* a virtual alloc with a different kind when mapping the
* memory into the GPU.
*/
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _DEPTH, _32,
memAllocParams.attr);
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _COMPR, _ANY,
memAllocParams.attr);
} else {
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _DEPTH, _UNKNOWN,
memAllocParams.attr);
}
break;
case NvKmsSurfaceMemoryLayoutPitch:
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _FORMAT, _PITCH,
memAllocParams.attr);
break;
default:
nvKmsKapiLogDeviceDebug(device, "Unknown Memory Layout");
return NV_FALSE;
}
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _LOCATION, _VIDMEM,
memAllocParams.attr);
memAllocParams.attr2 =
FLD_SET_DRF(OS32, _ATTR2, _GPU_CACHEABLE, _NO,
memAllocParams.attr2);
switch (type) {
case NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT:
/* XXX [JRJ] Not quite right. This can also be used to allocate
* cursor images. The stuff RM does with this field is kind of
* black magic, and I can't tell if it actually matters.
*/
memAllocParams.type = NVOS32_TYPE_PRIMARY;
memAllocParams.alignment = NV_EVO_SURFACE_ALIGNMENT;
memAllocParams.flags |=
NVOS32_ALLOC_FLAGS_ALIGNMENT_FORCE | /* Pick up above EVO alignment */
NVOS32_ALLOC_FLAGS_FORCE_MEM_GROWS_UP; /* X sets this for cursors */
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _PHYSICALITY, _CONTIGUOUS,
memAllocParams.attr);
/* XXX [JRJ] Note compression and scanout do not work together on
* any current GPUs. However, some use cases do involve scanning
* out a compression-capable surface:
*
* 1) Mapping the compressible surface as non-compressed when
* generating its content.
*
* 2) Using decompress-in-place to decompress the surface content
* before scanning it out.
*
* Hence creating compressed allocations of TYPE_SCANOUT is allowed.
*/
break;
case NVKMS_KAPI_ALLOCATION_TYPE_NOTIFIER:
if (layout == NvKmsSurfaceMemoryLayoutBlockLinear) {
nvKmsKapiLogDeviceDebug(device,
"Attempting creation of BlockLinear notifier memory");
return NV_FALSE;
}
memAllocParams.type = NVOS32_TYPE_DMA;
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _PAGE_SIZE, _4KB,
memAllocParams.attr);
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _COHERENCY, _UNCACHED,
memAllocParams.attr);
break;
case NVKMS_KAPI_ALLOCATION_TYPE_OFFSCREEN:
memAllocParams.type = NVOS32_TYPE_IMAGE;
memAllocParams.flags |=
NVOS32_ALLOC_FLAGS_NO_SCANOUT |
NVOS32_ALLOC_FLAGS_FORCE_MEM_GROWS_UP;
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _PHYSICALITY, _NONCONTIGUOUS,
memAllocParams.attr);
break;
default:
nvKmsKapiLogDeviceDebug(device, "Unknown Allocation Type");
return NV_FALSE;
}
ret = nvRmApiAlloc(device->hRmClient,
device->hRmDevice,
hRmHandle,
NV01_MEMORY_LOCAL_USER,
&memAllocParams);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"VidHeapControl failed with error code 0x%08x",
ret);
return NV_FALSE;
}
if (FLD_TEST_DRF(OS32, _ATTR, _COMPR, _NONE,
memAllocParams.attr)) {
*compressible = 0;
} else {
*compressible = 1;
}
return NV_TRUE;
}
static struct NvKmsKapiDevice* AllocateDevice
(
const struct NvKmsKapiAllocateDeviceParams *params
)
{
struct NvKmsKapiDevice *device = NULL;
device = nvKmsKapiCalloc(1, sizeof(*device));
if (device == NULL) {
nvKmsKapiLogDebug(
"Failed to allocate memory for NvKmsKapiDevice of GPU ID 0x%08x",
params->gpuId);
goto failed;
}
device->pSema = nvkms_sema_alloc();
if (device->pSema == NULL) {
nvKmsKapiLogDebug(
"Failed to allocate semaphore for NvKmsKapiDevice of GPU ID 0x%08x",
params->gpuId);
goto failed;
}
/* Raise the reference count of gpu. */
if (!nvkms_open_gpu(params->gpuId)) {
nvKmsKapiLogDebug("Failed to open GPU ID 0x%08x", params->gpuId);
goto failed;
}
device->gpuId = params->gpuId;
nvKmsKapiLogDebug(
"Allocating NvKmsKapiDevice 0x%p for GPU ID 0x%08x",
device,
device->gpuId);
/* Allocate RM object for NvKmsKapiDevice */
if (!RmAllocateDevice(device)) {
nvKmsKapiLogDebug(
"Failed to allocate RM objects for GPU ID 0x%08x",
device->gpuId);
goto failed;
}
/* Allocate NVKMS objects for NvKmsKapiDevice */
if (!KmsAllocateDevice(device)) {
nvKmsKapiLogDebug(
"Failed to allocate NVKMS objects for GPU ID 0x%08x",
device->gpuId);
goto failed;
}
device->privateData = params->privateData;
device->eventCallback = params->eventCallback;
return device;
failed:
FreeDevice(device);
return NULL;
}
static NvBool GrabOwnership(struct NvKmsKapiDevice *device)
{
struct NvKmsGrabOwnershipParams paramsGrab = { };
if (device->hKmsDevice == 0x0) {
return NV_TRUE;
}
paramsGrab.request.deviceHandle = device->hKmsDevice;
return nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_GRAB_OWNERSHIP,
&paramsGrab, sizeof(paramsGrab));
}
static void ReleaseOwnership(struct NvKmsKapiDevice *device)
{
struct NvKmsReleaseOwnershipParams paramsRelease = { };
if (device->hKmsDevice == 0x0) {
return;
}
paramsRelease.request.deviceHandle = device->hKmsDevice;
nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_RELEASE_OWNERSHIP,
&paramsRelease, sizeof(paramsRelease));
}
static NvBool GrantPermissions
(
NvS32 fd,
struct NvKmsKapiDevice *device,
NvU32 head,
NvKmsKapiDisplay display
)
{
struct NvKmsGrantPermissionsParams paramsGrant = { };
struct NvKmsPermissions *perm = &paramsGrant.request.permissions;
NvU32 dispIdx = device->dispIdx;
if (dispIdx >= ARRAY_LEN(perm->modeset.disp) ||
head >= ARRAY_LEN(perm->modeset.disp[0].head) || device == NULL) {
return NV_FALSE;
}
if (device->hKmsDevice == 0x0) {
return NV_TRUE;
}
perm->type = NV_KMS_PERMISSIONS_TYPE_MODESET;
perm->modeset.disp[dispIdx].head[head].dpyIdList =
nvAddDpyIdToEmptyDpyIdList(nvNvU32ToDpyId(display));
paramsGrant.request.fd = fd;
paramsGrant.request.deviceHandle = device->hKmsDevice;
return nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_GRANT_PERMISSIONS, &paramsGrant,
sizeof(paramsGrant));
}
static NvBool RevokePermissions
(
struct NvKmsKapiDevice *device,
NvU32 head,
NvKmsKapiDisplay display
)
{
struct NvKmsRevokePermissionsParams paramsRevoke = { };
struct NvKmsPermissions *perm = &paramsRevoke.request.permissions;
NvU32 dispIdx = device->dispIdx;
if (dispIdx >= ARRAY_LEN(perm->modeset.disp) ||
head >= ARRAY_LEN(perm->modeset.disp[0].head) || device == NULL) {
return NV_FALSE;
}
if (device->hKmsDevice == 0x0) {
return NV_TRUE;
}
perm->type = NV_KMS_PERMISSIONS_TYPE_MODESET;
perm->modeset.disp[dispIdx].head[head].dpyIdList =
nvAddDpyIdToEmptyDpyIdList(nvNvU32ToDpyId(display));
paramsRevoke.request.deviceHandle = device->hKmsDevice;
return nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_REVOKE_PERMISSIONS, &paramsRevoke,
sizeof(paramsRevoke));
}
static NvBool GrantSubOwnership
(
NvS32 fd,
struct NvKmsKapiDevice *device
)
{
struct NvKmsGrantPermissionsParams paramsGrant = { };
struct NvKmsPermissions *perm = &paramsGrant.request.permissions;
if (device->hKmsDevice == 0x0) {
return NV_TRUE;
}
perm->type = NV_KMS_PERMISSIONS_TYPE_SUB_OWNER;
paramsGrant.request.fd = fd;
paramsGrant.request.deviceHandle = device->hKmsDevice;
return nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_GRANT_PERMISSIONS, &paramsGrant,
sizeof(paramsGrant));
}
static NvBool RevokeSubOwnership
(
struct NvKmsKapiDevice *device
)
{
struct NvKmsRevokePermissionsParams paramsRevoke = { };
if (device->hKmsDevice == 0x0) {
return NV_TRUE;
}
paramsRevoke.request.permissionsTypeBitmask =
NVBIT(NV_KMS_PERMISSIONS_TYPE_FLIPPING) |
NVBIT(NV_KMS_PERMISSIONS_TYPE_MODESET) |
NVBIT(NV_KMS_PERMISSIONS_TYPE_SUB_OWNER);
paramsRevoke.request.deviceHandle = device->hKmsDevice;
return nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_REVOKE_PERMISSIONS, &paramsRevoke,
sizeof(paramsRevoke));
}
static NvBool DeclareEventInterest
(
const struct NvKmsKapiDevice *device,
const NvU32 interestMask
)
{
struct NvKmsDeclareEventInterestParams kmsEventParams = { };
if (device->hKmsDevice == 0x0 || device->eventCallback == NULL) {
return NV_TRUE;
}
kmsEventParams.request.interestMask =
interestMask & NVKMS_KAPI_SUPPORTED_EVENTS_MASK;
return nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_DECLARE_EVENT_INTEREST,
&kmsEventParams, sizeof(kmsEventParams));
}
static NvBool GetDeviceResourcesInfo
(
struct NvKmsKapiDevice *device,
struct NvKmsKapiDeviceResourcesInfo *info
)
{
struct NvKmsQueryDispParams paramsDisp = { };
NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS semsurfLayoutParams = { };
NvBool status = NV_FALSE;
NvU32 ret;
NvU32 i;
nvkms_memset(info, 0, sizeof(*info));
ret = nvRmApiControl(device->hRmClient,
device->hRmSubDevice,
NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT,
&semsurfLayoutParams,
sizeof(semsurfLayoutParams));
if (ret == NVOS_STATUS_SUCCESS) {
info->caps.semsurf.stride = semsurfLayoutParams.size;
info->caps.semsurf.maxSubmittedOffset =
semsurfLayoutParams.maxSubmittedSemaphoreValueOffset;
} else {
/* Non-fatal. No semaphore surface support. */
info->caps.semsurf.stride = 0;
info->caps.semsurf.maxSubmittedOffset = 0;
}
info->caps.hasVideoMemory = !device->isSOC;
info->caps.genericPageKind = device->caps.genericPageKind;
if (device->hKmsDevice == 0x0) {
info->caps.pitchAlignment = 0x1;
return NV_TRUE;
}
paramsDisp.request.deviceHandle = device->hKmsDevice;
paramsDisp.request.dispHandle = device->hKmsDisp;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_DISP,
&paramsDisp, sizeof(paramsDisp));
if (!status)
{
nvKmsKapiLogDeviceDebug(
device,
"Failed to query display engine information");
goto done;
}
info->numHeads = device->numHeads;
ct_assert(sizeof(info->numLayers) == sizeof(device->numLayers));
nvkms_memcpy(info->numLayers, device->numLayers, sizeof(device->numLayers));
ct_assert(ARRAY_LEN(info->connectorHandles) >=
ARRAY_LEN(paramsDisp.reply.connectorHandles));
info->numConnectors = paramsDisp.reply.numConnectors;
for (i = 0; i < paramsDisp.reply.numConnectors; i++) {
info->connectorHandles[i] = paramsDisp.reply.connectorHandles[i];
}
{
const struct NvKmsCompositionCapabilities *pCaps =
&device->caps.cursorCompositionCaps;
info->caps.validCursorCompositionModes =
pCaps->colorKeySelect[NVKMS_COMPOSITION_COLOR_KEY_SELECT_DISABLE].
supportedBlendModes[1];
}
for (i = 0; i < NVKMS_KAPI_LAYER_MAX; i++) {
if (i == NVKMS_KAPI_LAYER_PRIMARY_IDX) {
info->caps.layer[i].validCompositionModes =
NVBIT(NVKMS_COMPOSITION_BLENDING_MODE_OPAQUE);
} else {
const struct NvKmsCompositionCapabilities *pCaps =
&device->caps.overlayCompositionCaps;
info->caps.layer[i].validCompositionModes =
pCaps->colorKeySelect[NVKMS_COMPOSITION_COLOR_KEY_SELECT_DISABLE].
supportedBlendModes[1];
}
}
for (i = 0; i < NVKMS_KAPI_LAYER_MAX; i++) {
info->caps.layer[i].validRRTransforms =
device->caps.validLayerRRTransforms;
}
info->caps.maxWidthInPixels = device->caps.maxWidthInPixels;
info->caps.maxHeightInPixels = device->caps.maxHeightInPixels;
info->caps.maxCursorSizeInPixels = device->caps.maxCursorSizeInPixels;
info->caps.pitchAlignment = NV_EVO_PITCH_ALIGNMENT;
info->caps.supportsSyncpts = device->supportsSyncpts;
info->caps.supportedCursorSurfaceMemoryFormats =
NVBIT(NvKmsSurfaceMemoryFormatA8R8G8B8);
ct_assert(sizeof(info->supportedSurfaceMemoryFormats) ==
sizeof(device->supportedSurfaceMemoryFormats));
nvkms_memcpy(info->supportedSurfaceMemoryFormats,
device->supportedSurfaceMemoryFormats,
sizeof(device->supportedSurfaceMemoryFormats));
ct_assert(sizeof(info->supportsHDR) ==
sizeof(device->supportsHDR));
nvkms_memcpy(info->supportsHDR,
device->supportsHDR,
sizeof(device->supportsHDR));
done:
return status;
}
/*
* XXX Make it per-connector, query valid dpyId list as dynamic data of
* connector.
*/
static NvBool GetDisplays
(
struct NvKmsKapiDevice *device,
NvU32 *numDisplays, NvKmsKapiDisplay *displayHandles
)
{
struct NvKmsQueryDispParams paramsDisp = { };
NvBool status = NV_FALSE;
NVDpyId dpyId;
if (device->hKmsDevice == 0x0) {
*numDisplays = 0;
return NV_TRUE;
}
paramsDisp.request.deviceHandle = device->hKmsDevice;
paramsDisp.request.dispHandle = device->hKmsDisp;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_DISP,
&paramsDisp, sizeof(paramsDisp));
if (!status)
{
nvKmsKapiLogDeviceDebug(
device,
"Failed to query display engine information");
return NV_FALSE;
}
if (*numDisplays == 0) {
goto done;
}
if (*numDisplays < nvCountDpyIdsInDpyIdList(paramsDisp.reply.validDpys)) {
nvKmsKapiLogDebug(
"Size of display handle array is less than number of displays");
goto done;
}
FOR_ALL_DPY_IDS(dpyId, paramsDisp.reply.validDpys) {
*(displayHandles++) = nvDpyIdToNvU32(dpyId);
}
done:
*numDisplays = nvCountDpyIdsInDpyIdList(paramsDisp.reply.validDpys);
return NV_TRUE;
}
static NvBool GetConnectorInfo
(
struct NvKmsKapiDevice *device,
NvKmsKapiConnector connector, struct NvKmsKapiConnectorInfo *info
)
{
struct NvKmsQueryConnectorStaticDataParams paramsConnector = { };
NvBool status = NV_FALSE;
if (device == NULL || info == NULL) {
goto done;
}
paramsConnector.request.deviceHandle = device->hKmsDevice;
paramsConnector.request.dispHandle = device->hKmsDisp;
paramsConnector.request.connectorHandle = connector;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_CONNECTOR_STATIC_DATA,
&paramsConnector, sizeof(paramsConnector));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to query static data of connector 0x%08x",
connector);
goto done;
}
info->handle = connector;
info->physicalIndex = paramsConnector.reply.physicalIndex;
info->signalFormat = paramsConnector.reply.signalFormat;
info->type = paramsConnector.reply.type;
done:
return status;
}
static NvBool GetStaticDisplayInfo
(
struct NvKmsKapiDevice *device,
NvKmsKapiDisplay display, struct NvKmsKapiStaticDisplayInfo *info
)
{
struct NvKmsQueryDpyStaticDataParams paramsDpyStatic = { };
NvBool status = NV_FALSE;
if (device == NULL || info == NULL) {
goto done;
}
/* Query static data of display */
paramsDpyStatic.request.deviceHandle = device->hKmsDevice;
paramsDpyStatic.request.dispHandle = device->hKmsDisp;
paramsDpyStatic.request.dpyId = nvNvU32ToDpyId(display);
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_DPY_STATIC_DATA,
&paramsDpyStatic, sizeof(paramsDpyStatic));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to query static data of dpy 0x%08x",
display);
goto done;
}
info->handle = display;
info->connectorHandle = paramsDpyStatic.reply.connectorHandle;
ct_assert(sizeof(info->dpAddress) ==
sizeof(paramsDpyStatic.reply.dpAddress));
nvkms_memcpy(info->dpAddress,
paramsDpyStatic.reply.dpAddress,
sizeof(paramsDpyStatic.reply.dpAddress));
info->dpAddress[sizeof(paramsDpyStatic.reply.dpAddress) - 1] = '\0';
info->internal = paramsDpyStatic.reply.mobileInternal;
info->headMask = paramsDpyStatic.reply.headMask;
done:
return status;
}
static NvBool GetDynamicDisplayInfo(
struct NvKmsKapiDevice *device,
struct NvKmsKapiDynamicDisplayParams *params)
{
struct NvKmsQueryDpyDynamicDataParams *pParamsDpyDynamic = NULL;
NvBool status = NV_FALSE;
if (device == NULL || params == NULL) {
goto done;
}
pParamsDpyDynamic = nvKmsKapiCalloc(1, sizeof(*pParamsDpyDynamic));
if (pParamsDpyDynamic == NULL) {
goto done;
}
pParamsDpyDynamic->request.deviceHandle = device->hKmsDevice;
pParamsDpyDynamic->request.dispHandle = device->hKmsDisp;
pParamsDpyDynamic->request.dpyId = nvNvU32ToDpyId(params->handle);
if (params->overrideEdid) {
ct_assert(sizeof(params->edid.buffer) ==
sizeof(pParamsDpyDynamic->reply.edid.buffer));
nvkms_memcpy(
pParamsDpyDynamic->request.edid.buffer,
params->edid.buffer,
sizeof(pParamsDpyDynamic->request.edid.buffer));
pParamsDpyDynamic->request.edid.bufferSize = params->edid.bufferSize;
pParamsDpyDynamic->request.overrideEdid = NV_TRUE;
}
pParamsDpyDynamic->request.forceConnected = params->forceConnected;
pParamsDpyDynamic->request.forceDisconnected = params->forceDisconnected;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_DPY_DYNAMIC_DATA,
pParamsDpyDynamic, sizeof(*pParamsDpyDynamic));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to query dynamic data of dpy 0x%08x",
params->handle);
goto done;
}
params->connected = pParamsDpyDynamic->reply.connected;
if (pParamsDpyDynamic->reply.connected && !params->overrideEdid) {
NvBool vrrSupported =
(pParamsDpyDynamic->reply.vrrType != NVKMS_DPY_VRR_TYPE_NONE) ? NV_TRUE : NV_FALSE;
nvkms_memcpy(
params->edid.buffer,
pParamsDpyDynamic->reply.edid.buffer,
sizeof(params->edid.buffer));
params->edid.bufferSize = pParamsDpyDynamic->reply.edid.bufferSize;
params->vrrSupported = (vrrSupported && !device->caps.requiresVrrSemaphores) ? NV_TRUE : NV_FALSE;
}
done:
if (pParamsDpyDynamic != NULL) {
nvKmsKapiFree(pParamsDpyDynamic);
}
return status;
}
static NvBool GetVtFbInfo
(
struct NvKmsKapiDevice *device,
struct NvKmsKapiVtFbParams *pParam
)
{
struct NvKmsQueryVtFbDataParams params = { };
NvBool status = NV_FALSE;
if (device == NULL || pParam == NULL) {
goto done;
}
params.request.deviceHandle = device->hKmsDevice;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_VT_FB_DATA,
&params, sizeof(params));
if (!status)
{
nvKmsKapiLogDeviceDebug(
device,
"Failed to query VT framebuffer information");
goto done;
}
pParam->baseAddress = params.reply.baseAddress;
pParam->size = params.reply.size;
done:
return status;
}
static void FreeMemory
(
struct NvKmsKapiDevice *device, struct NvKmsKapiMemory *memory
)
{
if (device == NULL || memory == NULL) {
return;
}
if (memory->hRmHandle != 0x0) {
NvU32 ret;
ret = nvRmApiFree(device->hRmClient,
device->hRmDevice,
memory->hRmHandle);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to free RM memory object 0x%08x allocated for "
"NvKmsKapiMemory 0x%p",
memory->hRmHandle, memory);
}
nvKmsKapiFreeRmHandle(device, memory->hRmHandle);
}
nvKmsKapiFree(memory);
}
static struct NvKmsKapiMemory *AllocMemoryObjectAndHandle(
struct NvKmsKapiDevice *device,
NvU32 *handleOut
)
{
struct NvKmsKapiMemory *memory;
/* Allocate the container object */
memory = nvKmsKapiCalloc(1, sizeof(*memory));
if (memory == NULL) {
nvKmsKapiLogDebug(
"Failed to allocate memory for NVKMS memory object on "
"NvKmsKapiDevice 0x%p",
device);
return NULL;
}
/* Generate RM handle for memory object */
*handleOut = nvKmsKapiGenerateRmHandle(device);
if (*handleOut == 0x0) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to allocate RM handle for memory");
nvKmsKapiFree(memory);
return NULL;
}
return memory;
}
static struct NvKmsKapiMemory* AllocateVideoMemory
(
struct NvKmsKapiDevice *device,
enum NvKmsSurfaceMemoryLayout layout,
enum NvKmsKapiAllocationType type,
NvU64 size,
NvU8 *compressible
)
{
struct NvKmsKapiMemory *memory = NULL;
NvU32 hRmHandle;
memory = AllocMemoryObjectAndHandle(device, &hRmHandle);
if (!memory) {
return NULL;
}
if (!nvKmsKapiAllocateVideoMemory(device,
hRmHandle,
layout,
size,
type,
compressible)) {
nvKmsKapiFreeRmHandle(device, hRmHandle);
FreeMemory(device, memory);
return NULL;
}
memory->hRmHandle = hRmHandle;
memory->size = size;
memory->surfaceParams.layout = layout;
if (layout == NvKmsSurfaceMemoryLayoutBlockLinear) {
memory->surfaceParams.blockLinear.genericMemory = NV_TRUE;
}
return memory;
}
static struct NvKmsKapiMemory* AllocateSystemMemory
(
struct NvKmsKapiDevice *device,
enum NvKmsSurfaceMemoryLayout layout,
enum NvKmsKapiAllocationType type,
NvU64 size,
NvU8 *compressible
)
{
struct NvKmsKapiMemory *memory = NULL;
NvU32 hRmHandle;
memory = AllocMemoryObjectAndHandle(device, &hRmHandle);
if (!memory) {
return NULL;
}
if (!nvKmsKapiAllocateSystemMemory(device,
hRmHandle,
layout,
size,
type,
compressible)) {
nvKmsKapiFreeRmHandle(device, hRmHandle);
FreeMemory(device, memory);
return NULL;
}
memory->hRmHandle = hRmHandle;
memory->size = size;
memory->surfaceParams.layout = layout;
if (layout == NvKmsSurfaceMemoryLayoutBlockLinear) {
memory->surfaceParams.blockLinear.genericMemory = NV_TRUE;
}
return memory;
}
static struct NvKmsKapiMemory* ImportMemory
(
struct NvKmsKapiDevice *device,
NvU64 memorySize,
NvU64 nvKmsParamsUser,
NvU64 nvKmsParamsSize
)
{
struct NvKmsKapiPrivImportMemoryParams nvKmsParams, *pNvKmsParams = NULL;
NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS importParams = { };
struct NvKmsKapiMemory *memory = NULL;
NvU32 hMemory;
NvU32 ret;
int status;
/* Verify the driver-private params size and copy it in from userspace */
if (nvKmsParamsSize != sizeof(nvKmsParams)) {
nvKmsKapiLogDebug(
"NVKMS private memory import parameter size mismatch - "
"expected: 0x%llx, caller specified: 0x%llx",
(NvU64)sizeof(nvKmsParams), nvKmsParamsSize);
return NULL;
}
/*
* Use a heap allocation as the destination pointer passed to
* nvkms_copyin; stack allocations created within core NVKMS may not
* be recognizable to the Linux kernel's CONFIG_HARDENED_USERCOPY
* checker, triggering false errors. But then save the result to a
* variable on the stack, so that we can free the heap memory
* immediately and not worry about its lifetime.
*/
pNvKmsParams = nvKmsKapiCalloc(1, sizeof(*pNvKmsParams));
if (pNvKmsParams == NULL) {
nvKmsKapiLogDebug("Failed to allocate memory for ImportMemory");
return NULL;
}
status = nvkms_copyin(pNvKmsParams, nvKmsParamsUser, sizeof(*pNvKmsParams));
nvKmsParams = *pNvKmsParams;
nvKmsKapiFree(pNvKmsParams);
if (status != 0) {
nvKmsKapiLogDebug(
"NVKMS private memory import parameters could not be read from "
"userspace");
return NULL;
}
memory = AllocMemoryObjectAndHandle(device, &hMemory);
if (!memory) {
return NULL;
}
importParams.fd = nvKmsParams.memFd;
importParams.object.type = NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TYPE_RM;
importParams.object.data.rmObject.hDevice = device->hRmDevice;
importParams.object.data.rmObject.hParent = device->hRmDevice;
importParams.object.data.rmObject.hObject = hMemory;
ret = nvRmApiControl(device->hRmClient,
device->hRmClient,
NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECT_FROM_FD,
&importParams,
sizeof(importParams));
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to import RM memory object (%d) of size %llu bytes",
nvKmsParams.memFd, memorySize);
nvKmsKapiFreeRmHandle(device, hMemory);
goto failed;
}
memory->hRmHandle = hMemory;
memory->size = memorySize;
memory->surfaceParams = nvKmsParams.surfaceParams;
return memory;
failed:
FreeMemory(device, memory);
return NULL;
}
static struct NvKmsKapiMemory* DupMemory
(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiDevice *srcDevice,
const struct NvKmsKapiMemory *srcMemory
)
{
struct NvKmsKapiMemory *memory;
NvU32 hMemory;
NvU32 ret;
memory = AllocMemoryObjectAndHandle(device, &hMemory);
if (!memory) {
return NULL;
}
ret = nvRmApiDupObject(device->hRmClient,
device->hRmDevice,
hMemory,
srcDevice->hRmClient,
srcMemory->hRmHandle,
0);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to dup NVKMS memory object 0x%p (0x%08x, 0x%08x) "
"of size %llu bytes",
srcMemory, srcDevice->hRmClient, srcMemory->hRmHandle,
srcMemory->size);
nvKmsKapiFreeRmHandle(device, hMemory);
goto failed;
}
memory->hRmHandle = hMemory;
memory->size = srcMemory->size;
memory->surfaceParams = srcMemory->surfaceParams;
return memory;
failed:
FreeMemory(device, memory);
return NULL;
}
static NvBool ExportMemory
(
const struct NvKmsKapiDevice *device,
const struct NvKmsKapiMemory *memory,
NvU64 nvKmsParamsUser,
NvU64 nvKmsParamsSize
)
{
struct NvKmsKapiPrivExportMemoryParams nvKmsParams, *pNvKmsParams = NULL;
NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS exportParams = { };
int status;
NvU32 ret;
if (device == NULL || memory == NULL) {
nvKmsKapiLogDebug(
"Invalid device or memory parameter while exporting memory");
return NV_FALSE;
}
/* Verify the driver-private params size and copy it in from userspace */
if (nvKmsParamsSize != sizeof(nvKmsParams)) {
nvKmsKapiLogDebug(
"NVKMS private memory export parameter size mismatch - "
"expected: 0x%llx, caller specified: 0x%llx",
(NvU64)sizeof(nvKmsParams), nvKmsParamsSize);
return NV_FALSE;
}
/*
* Use a heap allocation as the destination pointer passed to
* nvkms_copyin; stack allocations created within core NVKMS may not
* be recognizable to the Linux kernel's CONFIG_HARDENED_USERCOPY
* checker, triggering false errors. But then save the result to a
* variable on the stack, so that we can free the heap memory
* immediately and not worry about its lifetime.
*/
pNvKmsParams = nvKmsKapiCalloc(1, sizeof(*pNvKmsParams));
if (pNvKmsParams == NULL) {
nvKmsKapiLogDebug("Failed to allocate scratch memory for ExportMemory");
return NV_FALSE;
}
status = nvkms_copyin(pNvKmsParams, nvKmsParamsUser, sizeof(*pNvKmsParams));
nvKmsParams = *pNvKmsParams;
nvKmsKapiFree(pNvKmsParams);
if (status != 0) {
nvKmsKapiLogDebug(
"NVKMS private memory export parameters could not be read from "
"userspace");
return NV_FALSE;
}
exportParams.fd = nvKmsParams.memFd;
exportParams.object.type = NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TYPE_RM;
exportParams.object.data.rmObject.hDevice = device->hRmDevice;
exportParams.object.data.rmObject.hParent = device->hRmDevice;
exportParams.object.data.rmObject.hObject = memory->hRmHandle;
ret = nvRmApiControl(device->hRmClient,
device->hRmClient,
NV0000_CTRL_CMD_OS_UNIX_EXPORT_OBJECT_TO_FD,
&exportParams,
sizeof(exportParams));
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to export RM memory object of size %llu bytes "
"to (%d)", memory->size, nvKmsParams.memFd);
return NV_FALSE;
}
return NV_TRUE;
}
static struct NvKmsKapiMemory*
GetSystemMemoryHandleFromDmaBufSgtHelper(struct NvKmsKapiDevice *device,
NvU32 descriptorType,
NvP64 descriptor,
NvU32 limit)
{
NvU32 ret;
NV_OS_DESC_MEMORY_ALLOCATION_PARAMS memAllocParams = {0};
struct NvKmsKapiMemory *memory = NULL;
NvU32 hRmHandle;
memory = AllocMemoryObjectAndHandle(device, &hRmHandle);
if (!memory) {
return NULL;
}
memAllocParams.type = NVOS32_TYPE_PRIMARY;
memAllocParams.descriptorType = descriptorType;
memAllocParams.descriptor = descriptor;
memAllocParams.limit = limit;
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _LOCATION, _PCI, memAllocParams.attr);
memAllocParams.attr2 =
FLD_SET_DRF(OS32, _ATTR2, _GPU_CACHEABLE, _NO, memAllocParams.attr2);
/* dmabuf import is currently only used for ISO memory. */
if (!device->isoIOCoherencyModes.coherent) {
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _COHERENCY, _WRITE_COMBINE,
memAllocParams.attr);
} else {
memAllocParams.attr =
FLD_SET_DRF(OS32, _ATTR, _COHERENCY, _WRITE_BACK,
memAllocParams.attr);
}
ret = nvRmApiAlloc(device->hRmClient,
device->hRmDevice,
hRmHandle,
NV01_MEMORY_SYSTEM_OS_DESCRIPTOR,
&memAllocParams);
if (ret != NVOS_STATUS_SUCCESS) {
nvKmsKapiLogDeviceDebug(
device,
"nvRmApiAlloc failed with error code 0x%08x",
ret);
nvKmsKapiFreeRmHandle(device, hRmHandle);
FreeMemory(device, memory);
return NULL;
}
memory->hRmHandle = hRmHandle;
memory->size = limit + 1;
memory->surfaceParams.layout = NvKmsSurfaceMemoryLayoutPitch;
return memory;
}
static struct NvKmsKapiMemory*
GetSystemMemoryHandleFromSgt(struct NvKmsKapiDevice *device,
NvP64 sgt,
NvP64 gem,
NvU32 limit)
{
NVOS32_DESCRIPTOR_TYPE_OS_SGT_PTR_PARAMETERS params = {
.sgt = sgt,
.gem = gem
};
return GetSystemMemoryHandleFromDmaBufSgtHelper(
device, NVOS32_DESCRIPTOR_TYPE_OS_SGT_PTR, &params, limit);
}
static struct NvKmsKapiMemory*
GetSystemMemoryHandleFromDmaBuf(struct NvKmsKapiDevice *device,
NvP64 dmaBuf,
NvU32 limit)
{
return GetSystemMemoryHandleFromDmaBufSgtHelper(
device, NVOS32_DESCRIPTOR_TYPE_OS_DMA_BUF_PTR, dmaBuf, limit);
}
static NvBool RmGc6BlockerRefCntAction(const struct NvKmsKapiDevice *device,
NvU32 action)
{
NV_STATUS status;
NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_PARAMS params = { 0 };
nvAssert((action == NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_INC) ||
(action == NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_DEC));
params.action = action;
status = nvRmApiControl(device->hRmClient,
device->hRmSubDevice,
NV2080_CTRL_CMD_OS_UNIX_GC6_BLOCKER_REFCNT,
&params,
sizeof(params));
if (status != NV_OK) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to modify GC6 blocker refcount for 0x%x, status: 0x%x",
device->hRmSubDevice, status);
return NV_FALSE;
}
return NV_TRUE;
}
static NvBool RmGc6BlockerRefCntInc(const struct NvKmsKapiDevice *device)
{
return RmGc6BlockerRefCntAction(
device,
NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_INC);
}
static NvBool RmGc6BlockerRefCntDec(const struct NvKmsKapiDevice *device)
{
return RmGc6BlockerRefCntAction(
device,
NV2080_CTRL_OS_UNIX_GC6_BLOCKER_REFCNT_DEC);
}
static NvBool GetMemoryPages
(
const struct NvKmsKapiDevice *device,
const struct NvKmsKapiMemory *memory,
NvU64 **pPages,
NvU32 *pNumPages
)
{
NV003E_CTRL_GET_SURFACE_NUM_PHYS_PAGES_PARAMS paramsGetNumPages = {};
NV003E_CTRL_GET_SURFACE_PHYS_PAGES_PARAMS paramsGetPages = {};
NvU64 *pages;
NV_STATUS status;
if (device == NULL || memory == NULL) {
return NV_FALSE;
}
status = nvRmApiControl(device->hRmClient,
memory->hRmHandle,
NV003E_CTRL_CMD_GET_SURFACE_NUM_PHYS_PAGES,
&paramsGetNumPages,
sizeof(paramsGetNumPages));
if (status != NV_OK) {
nvKmsKapiLogDeviceDebug(device,
"Failed to get number of physical allocation pages for RM"
"memory object 0x%x", memory->hRmHandle);
return NV_FALSE;
}
if (!paramsGetNumPages.numPages) {
return NV_FALSE;
}
pages = nvKmsKapiCalloc(paramsGetNumPages.numPages, sizeof(pages));
if (!pages) {
nvKmsKapiLogDeviceDebug(device, "Failed to allocate memory");
return NV_FALSE;
}
paramsGetPages.pPages = NV_PTR_TO_NvP64(pages);
paramsGetPages.numPages = paramsGetNumPages.numPages;
status = nvRmApiControl(device->hRmClient,
memory->hRmHandle,
NV003E_CTRL_CMD_GET_SURFACE_PHYS_PAGES,
&paramsGetPages,
sizeof(paramsGetPages));
if (status != NV_OK) {
nvKmsKapiFree(pages);
nvKmsKapiLogDeviceDebug(device,
"Failed to get physical allocation pages for RM"
"memory object 0x%x", memory->hRmHandle);
return NV_FALSE;
}
nvAssert(paramsGetPages.numPages == paramsGetNumPages.numPages);
*pPages = pages;
*pNumPages = paramsGetPages.numPages;
return NV_TRUE;
}
/*
* Check if the memory we are creating this framebuffer with is valid. We
* cannot scan out sysmem or compressed buffers.
*
* If we cannot use this memory for display it may be resident in sysmem
* or may belong to another GPU.
*/
static NvBool IsMemoryValidForDisplay
(
const struct NvKmsKapiDevice *device,
const struct NvKmsKapiMemory *memory
)
{
NV_STATUS status;
NV0041_CTRL_SURFACE_INFO surfaceInfo = {};
NV0041_CTRL_GET_SURFACE_INFO_PARAMS surfaceInfoParams = {};
if (device == NULL || memory == NULL) {
return NV_FALSE;
}
/*
* Don't do these checks on tegra. Tegra has different capabilities.
* Here we always say display is possible so we never fail framebuffer
* creation.
*/
if (device->isSOC) {
return NV_TRUE;
}
/* Get the type of address space this memory is in, i.e. vidmem or sysmem */
surfaceInfo.index = NV0041_CTRL_SURFACE_INFO_INDEX_ADDR_SPACE_TYPE;
surfaceInfoParams.surfaceInfoListSize = 1;
surfaceInfoParams.surfaceInfoList = (NvP64)&surfaceInfo;
status = nvRmApiControl(device->hRmClient,
memory->hRmHandle,
NV0041_CTRL_CMD_GET_SURFACE_INFO,
&surfaceInfoParams,
sizeof(surfaceInfoParams));
if (status != NV_OK) {
nvKmsKapiLogDeviceDebug(device,
"Failed to get memory location of RM memory object 0x%x",
memory->hRmHandle);
return NV_FALSE;
}
return surfaceInfo.data == NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE_VIDMEM;
}
static void FreeMemoryPages
(
NvU64 *pPages
)
{
nvKmsKapiFree(pPages);
}
static NvBool MapMemory
(
const struct NvKmsKapiDevice *device,
const struct NvKmsKapiMemory *memory, NvKmsKapiMappingType type,
void **ppLinearAddress
)
{
NV_STATUS status;
NvU32 flags = 0;
if (device == NULL || memory == NULL) {
return NV_FALSE;
}
switch (type) {
case NVKMS_KAPI_MAPPING_TYPE_USER:
/*
* Usermode clients can't be trusted not to access mappings while
* the GPU is in GC6.
*
* TODO: Revoke/restore mappings rather than blocking GC6
*/
if (!RmGc6BlockerRefCntInc(device)) {
return NV_FALSE;
}
flags |= DRF_DEF(OS33, _FLAGS, _MEM_SPACE, _USER);
break;
case NVKMS_KAPI_MAPPING_TYPE_KERNEL:
/*
* Kernel clients should ensure on their own that the GPU isn't in
* GC6 before making accesses to mapped vidmem surfaces.
*/
break;
}
status = nvRmApiMapMemory(
device->hRmClient,
device->hRmSubDevice,
memory->hRmHandle,
0,
memory->size,
ppLinearAddress,
flags);
if (status != NV_OK) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to Map RM memory object 0x%x allocated for NVKMemory 0x%p",
memory->hRmHandle, memory);
if (type == NVKMS_KAPI_MAPPING_TYPE_USER) {
RmGc6BlockerRefCntDec(device); // XXX Can't handle failure.
}
return NV_FALSE;
}
return NV_TRUE;
}
static void UnmapMemory
(
const struct NvKmsKapiDevice *device,
const struct NvKmsKapiMemory *memory, NvKmsKapiMappingType type,
const void *pLinearAddress
)
{
NV_STATUS status;
NvU32 flags = 0;
if (device == NULL || memory == NULL) {
return;
}
switch (type) {
case NVKMS_KAPI_MAPPING_TYPE_USER:
flags |= DRF_DEF(OS33, _FLAGS, _MEM_SPACE, _USER);
break;
case NVKMS_KAPI_MAPPING_TYPE_KERNEL:
break;
}
status =
nvRmApiUnmapMemory(device->hRmClient,
device->hRmSubDevice,
memory->hRmHandle,
pLinearAddress,
flags);
if (status != NV_OK) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to Ummap RM memory object 0x%x allocated for NVKMemory 0x%p",
memory->hRmHandle, memory);
}
if (type == NVKMS_KAPI_MAPPING_TYPE_USER) {
RmGc6BlockerRefCntDec(device); // XXX Can't handle failure.
}
}
static NvBool GetSurfaceParams(
struct NvKmsKapiCreateSurfaceParams *params,
NvU32 *pNumPlanes,
enum NvKmsSurfaceMemoryLayout *pLayout,
NvU32 *pLog2GobsPerBlockY,
NvU32 pitch[])
{
const NvKmsSurfaceMemoryFormatInfo *pFormatInfo =
nvKmsGetSurfaceMemoryFormatInfo(params->format);
enum NvKmsSurfaceMemoryLayout layout = NvKmsSurfaceMemoryLayoutPitch;
NvU32 log2GobsPerBlockY = 0;
NvU32 i;
if (pFormatInfo->numPlanes == 0)
{
nvKmsKapiLogDebug("Unknown surface format");
return NV_FALSE;
}
for (i = 0; i < pFormatInfo->numPlanes; i++) {
struct NvKmsKapiMemory *memory =
params->planes[i].memory;
if (memory == NULL) {
return FALSE;
}
pitch[i] = params->planes[i].pitch;
if (i == 0) {
if (params->explicit_layout) {
layout = params->layout;
} else {
layout = memory->surfaceParams.layout;
}
switch (layout) {
case NvKmsSurfaceMemoryLayoutBlockLinear:
if (params->explicit_layout) {
log2GobsPerBlockY = params->log2GobsPerBlockY;
} else {
log2GobsPerBlockY =
memory->surfaceParams.blockLinear.log2GobsPerBlock.y;
}
break;
case NvKmsSurfaceMemoryLayoutPitch:
log2GobsPerBlockY = 0;
break;
default:
nvKmsKapiLogDebug("Invalid surface layout: %u", layout);
return NV_FALSE;
}
} else {
if (!params->explicit_layout) {
if (layout != memory->surfaceParams.layout) {
nvKmsKapiLogDebug("All planes are not of same layout");
return FALSE;
}
if (layout == NvKmsSurfaceMemoryLayoutBlockLinear &&
log2GobsPerBlockY !=
memory->surfaceParams.blockLinear.log2GobsPerBlock.y) {
nvKmsKapiLogDebug(
"All planes do not have the same blocklinear parameters");
return FALSE;
}
}
}
if (layout == NvKmsSurfaceMemoryLayoutBlockLinear) {
if (params->explicit_layout) {
if (pitch[i] & 63) {
nvKmsKapiLogDebug(
"Invalid block-linear pitch alignment: %u", pitch[i]);
return NV_FALSE;
}
pitch[i] = pitch[i] >> 6;
} else {
/*
* The caller (nvidia-drm) is not blocklinear-aware, so the
* passed-in pitch cannot accurately reflect block information.
* Override the pitch with what was specified when the surface
* was imported.
*/
pitch[i] = memory->surfaceParams.blockLinear.pitchInBlocks;
}
} else {
pitch[i] = params->planes[i].pitch;
}
}
*pNumPlanes = pFormatInfo->numPlanes;
*pLayout = layout;
*pLog2GobsPerBlockY = log2GobsPerBlockY;
return NV_TRUE;
}
static struct NvKmsKapiSurface* CreateSurface
(
struct NvKmsKapiDevice *device,
struct NvKmsKapiCreateSurfaceParams *params
)
{
struct NvKmsRegisterSurfaceParams paramsReg = { };
NvBool status;
struct NvKmsKapiSurface *surface = NULL;
enum NvKmsSurfaceMemoryLayout layout = NvKmsSurfaceMemoryLayoutPitch;
NvU32 log2GobsPerBlockY = 0;
NvU32 numPlanes = 0;
NvU32 pitch[NVKMS_MAX_PLANES_PER_SURFACE] = { 0 };
NvU32 i;
if (!GetSurfaceParams(params,
&numPlanes,
&layout,
&log2GobsPerBlockY,
pitch))
{
goto failed;
}
surface = nvKmsKapiCalloc(1, sizeof(*surface));
if (surface == NULL) {
nvKmsKapiLogDebug(
"Failed to allocate memory for NVKMS surface object on "
"NvKmsKapiDevice 0x%p",
device);
goto failed;
}
if (device->hKmsDevice == 0x0) {
goto done;
}
/* Create NVKMS surface */
paramsReg.request.deviceHandle = device->hKmsDevice;
paramsReg.request.useFd = FALSE;
paramsReg.request.rmClient = device->hRmClient;
paramsReg.request.widthInPixels = params->width;
paramsReg.request.heightInPixels = params->height;
paramsReg.request.format = params->format;
paramsReg.request.layout = layout;
paramsReg.request.log2GobsPerBlockY = log2GobsPerBlockY;
for (i = 0; i < numPlanes; i++) {
struct NvKmsKapiMemory *memory =
params->planes[i].memory;
paramsReg.request.planes[i].u.rmObject = memory->hRmHandle;
paramsReg.request.planes[i].rmObjectSizeInBytes = memory->size;
paramsReg.request.planes[i].offset = params->planes[i].offset;
paramsReg.request.planes[i].pitch = pitch[i];
}
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_REGISTER_SURFACE,
&paramsReg, sizeof(paramsReg));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to register NVKMS surface of dimensions %ux%u "
"and %s format",
params->width,
params->height,
nvKmsSurfaceMemoryFormatToString(params->format));
goto failed;
}
surface->hKmsHandle = paramsReg.reply.surfaceHandle;
done:
return surface;
failed:
nvKmsKapiFree(surface);
return NULL;
}
static void DestroySurface
(
struct NvKmsKapiDevice *device, struct NvKmsKapiSurface *surface
)
{
struct NvKmsUnregisterSurfaceParams paramsUnreg = { };
NvBool status;
if (device->hKmsDevice == 0x0) {
goto done;
}
paramsUnreg.request.deviceHandle = device->hKmsDevice;
paramsUnreg.request.surfaceHandle = surface->hKmsHandle;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_UNREGISTER_SURFACE,
&paramsUnreg, sizeof(paramsUnreg));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to unregister NVKMS surface registered for "
"NvKmsKapiSurface 0x%p",
surface);
}
done:
nvKmsKapiFree(surface);
}
/*
* Helper function to convert NvKmsMode to NvKmsKapiDisplayMode.
*/
static void NvKmsModeToKapi
(
const struct NvKmsMode *kmsMode,
struct NvKmsKapiDisplayMode *mode
)
{
const NvModeTimings *timings = &kmsMode->timings;
nvkms_memset(mode, 0, sizeof(*mode));
mode->timings.refreshRate = timings->RRx1k;
mode->timings.pixelClockHz = timings->pixelClockHz;
mode->timings.hVisible = timings->hVisible;
mode->timings.hSyncStart = timings->hSyncStart;
mode->timings.hSyncEnd = timings->hSyncEnd;
mode->timings.hTotal = timings->hTotal;
mode->timings.hSkew = timings->hSkew;
mode->timings.vVisible = timings->vVisible;
mode->timings.vSyncStart = timings->vSyncStart;
mode->timings.vSyncEnd = timings->vSyncEnd;
mode->timings.vTotal = timings->vTotal;
mode->timings.flags.interlaced = timings->interlaced;
mode->timings.flags.doubleScan = timings->doubleScan;
mode->timings.flags.hSyncPos = timings->hSyncPos;
mode->timings.flags.hSyncNeg = timings->hSyncNeg;
mode->timings.flags.vSyncPos = timings->vSyncPos;
mode->timings.flags.vSyncNeg = timings->vSyncNeg;
mode->timings.widthMM = timings->sizeMM.w;
mode->timings.heightMM = timings->sizeMM.h;
ct_assert(sizeof(mode->name) == sizeof(kmsMode->name));
nvkms_memcpy(mode->name, kmsMode->name, sizeof(mode->name));
}
static void InitNvKmsModeValidationParams(
const struct NvKmsKapiDevice *device,
struct NvKmsModeValidationParams *params)
{
/*
* Mode timings structures of KAPI clients may not have field like
* RRx1k, it does not guarantee that computed RRx1k value during
* conversion from -
* KAPI client's mode-timings structure
* -> NvKmsKapiDisplayMode -> NvModeTimings
* is same as what we get from edid, this may cause mode-set to fail.
*
* The RRx1k filed don't impact hardware modetiming values, therefore
* override RRx1k check.
*
* XXX NVKMS TODO: Bug 200156338 is filed to delete NvModeTimings::RRx1k
* if possible.
*/
params->overrides = NVKMS_MODE_VALIDATION_NO_RRX1K_CHECK;
}
static int GetDisplayMode
(
struct NvKmsKapiDevice *device,
NvKmsKapiDisplay display, NvU32 modeIndex,
struct NvKmsKapiDisplayMode *mode, NvBool *valid,
NvBool *preferredMode
)
{
struct NvKmsValidateModeIndexParams paramsValidate = { };
NvBool status;
if (device == NULL) {
return -1;
}
paramsValidate.request.deviceHandle = device->hKmsDevice;
paramsValidate.request.dispHandle = device->hKmsDisp;
paramsValidate.request.dpyId = nvNvU32ToDpyId(display);
InitNvKmsModeValidationParams(device,
&paramsValidate.request.modeValidation);
paramsValidate.request.modeIndex = modeIndex;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_VALIDATE_MODE_INDEX,
&paramsValidate, sizeof(paramsValidate));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to get validated mode index 0x%x for NvKmsKapiDisplay 0x%08x",
modeIndex, display);
return -1;
}
if (mode != NULL) {
NvKmsModeToKapi(&paramsValidate.reply.mode, mode);
}
if (valid != NULL) {
*valid = paramsValidate.reply.valid;
}
if (preferredMode != NULL) {
*preferredMode = paramsValidate.reply.preferredMode;
}
return paramsValidate.reply.end ? 0 : 1;
}
/*
* Helper function to convert NvKmsKapiDisplayMode to NvKmsMode.
*/
static void NvKmsKapiDisplayModeToKapi
(
const struct NvKmsKapiDisplayMode *mode,
struct NvKmsMode *kmsMode
)
{
NvModeTimings *timings = &kmsMode->timings;
nvkms_memset(kmsMode, 0, sizeof(*kmsMode));
nvkms_memcpy(kmsMode->name, mode->name, sizeof(mode->name));
timings->RRx1k = mode->timings.refreshRate;
timings->pixelClockHz = mode->timings.pixelClockHz;
timings->hVisible = mode->timings.hVisible;
timings->hSyncStart = mode->timings.hSyncStart;
timings->hSyncEnd = mode->timings.hSyncEnd;
timings->hTotal = mode->timings.hTotal;
timings->hSkew = mode->timings.hSkew;
timings->vVisible = mode->timings.vVisible;
timings->vSyncStart = mode->timings.vSyncStart;
timings->vSyncEnd = mode->timings.vSyncEnd;
timings->vTotal = mode->timings.vTotal;
timings->interlaced = mode->timings.flags.interlaced;
timings->doubleScan = mode->timings.flags.doubleScan;
timings->hSyncPos = mode->timings.flags.hSyncPos;
timings->hSyncNeg = mode->timings.flags.hSyncNeg;
timings->vSyncPos = mode->timings.flags.vSyncPos;
timings->vSyncNeg = mode->timings.flags.vSyncNeg;
timings->sizeMM.w = mode->timings.widthMM;
timings->sizeMM.h = mode->timings.heightMM;
}
static NvBool ValidateDisplayMode
(
struct NvKmsKapiDevice *device,
NvKmsKapiDisplay display, const struct NvKmsKapiDisplayMode *mode
)
{
struct NvKmsValidateModeParams paramsValidate;
NvBool status;
if (device == NULL) {
return NV_FALSE;
}
nvkms_memset(&paramsValidate, 0, sizeof(paramsValidate));
paramsValidate.request.deviceHandle = device->hKmsDevice;
paramsValidate.request.dispHandle = device->hKmsDisp;
paramsValidate.request.dpyId = nvNvU32ToDpyId(display);
InitNvKmsModeValidationParams(device,
&paramsValidate.request.modeValidation);
NvKmsKapiDisplayModeToKapi(mode, &paramsValidate.request.mode);
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_VALIDATE_MODE,
&paramsValidate, sizeof(paramsValidate));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"Failed to get validated mode %ux%u@%uHz for NvKmsKapiDisplay 0x%08x of "
"NvKmsKapiDevice 0x%p",
mode->timings.hVisible, mode->timings.vVisible,
mode->timings.refreshRate/1000, display,
device);
return NV_FALSE;
}
return paramsValidate.reply.valid;
}
static NvBool AssignSyncObjectConfig(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiLayerConfig *pLayerConfig,
struct NvKmsChannelSyncObjects *pSyncObject)
{
if (!device->supportsSyncpts) {
if (pLayerConfig->syncptParams.preSyncptSpecified ||
pLayerConfig->syncptParams.postSyncptRequested) {
return NV_FALSE;
}
}
pSyncObject->useSyncpt = FALSE;
if (pLayerConfig->syncptParams.preSyncptSpecified) {
pSyncObject->useSyncpt = TRUE;
pSyncObject->u.syncpts.pre.type = NVKMS_SYNCPT_TYPE_RAW;
pSyncObject->u.syncpts.pre.u.raw.id = pLayerConfig->syncptParams.preSyncptId;
pSyncObject->u.syncpts.pre.u.raw.value = pLayerConfig->syncptParams.preSyncptValue;
}
if (pLayerConfig->syncptParams.postSyncptRequested) {
pSyncObject->useSyncpt = TRUE;
pSyncObject->u.syncpts.requestedPostType = NVKMS_SYNCPT_TYPE_FD;
}
return NV_TRUE;
}
static void AssignHDRMetadataConfig(
const struct NvKmsKapiLayerConfig *layerConfig,
const NvU32 layer,
struct NvKmsFlipCommonParams *params)
{
if (layerConfig->hdrMetadataSpecified) {
params->layer[layer].hdr.enabled = TRUE;
params->layer[layer].hdr.specified = TRUE;
params->layer[layer].hdr.staticMetadata = layerConfig->hdrMetadata;
} else {
params->layer[layer].hdr.enabled = FALSE;
params->layer[layer].hdr.specified = TRUE;
}
}
static void NvKmsKapiCursorConfigToKms(
const struct NvKmsKapiCursorRequestedConfig *requestedConfig,
struct NvKmsFlipCommonParams *params,
NvBool bFromKmsSetMode)
{
if (requestedConfig->flags.surfaceChanged || bFromKmsSetMode) {
params->cursor.imageSpecified = NV_TRUE;
if (requestedConfig->surface != NULL) {
params->cursor.image.surfaceHandle[NVKMS_LEFT] =
requestedConfig->surface->hKmsHandle;
}
params->cursor.image.cursorCompParams.colorKeySelect =
NVKMS_COMPOSITION_COLOR_KEY_SELECT_DISABLE;
params->cursor.image.cursorCompParams.blendingMode[1] =
requestedConfig->compParams.compMode;
params->cursor.image.cursorCompParams.surfaceAlpha =
requestedConfig->compParams.surfaceAlpha;
}
if (requestedConfig->flags.dstXYChanged || bFromKmsSetMode) {
params->cursor.position.x = requestedConfig->dstX;
params->cursor.position.y = requestedConfig->dstY;
params->cursor.positionSpecified = NV_TRUE;
}
}
static NvBool NvKmsKapiOverlayLayerConfigToKms(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiLayerRequestedConfig *layerRequestedConfig,
const NvU32 layer,
const NvU32 head,
struct NvKmsFlipCommonParams *params,
NvBool commit,
NvBool bFromKmsSetMode)
{
NvBool ret = NV_FALSE;
const struct NvKmsKapiLayerConfig *layerConfig =
&layerRequestedConfig->config;
if (layerRequestedConfig->flags.surfaceChanged || bFromKmsSetMode) {
params->layer[layer].syncObjects.specified = NV_TRUE;
params->layer[layer].completionNotifier.specified = NV_TRUE;
params->layer[layer].surface.specified = NV_TRUE;
if (layerConfig->surface != NULL) {
params->layer[layer].surface.handle[NVKMS_LEFT] =
layerConfig->surface->hKmsHandle;
}
params->layer[layer].surface.rrParams =
layerConfig->rrParams;
params->layer[layer].compositionParams.val.colorKeySelect =
NVKMS_COMPOSITION_COLOR_KEY_SELECT_DISABLE;
params->layer[layer].compositionParams.val.blendingMode[1] =
layerConfig->compParams.compMode;
params->layer[layer].compositionParams.val.surfaceAlpha =
layerConfig->compParams.surfaceAlpha;
params->layer[layer].compositionParams.specified = TRUE;
params->layer[layer].minPresentInterval =
layerConfig->minPresentInterval;
}
params->layer[layer].sizeIn.val.width = layerConfig->srcWidth;
params->layer[layer].sizeIn.val.height = layerConfig->srcHeight;
params->layer[layer].sizeIn.specified = TRUE;
params->layer[layer].sizeOut.val.width = layerConfig->dstWidth;
params->layer[layer].sizeOut.val.height = layerConfig->dstHeight;
params->layer[layer].sizeOut.specified = TRUE;
if (layerRequestedConfig->flags.dstXYChanged || bFromKmsSetMode) {
params->layer[layer].outputPosition.val.x = layerConfig->dstX;
params->layer[layer].outputPosition.val.y = layerConfig->dstY;
params->layer[layer].outputPosition.specified = NV_TRUE;
}
params->layer[layer].colorSpace.val = layerConfig->inputColorSpace;
params->layer[layer].colorSpace.specified = TRUE;
AssignHDRMetadataConfig(layerConfig, layer, params);
if (commit) {
NvU32 nextIndex = NVKMS_KAPI_INC_NOTIFIER_INDEX(
device->layerState[head][layer].
currFlipNotifierIndex);
if (layerConfig->surface != NULL) {
NvU32 nextIndexOffsetInBytes =
NVKMS_KAPI_NOTIFIER_OFFSET(head,
layer, nextIndex);
params->layer[layer].completionNotifier.val.
surface.surfaceHandle = device->notifier.hKmsHandle;
params->layer[layer].completionNotifier.val.
surface.format = device->notifier.format;
params->layer[layer].completionNotifier.val.
surface.offsetInWords = nextIndexOffsetInBytes >> 2;
params->layer[layer].completionNotifier.val.awaken = NV_TRUE;
}
ret = AssignSyncObjectConfig(device,
layerConfig,
&params->layer[layer].syncObjects.val);
if (ret == NV_FALSE) {
return ret;
}
/*
* XXX Should this be done after commit?
* What if commit fail?
*
* It is not expected to fail any commit in KAPI layer,
* only validated configuration is expected
* to commit.
*/
device->layerState[head][layer].
currFlipNotifierIndex = nextIndex;
}
return NV_TRUE;
}
static NvBool NvKmsKapiPrimaryLayerConfigToKms(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiLayerRequestedConfig *layerRequestedConfig,
const NvU32 head,
struct NvKmsFlipCommonParams *params,
NvBool commit,
NvBool bFromKmsSetMode)
{
NvBool ret = NV_FALSE;
const struct NvKmsKapiLayerConfig *layerConfig =
&layerRequestedConfig->config;
NvBool changed = FALSE;
if (layerRequestedConfig->flags.surfaceChanged || bFromKmsSetMode) {
params->layer[NVKMS_MAIN_LAYER].surface.specified = NV_TRUE;
params->layer[NVKMS_MAIN_LAYER].completionNotifier.specified = NV_TRUE;
params->layer[NVKMS_MAIN_LAYER].syncObjects.specified = NV_TRUE;
params->layer[NVKMS_MAIN_LAYER].minPresentInterval =
layerConfig->minPresentInterval;
params->layer[NVKMS_MAIN_LAYER].tearing = layerConfig->tearing;
params->layer[NVKMS_MAIN_LAYER].surface.rrParams = layerConfig->rrParams;
if (layerConfig->surface != NULL) {
params->layer[NVKMS_MAIN_LAYER].surface.handle[0] =
layerConfig->surface->hKmsHandle;
if (params->layer[NVKMS_MAIN_LAYER].surface.handle[0] != 0) {
params->layer[NVKMS_MAIN_LAYER].sizeIn.val.width = layerConfig->srcWidth;
params->layer[NVKMS_MAIN_LAYER].sizeIn.val.height = layerConfig->srcHeight;
params->layer[NVKMS_MAIN_LAYER].sizeIn.specified = TRUE;
params->layer[NVKMS_MAIN_LAYER].sizeOut.val.width = layerConfig->dstWidth;
params->layer[NVKMS_MAIN_LAYER].sizeOut.val.height = layerConfig->dstHeight;
params->layer[NVKMS_MAIN_LAYER].sizeOut.specified = TRUE;
}
}
changed = TRUE;
}
if (layerRequestedConfig->flags.srcXYChanged || bFromKmsSetMode) {
params->viewPortIn.point.x = layerConfig->srcX;
params->viewPortIn.point.y = layerConfig->srcY;
params->viewPortIn.specified = NV_TRUE;
changed = TRUE;
}
params->layer[NVKMS_MAIN_LAYER].colorSpace.val = layerConfig->inputColorSpace;
params->layer[NVKMS_MAIN_LAYER].colorSpace.specified = TRUE;
AssignHDRMetadataConfig(layerConfig, NVKMS_MAIN_LAYER, params);
if (commit && changed) {
NvU32 nextIndex = NVKMS_KAPI_INC_NOTIFIER_INDEX(
device->layerState[head][NVKMS_MAIN_LAYER].
currFlipNotifierIndex);
if (layerConfig->surface != NULL) {
NvU32 nextIndexOffsetInBytes =
NVKMS_KAPI_NOTIFIER_OFFSET(head,
NVKMS_MAIN_LAYER, nextIndex);
params->layer[NVKMS_MAIN_LAYER].completionNotifier.
val.surface.surfaceHandle = device->notifier.hKmsHandle;
params->layer[NVKMS_MAIN_LAYER].completionNotifier.
val.surface.format = device->notifier.format;
params->layer[NVKMS_MAIN_LAYER].completionNotifier.
val.surface.offsetInWords = nextIndexOffsetInBytes >> 2;
params->layer[NVKMS_MAIN_LAYER].completionNotifier.val.awaken = NV_TRUE;
}
ret = AssignSyncObjectConfig(device,
layerConfig,
&params->layer[NVKMS_MAIN_LAYER].syncObjects.val);
if (ret == NV_FALSE) {
return ret;
}
/*
* XXX Should this be done after commit?
* What if commit fail?
*
* It is not expected to fail any commit in KAPI layer,
* only validated configuration is expected
* to commit.
*/
device->layerState[head][NVKMS_MAIN_LAYER].
currFlipNotifierIndex = nextIndex;
}
return NV_TRUE;
}
static NvBool NvKmsKapiLayerConfigToKms(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiLayerRequestedConfig *layerRequestedConfig,
const NvU32 layer,
const NvU32 head,
struct NvKmsFlipCommonParams *params,
NvBool commit,
NvBool bFromKmsSetMode)
{
if (layer == NVKMS_KAPI_LAYER_PRIMARY_IDX) {
return NvKmsKapiPrimaryLayerConfigToKms(device,
layerRequestedConfig,
head,
params,
commit,
bFromKmsSetMode);
}
return NvKmsKapiOverlayLayerConfigToKms(device,
layerRequestedConfig,
layer,
head,
params,
commit,
bFromKmsSetMode);
}
static NvBool GetOutputTransferFunction(
const struct NvKmsKapiHeadRequestedConfig *headRequestedConfig,
enum NvKmsOutputTf *tf)
{
NvBool found = NV_FALSE;
NvU32 layer;
*tf = NVKMS_OUTPUT_TF_NONE;
for (layer = 0;
layer < ARRAY_LEN(headRequestedConfig->layerRequestedConfig);
layer++) {
const struct NvKmsKapiLayerRequestedConfig *layerRequestedConfig =
&headRequestedConfig->layerRequestedConfig[layer];
const struct NvKmsKapiLayerConfig *layerConfig =
&layerRequestedConfig->config;
if (layerConfig->hdrMetadataSpecified) {
if (!found) {
*tf = layerConfig->tf;
found = NV_TRUE;
} else if (*tf != layerConfig->tf) {
nvKmsKapiLogDebug(
"Output transfer function should be the same for all layers on a head");
return NV_FALSE;
}
}
}
return NV_TRUE;
}
/*
* Helper function to convert NvKmsKapiRequestedModeSetConfig
* to NvKmsSetModeParams.
*/
static NvBool NvKmsKapiRequestedModeSetConfigToKms(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiRequestedModeSetConfig *requestedConfig,
struct NvKmsSetModeParams *params,
NvBool commit)
{
NvU32 dispIdx = device->dispIdx;
NvU32 head;
nvkms_memset(params, 0, sizeof(*params));
params->request.commit = commit;
params->request.deviceHandle = device->hKmsDevice;
params->request.requestedDispsBitMask = 1 << dispIdx;
for (head = 0;
head < ARRAY_LEN(requestedConfig->headRequestedConfig); head++) {
const struct NvKmsKapiHeadRequestedConfig *headRequestedConfig =
&requestedConfig->headRequestedConfig[head];
const struct NvKmsKapiHeadModeSetConfig *headModeSetConfig =
&headRequestedConfig->modeSetConfig;
struct NvKmsSetModeOneHeadRequest *paramsHead;
enum NvKmsOutputTf tf;
NvU32 layer;
NvU32 i;
if ((requestedConfig->headsMask & (1 << head)) == 0x0) {
continue;
}
params->request.disp[dispIdx].requestedHeadsBitMask |= 1 << head;
if (headModeSetConfig->numDisplays == 0) {
continue;
}
if (params->request.commit && !headModeSetConfig->bActive) {
continue;
}
paramsHead = &params->request.disp[dispIdx].head[head];
InitNvKmsModeValidationParams(device,
&paramsHead->modeValidationParams);
for (i = 0; i < headModeSetConfig->numDisplays; i++) {
paramsHead->dpyIdList = nvAddDpyIdToDpyIdList(
nvNvU32ToDpyId(headModeSetConfig->displays[i]),
paramsHead->dpyIdList);
}
NvKmsKapiDisplayModeToKapi(&headModeSetConfig->mode, &paramsHead->mode);
NvKmsKapiCursorConfigToKms(&headRequestedConfig->cursorRequestedConfig,
&paramsHead->flip,
NV_TRUE /* bFromKmsSetMode */);
for (layer = 0;
layer < ARRAY_LEN(headRequestedConfig->layerRequestedConfig);
layer++) {
const struct NvKmsKapiLayerRequestedConfig *layerRequestedConfig =
&headRequestedConfig->layerRequestedConfig[layer];
if (!NvKmsKapiLayerConfigToKms(device,
layerRequestedConfig,
layer,
head,
&paramsHead->flip,
commit,
NV_TRUE /* bFromKmsSetMode */)) {
return NV_FALSE;
}
}
if (!GetOutputTransferFunction(headRequestedConfig, &tf)) {
return NV_FALSE;
}
paramsHead->flip.tf.val = tf;
paramsHead->flip.tf.specified = NV_TRUE;
paramsHead->viewPortSizeIn.width =
headModeSetConfig->mode.timings.hVisible;
paramsHead->viewPortSizeIn.height =
headModeSetConfig->mode.timings.vVisible;
if (device->caps.requiresVrrSemaphores) {
paramsHead->allowGsync = NV_FALSE;
paramsHead->allowAdaptiveSync = NVKMS_ALLOW_ADAPTIVE_SYNC_DISABLED;
} else {
paramsHead->allowGsync = NV_TRUE;
paramsHead->allowAdaptiveSync = NVKMS_ALLOW_ADAPTIVE_SYNC_ALL;
}
}
return NV_TRUE;
}
static NvBool KmsSetMode(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiRequestedModeSetConfig *requestedConfig,
const NvBool commit)
{
struct NvKmsSetModeParams *params = NULL;
NvBool status = NV_FALSE;
params = nvKmsKapiCalloc(1, sizeof(*params));
if (params == NULL) {
goto done;
}
if (!NvKmsKapiRequestedModeSetConfigToKms(device,
requestedConfig,
params,
commit)) {
goto done;
}
status = nvkms_ioctl_from_kapi_try_pmlock(device->pKmsOpen,
NVKMS_IOCTL_SET_MODE,
params, sizeof(*params));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"NVKMS_IOCTL_SET_MODE ioctl failed");
goto done;
}
if (params->reply.status != NVKMS_SET_MODE_STATUS_SUCCESS)
{
int i;
nvKmsKapiLogDeviceDebug(
device,
"NVKMS_IOCTL_SET_MODE failed! Status:\n");
nvKmsKapiLogDeviceDebug(
device,
" top-level status: %d\n", params->reply.status);
nvKmsKapiLogDeviceDebug(
device,
" disp0 status: %d\n", params->reply.disp[0].status);
for (i = 0; i < ARRAY_LEN(params->reply.disp[0].head); i++)
{
nvKmsKapiLogDeviceDebug(
device,
" head%d status: %d\n",
i, params->reply.disp[0].head[i].status);
}
status = NV_FALSE;
}
done:
if (params != NULL) {
nvKmsKapiFree(params);
}
return status;
}
static NvBool IsHeadConfigValid(
const struct NvKmsFlipParams *params,
const struct NvKmsKapiRequestedModeSetConfig *requestedConfig,
const struct NvKmsKapiHeadModeSetConfig *headModeSetConfig,
NvU32 head)
{
if ((requestedConfig->headsMask & (1 << head)) == 0x0) {
return NV_FALSE;
}
if (headModeSetConfig->numDisplays == 0) {
return NV_FALSE;
}
if (params->request.commit && !headModeSetConfig->bActive) {
return NV_FALSE;
}
return NV_TRUE;
}
static NvBool KmsFlip(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiRequestedModeSetConfig *requestedConfig,
struct NvKmsKapiModeSetReplyConfig *replyConfig,
const NvBool commit)
{
struct NvKmsFlipParams *params = NULL;
struct NvKmsFlipRequestOneHead *pFlipHead = NULL;
NvBool status = NV_TRUE;
NvU32 i, head;
/* Allocate space for the params structure, plus space for each possible
* head. */
params = nvKmsKapiCalloc(1,
sizeof(*params) + sizeof(pFlipHead[0]) * NVKMS_KAPI_MAX_HEADS);
if (params == NULL) {
return NV_FALSE;
}
/* The flipHead array was allocated in the same block above. */
pFlipHead = (struct NvKmsFlipRequestOneHead *)(params + 1);
params->request.deviceHandle = device->hKmsDevice;
params->request.commit = commit;
params->request.allowVrr = NV_FALSE;
params->request.pFlipHead = nvKmsPointerToNvU64(pFlipHead);
params->request.numFlipHeads = 0;
for (head = 0;
head < ARRAY_LEN(requestedConfig->headRequestedConfig); head++) {
const struct NvKmsKapiHeadRequestedConfig *headRequestedConfig =
&requestedConfig->headRequestedConfig[head];
const struct NvKmsKapiHeadModeSetConfig *headModeSetConfig =
&headRequestedConfig->modeSetConfig;
enum NvKmsOutputTf tf;
struct NvKmsFlipCommonParams *flipParams = NULL;
NvU32 layer;
if (!IsHeadConfigValid(params, requestedConfig, headModeSetConfig, head)) {
continue;
}
pFlipHead[params->request.numFlipHeads].sd = 0;
pFlipHead[params->request.numFlipHeads].head = head;
flipParams = &pFlipHead[params->request.numFlipHeads].flip;
params->request.numFlipHeads++;
NvKmsKapiCursorConfigToKms(&headRequestedConfig->cursorRequestedConfig,
flipParams,
NV_FALSE /* bFromKmsSetMode */);
for (layer = 0;
layer < ARRAY_LEN(headRequestedConfig->layerRequestedConfig);
layer++) {
const struct NvKmsKapiLayerRequestedConfig
*layerRequestedConfig =
&headRequestedConfig->layerRequestedConfig[layer];
status = NvKmsKapiLayerConfigToKms(device,
layerRequestedConfig,
layer,
head,
flipParams,
commit,
NV_FALSE /* bFromKmsSetMode */);
if (status != NV_TRUE) {
goto done;
}
}
status = GetOutputTransferFunction(headRequestedConfig, &tf);
if (status != NV_TRUE) {
goto done;
}
flipParams->tf.val = tf;
flipParams->tf.specified = NV_TRUE;
if (headModeSetConfig->vrrEnabled) {
params->request.allowVrr = NV_TRUE;
}
}
if (params->request.numFlipHeads == 0) {
goto done;
}
status = nvkms_ioctl_from_kapi_try_pmlock(device->pKmsOpen,
NVKMS_IOCTL_FLIP,
params, sizeof(*params));
if (!status) {
nvKmsKapiLogDeviceDebug(
device,
"NVKMS_IOCTL_FLIP ioctl failed");
goto done;
}
if (!commit) {
goto done;
}
/*! fill back flip reply */
for (i = 0; i < params->request.numFlipHeads; i++) {
const struct NvKmsKapiHeadRequestedConfig *headRequestedConfig =
&requestedConfig->headRequestedConfig[pFlipHead[i].head];
struct NvKmsKapiHeadReplyConfig *headReplyConfig =
&replyConfig->headReplyConfig[pFlipHead[i].head];
const struct NvKmsKapiHeadModeSetConfig *headModeSetConfig =
&headRequestedConfig->modeSetConfig;
struct NvKmsFlipCommonReplyOneHead *flipParams = &params->reply.flipHead[i];
NvU32 layer;
if (!IsHeadConfigValid(params, requestedConfig, headModeSetConfig, pFlipHead[i].head)) {
continue;
}
for (layer = 0;
layer < ARRAY_LEN(headRequestedConfig->layerRequestedConfig);
layer++) {
const struct NvKmsKapiLayerConfig *layerRequestedConfig =
&headRequestedConfig->layerRequestedConfig[layer].config;
struct NvKmsKapiLayerReplyConfig *layerReplyConfig =
&headReplyConfig->layerReplyConfig[layer];
/*! initialize explicitly to -1 as 0 is valid file descriptor */
layerReplyConfig->postSyncptFd = -1;
if (layerRequestedConfig->syncptParams.postSyncptRequested) {
layerReplyConfig->postSyncptFd =
flipParams->layer[layer].postSyncpt.u.fd;
}
}
}
done:
nvKmsKapiFree(params);
return status;
}
static NvBool ApplyModeSetConfig(
struct NvKmsKapiDevice *device,
const struct NvKmsKapiRequestedModeSetConfig *requestedConfig,
struct NvKmsKapiModeSetReplyConfig *replyConfig,
const NvBool commit)
{
NvBool bRequiredModeset = NV_FALSE;
NvU32 head;
if (device == NULL || requestedConfig == NULL) {
return NV_FALSE;
}
for (head = 0;
head < ARRAY_LEN(requestedConfig->headRequestedConfig); head++) {
const struct NvKmsKapiHeadRequestedConfig *headRequestedConfig =
&requestedConfig->headRequestedConfig[head];
const struct NvKmsKapiHeadModeSetConfig *headModeSetConfig =
&headRequestedConfig->modeSetConfig;
if ((requestedConfig->headsMask & (1 << head)) == 0x0) {
continue;
}
bRequiredModeset =
headRequestedConfig->flags.activeChanged ||
headRequestedConfig->flags.displaysChanged ||
headRequestedConfig->flags.modeChanged;
/*
* NVKMS flip ioctl could not validate flip configuration for an
* inactive head, therefore use modeset ioctl if configuration contain
* any such head.
*/
if (!commit &&
headModeSetConfig->numDisplays != 0 && !headModeSetConfig->bActive) {
bRequiredModeset = TRUE;
}
if (bRequiredModeset) {
break;
}
}
if (bRequiredModeset) {
return KmsSetMode(device, requestedConfig, commit);
}
return KmsFlip(device, requestedConfig, replyConfig, commit);
}
void nvKmsKapiHandleEventQueueChange
(
struct NvKmsKapiDevice *device
)
{
if (device == NULL) {
return;
}
/*
* If the callback is NULL, event interest declaration should be
* rejected, and no events would be reported.
*/
nvAssert(device->eventCallback != NULL);
do
{
struct NvKmsGetNextEventParams kmsEventParams = { };
struct NvKmsKapiEvent kapiEvent = { };
NvBool err = NV_FALSE;
if (!nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_GET_NEXT_EVENT,
&kmsEventParams, sizeof(kmsEventParams))) {
break;
}
if (!kmsEventParams.reply.valid) {
break;
}
kapiEvent.type = kmsEventParams.reply.event.eventType;
kapiEvent.device = device;
kapiEvent.privateData = device->privateData;
switch (kmsEventParams.reply.event.eventType) {
case NVKMS_EVENT_TYPE_DPY_CHANGED:
kapiEvent.u.displayChanged.display =
nvDpyIdToNvU32(kmsEventParams.
reply.event.u.dpyChanged.dpyId);
break;
case NVKMS_EVENT_TYPE_DYNAMIC_DPY_CONNECTED:
kapiEvent.u.dynamicDisplayConnected.display =
nvDpyIdToNvU32(kmsEventParams.
reply.event.u.dynamicDpyConnected.dpyId);
break;
case NVKMS_EVENT_TYPE_FLIP_OCCURRED:
kapiEvent.u.flipOccurred.head =
kmsEventParams.reply.event.u.flipOccurred.head;
kapiEvent.u.flipOccurred.layer =
kmsEventParams.reply.event.u.flipOccurred.layer;
break;
default:
continue;
}
if (err) {
nvKmsKapiLogDeviceDebug(
device,
"Error in conversion from "
"NvKmsGetNextEventParams to NvKmsKapiEvent");
continue;
}
device->eventCallback(&kapiEvent);
} while(1);
}
/*
* Helper function to convert NvKmsQueryDpyCRC32Reply to NvKmsKapiDpyCRC32.
*/
static void NvKmsCrcsToKapi
(
const struct NvKmsQueryDpyCRC32Reply *crcs,
struct NvKmsKapiCrcs *kmsCrcs
)
{
kmsCrcs->outputCrc32.value = crcs->outputCrc32.value;
kmsCrcs->outputCrc32.supported = crcs->outputCrc32.supported;
kmsCrcs->rasterGeneratorCrc32.value = crcs->rasterGeneratorCrc32.value;
kmsCrcs->rasterGeneratorCrc32.supported = crcs->rasterGeneratorCrc32.supported;
kmsCrcs->compositorCrc32.value = crcs->compositorCrc32.value;
kmsCrcs->compositorCrc32.supported = crcs->compositorCrc32.supported;
}
static NvBool GetCRC32
(
struct NvKmsKapiDevice *device,
NvU32 head,
struct NvKmsKapiCrcs *crc32
)
{
struct NvKmsQueryDpyCRC32Params params = { };
NvBool status;
if (device->hKmsDevice == 0x0) {
return NV_TRUE;
}
params.request.deviceHandle = device->hKmsDevice;
params.request.dispHandle = device->hKmsDisp;
params.request.head = head;
status = nvkms_ioctl_from_kapi(device->pKmsOpen,
NVKMS_IOCTL_QUERY_DPY_CRC32,
&params, sizeof(params));
if (!status) {
nvKmsKapiLogDeviceDebug(device, "NVKMS QueryDpyCRC32Data failed.");
return NV_FALSE;
}
NvKmsCrcsToKapi(&params.reply, crc32);
return NV_TRUE;
}
static NvKmsKapiSuspendResumeCallbackFunc *pSuspendResumeFunc;
void nvKmsKapiSuspendResume
(
NvBool suspend
)
{
if (pSuspendResumeFunc) {
pSuspendResumeFunc(suspend);
}
}
static void nvKmsKapiSetSuspendResumeCallback
(
NvKmsKapiSuspendResumeCallbackFunc *function
)
{
if (pSuspendResumeFunc && function) {
nvKmsKapiLogDebug("Kapi suspend/resume callback function already registered");
}
pSuspendResumeFunc = function;
}
NvBool nvKmsKapiGetFunctionsTableInternal
(
struct NvKmsKapiFunctionsTable *funcsTable
)
{
if (funcsTable == NULL) {
return NV_FALSE;
}
if (nvkms_strcmp(funcsTable->versionString, NV_VERSION_STRING) != 0) {
funcsTable->versionString = NV_VERSION_STRING;
return NV_FALSE;
}
funcsTable->systemInfo.bAllowWriteCombining =
nvkms_allow_write_combining();
funcsTable->enumerateGpus = EnumerateGpus;
funcsTable->allocateDevice = AllocateDevice;
funcsTable->freeDevice = FreeDevice;
funcsTable->grabOwnership = GrabOwnership;
funcsTable->releaseOwnership = ReleaseOwnership;
funcsTable->grantPermissions = GrantPermissions;
funcsTable->revokePermissions = RevokePermissions;
funcsTable->grantSubOwnership = GrantSubOwnership;
funcsTable->revokeSubOwnership = RevokeSubOwnership;
funcsTable->declareEventInterest = DeclareEventInterest;
funcsTable->getDeviceResourcesInfo = GetDeviceResourcesInfo;
funcsTable->getDisplays = GetDisplays;
funcsTable->getConnectorInfo = GetConnectorInfo;
funcsTable->getStaticDisplayInfo = GetStaticDisplayInfo;
funcsTable->getDynamicDisplayInfo = GetDynamicDisplayInfo;
funcsTable->getVtFbInfo = GetVtFbInfo;
funcsTable->allocateVideoMemory = AllocateVideoMemory;
funcsTable->allocateSystemMemory = AllocateSystemMemory;
funcsTable->importMemory = ImportMemory;
funcsTable->dupMemory = DupMemory;
funcsTable->exportMemory = ExportMemory;
funcsTable->freeMemory = FreeMemory;
funcsTable->getSystemMemoryHandleFromSgt = GetSystemMemoryHandleFromSgt;
funcsTable->getSystemMemoryHandleFromDmaBuf =
GetSystemMemoryHandleFromDmaBuf;
funcsTable->mapMemory = MapMemory;
funcsTable->unmapMemory = UnmapMemory;
funcsTable->createSurface = CreateSurface;
funcsTable->destroySurface = DestroySurface;
funcsTable->getDisplayMode = GetDisplayMode;
funcsTable->validateDisplayMode = ValidateDisplayMode;
funcsTable->applyModeSetConfig = ApplyModeSetConfig;
funcsTable->allocateChannelEvent = nvKmsKapiAllocateChannelEvent;
funcsTable->freeChannelEvent = nvKmsKapiFreeChannelEvent;
funcsTable->getCRC32 = GetCRC32;
funcsTable->getMemoryPages = GetMemoryPages;
funcsTable->freeMemoryPages = FreeMemoryPages;
funcsTable->isMemoryValidForDisplay = IsMemoryValidForDisplay;
funcsTable->importSemaphoreSurface = nvKmsKapiImportSemaphoreSurface;
funcsTable->freeSemaphoreSurface = nvKmsKapiFreeSemaphoreSurface;
funcsTable->registerSemaphoreSurfaceCallback =
nvKmsKapiRegisterSemaphoreSurfaceCallback;
funcsTable->unregisterSemaphoreSurfaceCallback =
nvKmsKapiUnregisterSemaphoreSurfaceCallback;
funcsTable->setSemaphoreSurfaceValue =
nvKmsKapiSetSemaphoreSurfaceValue;
funcsTable->setSuspendResumeCallback = nvKmsKapiSetSuspendResumeCallback;
return NV_TRUE;
}