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osi: dma: mgbe: fix regression RWTU programming
Bug 200770328 Change-Id: I738daa23df274c5f8e485829c3876ef96310015f Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2754972 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com> GVS: Gerrit_Virtual_Submit
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@@ -79,8 +79,8 @@
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#define MGBE_DMA_CHX_TX_CTRL_TSE OSI_BIT(12)
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#define MGBE_DMA_CHX_TX_CTRL_TSE OSI_BIT(12)
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#define MGBE_DMA_CHX_RX_WDT_RWT_MASK 0xFFU
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#define MGBE_DMA_CHX_RX_WDT_RWT_MASK 0xFFU
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#define MGBE_DMA_CHX_RX_WDT_RWTU 2048U
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#define MGBE_DMA_CHX_RX_WDT_RWTU 2048U
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#define MGBE_DMA_CHX_RX_WDT_RWTU_2048_CYCLE 3000U
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#define MGBE_DMA_CHX_RX_WDT_RWTU_2048_CYCLE 0x3000U
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#define MGBE_DMA_CHX_RX_WDT_RWTU_MASK 3000U
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#define MGBE_DMA_CHX_RX_WDT_RWTU_MASK 0x3000U
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#define MGBE_DMA_CHX_RBSZ_MASK 0x7FFEU
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#define MGBE_DMA_CHX_RBSZ_MASK 0x7FFEU
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#define MGBE_DMA_CHX_RBSZ_SHIFT 1U
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#define MGBE_DMA_CHX_RBSZ_SHIFT 1U
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#define MGBE_DMA_CHX_CTRL_PBLX8 OSI_BIT(16)
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#define MGBE_DMA_CHX_CTRL_PBLX8 OSI_BIT(16)
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