osi: dma: mgbe: fix regression RWTU programming

Bug 200770328

Change-Id: I738daa23df274c5f8e485829c3876ef96310015f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2754972
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Bhadram Varka
2022-08-03 06:49:07 +05:30
parent 21937b85dd
commit 0610f6bd35

View File

@@ -79,8 +79,8 @@
#define MGBE_DMA_CHX_TX_CTRL_TSE OSI_BIT(12) #define MGBE_DMA_CHX_TX_CTRL_TSE OSI_BIT(12)
#define MGBE_DMA_CHX_RX_WDT_RWT_MASK 0xFFU #define MGBE_DMA_CHX_RX_WDT_RWT_MASK 0xFFU
#define MGBE_DMA_CHX_RX_WDT_RWTU 2048U #define MGBE_DMA_CHX_RX_WDT_RWTU 2048U
#define MGBE_DMA_CHX_RX_WDT_RWTU_2048_CYCLE 3000U #define MGBE_DMA_CHX_RX_WDT_RWTU_2048_CYCLE 0x3000U
#define MGBE_DMA_CHX_RX_WDT_RWTU_MASK 3000U #define MGBE_DMA_CHX_RX_WDT_RWTU_MASK 0x3000U
#define MGBE_DMA_CHX_RBSZ_MASK 0x7FFEU #define MGBE_DMA_CHX_RBSZ_MASK 0x7FFEU
#define MGBE_DMA_CHX_RBSZ_SHIFT 1U #define MGBE_DMA_CHX_RBSZ_SHIFT 1U
#define MGBE_DMA_CHX_CTRL_PBLX8 OSI_BIT(16) #define MGBE_DMA_CHX_CTRL_PBLX8 OSI_BIT(16)