nvethernetrm: Remove sleep on MDIO PHY read/write

Issue:
C6 exit latency tests are failing due to
NvEthernet driver sleep in MDIO read and write calls.

Fix:
Remove sleep from poll_for_mii_idle
function and convert it to incremental
delay up to 0.5 seconds.

Bug 200545651

Change-Id: I2a03f21686444862f2f48b64f1f812be878c459b
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238178
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mohan Thadikamalla
2019-11-13 13:41:29 +05:30
committed by mobile promotions
parent 0ea2fd047e
commit 0bd3dc4135

View File

@@ -53,7 +53,8 @@
*/
static inline int poll_for_mii_idle(struct osi_core_priv_data *osi_core)
{
unsigned int retry = 1000;
/* half sec timeout */
unsigned int retry = 50000;
unsigned int mac_gmiiar;
unsigned int count;
int cond = 1;
@@ -69,13 +70,15 @@ static inline int poll_for_mii_idle(struct osi_core_priv_data *osi_core)
}
count++;
osd_msleep(1U);
mac_gmiiar = osi_readl((unsigned char *)osi_core->base +
MAC_MDIO_ADDRESS);
if ((mac_gmiiar & MAC_GMII_BUSY) == 0U) {
cond = 0;
} else {
/* wait on GMII Busy set */
osd_udelay(10U);
}
}
@@ -121,8 +124,6 @@ int osi_write_phy_reg(struct osi_core_priv_data *osi_core, unsigned int phyaddr,
osi_writel(mac_gmiiar, (unsigned char *)osi_core->base + MAC_MDIO_ADDRESS);
osd_usleep_range(9, 11);
/* wait for MII write operation to complete */
ret = poll_for_mii_idle(osi_core);
if (ret < 0) {
@@ -163,8 +164,6 @@ int osi_read_phy_reg(struct osi_core_priv_data *osi_core, unsigned int phyaddr,
(osi_core->mdc_cr) << 8U | ((0x3U) << 2U) | MAC_GMII_BUSY;
osi_writel(mac_gmiiar, (unsigned char *)osi_core->base + MAC_MDIO_ADDRESS);
osd_usleep_range(9, 11);
/* wait for MII write operation to complete */
ret = poll_for_mii_idle(osi_core);
if (ret < 0) {