mirror of
git://nv-tegra.nvidia.com/kernel/nvethernetrm.git
synced 2025-12-22 09:12:10 +03:00
nvethernetrm: add tmake support
- Split files into core and dma directories to add separate tmake files for creating separate RM and DMA channel libraries. ESQC-7634 Change-Id: Id9a2431bbee73a29b4a3565d8aa2bc0d8e7f0c78 Signed-off-by: Mohit Dhingra <mdhingra@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2109978 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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34
Makefile.umbrella.tmk
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34
Makefile.umbrella.tmk
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@@ -0,0 +1,34 @@
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################################### tell Emacs this is a -*- makefile-gmake -*-
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#
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# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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# DEALINGS IN THE SOFTWARE.
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#
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# Repository umbrella makefile fragment for nvethernetrm
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###############################################################################
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NV_REPOSITORY_COMPONENTS := \
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osi/core \
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osi/dma
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# Local Variables:
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# indent-tabs-mode: t
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# tab-width: 8
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# End:
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# vi: set tabstop=8 noexpandtab:
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@@ -346,7 +346,7 @@ static inline void osi_writel(unsigned int val, void *addr)
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*
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*
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* Return: 0 - for not Valid MAC, 1 - for Valid MAC
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* Return: 0 - for not Valid MAC, 1 - for Valid MAC
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*/
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*/
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static int is_valid_mac_version(unsigned int mac_ver)
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static inline int is_valid_mac_version(unsigned int mac_ver)
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{
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{
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if ((mac_ver == OSI_EQOS_MAC_4_10) ||
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if ((mac_ver == OSI_EQOS_MAC_4_10) ||
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(mac_ver == OSI_EQOS_MAC_5_00) ||
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(mac_ver == OSI_EQOS_MAC_5_00) ||
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@@ -370,19 +370,7 @@ static int is_valid_mac_version(unsigned int mac_ver)
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*
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*
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* Return: 0 - success, -1 - failure
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* Return: 0 - success, -1 - failure
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*/
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*/
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static inline int osi_get_mac_version(void *addr, unsigned int *mac_ver)
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int osi_get_mac_version(void *addr, unsigned int *mac_ver);
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{
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unsigned int macver;
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int ret = 0;
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macver = osi_readl((unsigned char *)addr + MAC_VERSION) & MAC_VERSION_SNVER_MASK;
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if (is_valid_mac_version(macver) == 0) {
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return -1;
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}
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*mac_ver = macver;
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return ret;
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}
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void osi_get_hw_features(void *base, struct osi_hw_features *hw_feat);
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void osi_get_hw_features(void *base, struct osi_hw_features *hw_feat);
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#endif /* OSI_COMMON_H */
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#endif /* OSI_COMMON_H */
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@@ -141,17 +141,7 @@ struct osi_core_priv_data {
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* Return: 0 - success, -1 - failure
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* Return: 0 - success, -1 - failure
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*/
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*/
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static inline int osi_poll_for_swr(struct osi_core_priv_data *osi_core)
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int osi_poll_for_swr(struct osi_core_priv_data *osi_core);
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{
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int ret = 0;
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->poll_for_swr != OSI_NULL)) {
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ret = osi_core->ops->poll_for_swr(osi_core->base);
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}
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return ret;
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}
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/**
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/**
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* osi_set_mdc_clk_rate - Derive MDC clock based on provided AXI_CBB clk.
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* osi_set_mdc_clk_rate - Derive MDC clock based on provided AXI_CBB clk.
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@@ -166,14 +156,8 @@ static inline int osi_poll_for_swr(struct osi_core_priv_data *osi_core)
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*
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*
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* Return: None
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* Return: None
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*/
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*/
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static inline void osi_set_mdc_clk_rate(struct osi_core_priv_data *osi_core,
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void osi_set_mdc_clk_rate(struct osi_core_priv_data *osi_core,
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unsigned long csr_clk_rate)
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unsigned long csr_clk_rate);
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{
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->set_mdc_clk_rate != OSI_NULL)) {
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osi_core->ops->set_mdc_clk_rate(osi_core, csr_clk_rate);
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}
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}
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/**
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/**
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* osi_hw_core_init - EQOS MAC, MTL and common DMA initialization.
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* osi_hw_core_init - EQOS MAC, MTL and common DMA initialization.
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@@ -187,20 +171,9 @@ static inline void osi_set_mdc_clk_rate(struct osi_core_priv_data *osi_core,
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*
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*
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* Return: 0 - success, -1 - failure
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* Return: 0 - success, -1 - failure
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*/
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*/
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static inline int osi_hw_core_init(struct osi_core_priv_data *osi_core,
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int osi_hw_core_init(struct osi_core_priv_data *osi_core,
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unsigned int tx_fifo_size,
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unsigned int tx_fifo_size,
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unsigned int rx_fifo_size)
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unsigned int rx_fifo_size);
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{
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int ret = 0;
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->core_init != OSI_NULL)) {
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ret = osi_core->ops->core_init(osi_core, tx_fifo_size,
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rx_fifo_size);
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}
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return ret;
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}
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/**
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/**
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* osi_start_mac - Start MAC Tx/Rx engine
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* osi_start_mac - Start MAC Tx/Rx engine
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@@ -211,13 +184,7 @@ static inline int osi_hw_core_init(struct osi_core_priv_data *osi_core,
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* Protection: None
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* Protection: None
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* Return: None
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* Return: None
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*/
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*/
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static inline void osi_start_mac(struct osi_core_priv_data *osi_core)
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void osi_start_mac(struct osi_core_priv_data *osi_core);
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{
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->start_mac != OSI_NULL)) {
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osi_core->ops->start_mac(osi_core->base);
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}
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}
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/**
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/**
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* osi_stop_mac - Stop MAC Tx/Rx engine
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* osi_stop_mac - Stop MAC Tx/Rx engine
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@@ -228,13 +195,7 @@ static inline void osi_start_mac(struct osi_core_priv_data *osi_core)
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* Protection: None
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* Protection: None
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* Return: None
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* Return: None
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*/
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*/
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static inline void osi_stop_mac(struct osi_core_priv_data *osi_core)
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void osi_stop_mac(struct osi_core_priv_data *osi_core);
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{
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->stop_mac != OSI_NULL)) {
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osi_core->ops->stop_mac(osi_core->base);
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}
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}
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/**
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/**
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* osi_common_isr - Common ISR.
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* osi_common_isr - Common ISR.
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@@ -251,13 +212,7 @@ static inline void osi_stop_mac(struct osi_core_priv_data *osi_core)
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*
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*
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* Return: 0 - success, -1 - failure
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* Return: 0 - success, -1 - failure
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*/
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*/
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static inline void osi_common_isr(struct osi_core_priv_data *osi_core)
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void osi_common_isr(struct osi_core_priv_data *osi_core);
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{
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->handle_common_intr != OSI_NULL)) {
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osi_core->ops->handle_common_intr(osi_core);
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}
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}
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/**
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/**
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* osi_set_mode - Set FD/HD mode.
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* osi_set_mode - Set FD/HD mode.
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@@ -274,13 +229,7 @@ static inline void osi_common_isr(struct osi_core_priv_data *osi_core)
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*
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*
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* Return: NONE
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* Return: NONE
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*/
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*/
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static inline void osi_set_mode(struct osi_core_priv_data *osi_core, int mode)
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void osi_set_mode(struct osi_core_priv_data *osi_core, int mode);
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{
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->set_mode != OSI_NULL)) {
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osi_core->ops->set_mode(osi_core->base, mode);
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}
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}
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/**
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/**
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* osi_set_speed - Set operating speed.
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* osi_set_speed - Set operating speed.
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@@ -297,13 +246,7 @@ static inline void osi_set_mode(struct osi_core_priv_data *osi_core, int mode)
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*
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*
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* Return: NONE
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* Return: NONE
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*/
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*/
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static inline void osi_set_speed(struct osi_core_priv_data *osi_core, int speed)
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void osi_set_speed(struct osi_core_priv_data *osi_core, int speed);
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{
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->set_speed != OSI_NULL)) {
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osi_core->ops->set_speed(osi_core->base, speed);
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}
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}
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/**
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/**
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* osi_pad_calibrate - PAD calibration
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* osi_pad_calibrate - PAD calibration
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@@ -319,17 +262,7 @@ static inline void osi_set_speed(struct osi_core_priv_data *osi_core, int speed)
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*
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*
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* Return: 0 - success, -1 - failure
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* Return: 0 - success, -1 - failure
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*/
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*/
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static inline int osi_pad_calibrate(struct osi_core_priv_data *osi_core)
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int osi_pad_calibrate(struct osi_core_priv_data *osi_core);
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{
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int ret = 0;
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->pad_calibrate != OSI_NULL)) {
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ret = osi_core->ops->pad_calibrate(osi_core);
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}
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return ret;
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}
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/**
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/**
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* osi_flush_mtl_tx_queue - Flushing a MTL Tx Queue.
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* osi_flush_mtl_tx_queue - Flushing a MTL Tx Queue.
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@@ -345,18 +278,8 @@ static inline int osi_pad_calibrate(struct osi_core_priv_data *osi_core)
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*
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*
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* Return: 0 - success, -1 - failure.
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* Return: 0 - success, -1 - failure.
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*/
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*/
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static inline int osi_flush_mtl_tx_queue(struct osi_core_priv_data *osi_core,
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int osi_flush_mtl_tx_queue(struct osi_core_priv_data *osi_core,
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unsigned int qinx)
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unsigned int qinx);
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{
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int ret = 0;
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->flush_mtl_tx_queue != OSI_NULL)) {
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ret = osi_core->ops->flush_mtl_tx_queue(osi_core->base, qinx);
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}
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return ret;
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}
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/**
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/**
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* osi_config_mac_loopback - Configure MAC loopback
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* osi_config_mac_loopback - Configure MAC loopback
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@@ -372,20 +295,8 @@ static inline int osi_flush_mtl_tx_queue(struct osi_core_priv_data *osi_core,
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*
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*
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* Return: 0 - success, -1 - failure.
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* Return: 0 - success, -1 - failure.
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*/
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*/
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static inline int osi_config_mac_loopback(struct osi_core_priv_data *osi_core,
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int osi_config_mac_loopback(struct osi_core_priv_data *osi_core,
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unsigned int lb_mode)
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unsigned int lb_mode);
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{
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int ret = -1;
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/* Configure MAC LoopBack */
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->config_mac_loopback != OSI_NULL)) {
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ret = osi_core->ops->config_mac_loopback(osi_core->base,
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lb_mode);
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}
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return ret;
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}
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/**
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/**
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* osi_set_avb - Set CBS algo and parameters
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* osi_set_avb - Set CBS algo and parameters
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@@ -400,18 +311,8 @@ static inline int osi_config_mac_loopback(struct osi_core_priv_data *osi_core,
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*
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*
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* Return: Success = 0; failure = -1;
|
* Return: Success = 0; failure = -1;
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*/
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*/
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static inline int osi_set_avb(struct osi_core_priv_data *osi_core,
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int osi_set_avb(struct osi_core_priv_data *osi_core,
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struct osi_core_avb_algorithm *avb)
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struct osi_core_avb_algorithm *avb);
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{
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int ret = -1;
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if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
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(osi_core->ops->set_avb_algorithm != OSI_NULL)) {
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ret = osi_core->ops->set_avb_algorithm(osi_core, avb);
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}
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return ret;
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}
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/**
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/**
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* osi_get_avb - Set CBS algo and parameters
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* osi_get_avb - Set CBS algo and parameters
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@@ -426,18 +327,8 @@ static inline int osi_set_avb(struct osi_core_priv_data *osi_core,
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|||||||
*
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*
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||||||
* Return: Success = 0; failure = -1;
|
* Return: Success = 0; failure = -1;
|
||||||
*/
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*/
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static inline int osi_get_avb(struct osi_core_priv_data *osi_core,
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int osi_get_avb(struct osi_core_priv_data *osi_core,
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||||||
struct osi_core_avb_algorithm *avb)
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struct osi_core_avb_algorithm *avb);
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||||||
{
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||||||
int ret = -1;
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||||||
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||||||
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
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||||||
(osi_core->ops->get_avb_algorithm != OSI_NULL)) {
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ret = osi_core->ops->get_avb_algorithm(osi_core, avb);
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||||||
}
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||||||
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return ret;
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}
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||||||
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||||||
/**
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/**
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* osi_configure_txstatus - Configure Tx packet status reporting
|
* osi_configure_txstatus - Configure Tx packet status reporting
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@@ -454,20 +345,8 @@ static inline int osi_get_avb(struct osi_core_priv_data *osi_core,
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|||||||
*
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*
|
||||||
* Return: 0 - success, -1 - failure.
|
* Return: 0 - success, -1 - failure.
|
||||||
*/
|
*/
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||||||
static inline int osi_configure_txstatus(struct osi_core_priv_data *osi_core,
|
int osi_configure_txstatus(struct osi_core_priv_data *osi_core,
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||||||
unsigned int tx_status)
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unsigned int tx_status);
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||||||
{
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|
||||||
int ret = -1;
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||||||
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||||||
/* Configure Drop Transmit Status */
|
|
||||||
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
|
||||||
(osi_core->ops->config_tx_status != OSI_NULL)) {
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|
||||||
ret = osi_core->ops->config_tx_status(osi_core->base,
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|
||||||
tx_status);
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|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_config_fw_err_pkts - Configure forwarding of error packets
|
* osi_config_fw_err_pkts - Configure forwarding of error packets
|
||||||
@@ -484,20 +363,8 @@ static inline int osi_configure_txstatus(struct osi_core_priv_data *osi_core,
|
|||||||
*
|
*
|
||||||
* Return: 0 - success, -1 - failure.
|
* Return: 0 - success, -1 - failure.
|
||||||
*/
|
*/
|
||||||
static inline int osi_config_fw_err_pkts(struct osi_core_priv_data *osi_core,
|
int osi_config_fw_err_pkts(struct osi_core_priv_data *osi_core,
|
||||||
unsigned int qinx, unsigned int fw_err)
|
unsigned int qinx, unsigned int fw_err);
|
||||||
{
|
|
||||||
int ret = -1;
|
|
||||||
|
|
||||||
/* Configure Forwarding of Error packets */
|
|
||||||
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
|
||||||
(osi_core->ops->config_fw_err_pkts != OSI_NULL)) {
|
|
||||||
ret = osi_core->ops->config_fw_err_pkts(osi_core->base,
|
|
||||||
qinx, fw_err);
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_config_rx_crc_check - Configure CRC Checking for Received Packets
|
* osi_config_rx_crc_check - Configure CRC Checking for Received Packets
|
||||||
@@ -515,20 +382,8 @@ static inline int osi_config_fw_err_pkts(struct osi_core_priv_data *osi_core,
|
|||||||
*
|
*
|
||||||
* Return: 0 - success, -1 - failure.
|
* Return: 0 - success, -1 - failure.
|
||||||
*/
|
*/
|
||||||
static inline int osi_config_rx_crc_check(struct osi_core_priv_data *osi_core,
|
int osi_config_rx_crc_check(struct osi_core_priv_data *osi_core,
|
||||||
unsigned int crc_chk)
|
unsigned int crc_chk);
|
||||||
{
|
|
||||||
int ret = -1;
|
|
||||||
|
|
||||||
/* Configure CRC Checking for Received Packets */
|
|
||||||
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
|
||||||
(osi_core->ops->config_rx_crc_check != OSI_NULL)) {
|
|
||||||
ret = osi_core->ops->config_rx_crc_check(osi_core->base,
|
|
||||||
crc_chk);
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
int osi_write_phy_reg(struct osi_core_priv_data *osi_core, unsigned int phyaddr,
|
int osi_write_phy_reg(struct osi_core_priv_data *osi_core, unsigned int phyaddr,
|
||||||
unsigned int phyreg, unsigned short phydata);
|
unsigned int phyreg, unsigned short phydata);
|
||||||
|
|||||||
@@ -259,14 +259,8 @@ struct osi_dma_priv_data {
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_disable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
void osi_disable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->disable_chan_tx_intr != OSI_NULL)) {
|
|
||||||
osi_dma->ops->disable_chan_tx_intr(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_enable_chan_tx_intr - Enable DMA Tx channel interrupts.
|
* osi_enable_chan_tx_intr - Enable DMA Tx channel interrupts.
|
||||||
@@ -281,14 +275,8 @@ static inline void osi_disable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_enable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
void osi_enable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->enable_chan_tx_intr != OSI_NULL)) {
|
|
||||||
osi_dma->ops->enable_chan_tx_intr(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_disable_chan_rx_intr - Disable DMA Rx channel interrupts.
|
* osi_disable_chan_rx_intr - Disable DMA Rx channel interrupts.
|
||||||
@@ -303,14 +291,8 @@ static inline void osi_enable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_disable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
void osi_disable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->disable_chan_rx_intr != OSI_NULL)) {
|
|
||||||
osi_dma->ops->disable_chan_rx_intr(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_enable_chan_rx_intr - Enable DMA Rx channel interrupts.
|
* osi_enable_chan_rx_intr - Enable DMA Rx channel interrupts.
|
||||||
@@ -325,14 +307,8 @@ static inline void osi_disable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_enable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
void osi_enable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->enable_chan_rx_intr != OSI_NULL)) {
|
|
||||||
osi_dma->ops->enable_chan_rx_intr(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_clear_tx_intr - Handles Tx interrupt source.
|
* osi_clear_tx_intr - Handles Tx interrupt source.
|
||||||
@@ -347,14 +323,8 @@ static inline void osi_enable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_clear_tx_intr(struct osi_dma_priv_data *osi_dma,
|
void osi_clear_tx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->clear_tx_intr != OSI_NULL)) {
|
|
||||||
osi_dma->ops->clear_tx_intr(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_clear_rx_intr - Handles Rx interrupt source.
|
* osi_clear_rx_intr - Handles Rx interrupt source.
|
||||||
@@ -369,14 +339,8 @@ static inline void osi_clear_tx_intr(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_clear_rx_intr(struct osi_dma_priv_data *osi_dma,
|
void osi_clear_rx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->clear_rx_intr != OSI_NULL)) {
|
|
||||||
osi_dma->ops->clear_rx_intr(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_start_dma - Start DMA
|
* osi_start_dma - Start DMA
|
||||||
@@ -388,14 +352,8 @@ static inline void osi_clear_rx_intr(struct osi_dma_priv_data *osi_dma,
|
|||||||
* Protection: None
|
* Protection: None
|
||||||
* Return: None
|
* Return: None
|
||||||
*/
|
*/
|
||||||
static inline void osi_start_dma(struct osi_dma_priv_data *osi_dma,
|
void osi_start_dma(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->start_dma != OSI_NULL)) {
|
|
||||||
osi_dma->ops->start_dma(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_stop_dma - Stop DMA
|
* osi_stop_dma - Stop DMA
|
||||||
@@ -407,14 +365,8 @@ static inline void osi_start_dma(struct osi_dma_priv_data *osi_dma,
|
|||||||
* Protection: None
|
* Protection: None
|
||||||
* Return: None
|
* Return: None
|
||||||
*/
|
*/
|
||||||
static inline void osi_stop_dma(struct osi_dma_priv_data *osi_dma,
|
void osi_stop_dma(struct osi_dma_priv_data *osi_dma,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
|
||||||
(osi_dma->ops->stop_dma != OSI_NULL)) {
|
|
||||||
osi_dma->ops->stop_dma(osi_dma->base, chan);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_get_refill_rx_desc_cnt - Rx descriptors count that needs to refill.
|
* osi_get_refill_rx_desc_cnt - Rx descriptors count that needs to refill.
|
||||||
@@ -429,10 +381,7 @@ static inline void osi_stop_dma(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: Number of available free descriptors.
|
* Return: Number of available free descriptors.
|
||||||
*/
|
*/
|
||||||
static inline unsigned int osi_get_refill_rx_desc_cnt(struct osi_rx_ring *rx_ring)
|
unsigned int osi_get_refill_rx_desc_cnt(struct osi_rx_ring *rx_ring);
|
||||||
{
|
|
||||||
return (rx_ring->cur_rx_idx - rx_ring->refill_idx) & (RX_DESC_CNT - 1U);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_rx_dma_desc_init - DMA Rx descriptor init
|
* osi_rx_dma_desc_init - DMA Rx descriptor init
|
||||||
@@ -447,14 +396,8 @@ static inline unsigned int osi_get_refill_rx_desc_cnt(struct osi_rx_ring *rx_rin
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_rx_dma_desc_init(struct osi_rx_swcx *rx_swcx,
|
void osi_rx_dma_desc_init(struct osi_rx_swcx *rx_swcx,
|
||||||
struct osi_rx_desc *rx_desc)
|
struct osi_rx_desc *rx_desc);
|
||||||
{
|
|
||||||
rx_desc->rdes0 = (unsigned int)L32(rx_swcx->buf_phy_addr);
|
|
||||||
rx_desc->rdes1 = (unsigned int)H32(rx_swcx->buf_phy_addr);
|
|
||||||
rx_desc->rdes2 = 0;
|
|
||||||
rx_desc->rdes3 = (RDES3_OWN | RDES3_IOC | RDES3_B1V);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_update_rx_tailptr - Updates DMA Rx ring tail pointer
|
* osi_update_rx_tailptr - Updates DMA Rx ring tail pointer
|
||||||
@@ -470,22 +413,9 @@ static inline void osi_rx_dma_desc_init(struct osi_rx_swcx *rx_swcx,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
static inline void osi_update_rx_tailptr(struct osi_dma_priv_data *osi_dma,
|
void osi_update_rx_tailptr(struct osi_dma_priv_data *osi_dma,
|
||||||
struct osi_rx_ring *rx_ring,
|
struct osi_rx_ring *rx_ring,
|
||||||
unsigned int chan)
|
unsigned int chan);
|
||||||
{
|
|
||||||
unsigned long tailptr = 0;
|
|
||||||
unsigned int refill_idx = rx_ring->refill_idx;
|
|
||||||
|
|
||||||
DECR_RX_DESC_INDEX(refill_idx, 1U);
|
|
||||||
tailptr = rx_ring->rx_desc_phy_addr +
|
|
||||||
(refill_idx * sizeof(struct osi_rx_desc));
|
|
||||||
|
|
||||||
if (osi_dma != OSI_NULL && osi_dma->ops != OSI_NULL &&
|
|
||||||
osi_dma->ops->update_rx_tailptr != OSI_NULL) {
|
|
||||||
osi_dma->ops->update_rx_tailptr(osi_dma->base, chan, tailptr);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* osi_set_rx_buf_len - Updates rx buffer length.
|
* osi_set_rx_buf_len - Updates rx buffer length.
|
||||||
@@ -499,14 +429,7 @@ static inline void osi_update_rx_tailptr(struct osi_dma_priv_data *osi_dma,
|
|||||||
*
|
*
|
||||||
* Return: None.
|
* Return: None.
|
||||||
*/
|
*/
|
||||||
|
void osi_set_rx_buf_len(struct osi_dma_priv_data *osi_dma);
|
||||||
static inline void osi_set_rx_buf_len(struct osi_dma_priv_data *osi_dma)
|
|
||||||
{
|
|
||||||
if (osi_dma != OSI_NULL && osi_dma->ops != OSI_NULL &&
|
|
||||||
osi_dma->ops->set_rx_buf_len != OSI_NULL) {
|
|
||||||
osi_dma->ops->set_rx_buf_len(osi_dma);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void osi_hw_transmit(struct osi_dma_priv_data *osi, unsigned int chan);
|
void osi_hw_transmit(struct osi_dma_priv_data *osi, unsigned int chan);
|
||||||
int osi_process_tx_completions(struct osi_dma_priv_data *osi,
|
int osi_process_tx_completions(struct osi_dma_priv_data *osi,
|
||||||
|
|||||||
38
osi/core/Makefile.interface.tmk
Normal file
38
osi/core/Makefile.interface.tmk
Normal file
@@ -0,0 +1,38 @@
|
|||||||
|
################################### tell Emacs this is a -*- makefile-gmake -*-
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
#
|
||||||
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
# copy of this software and associated documentation files (the "Software"),
|
||||||
|
# to deal in the Software without restriction, including without limitation
|
||||||
|
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
# and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
# Software is furnished to do so, subject to the following conditions:
|
||||||
|
#
|
||||||
|
# The above copyright notice and this permission notice shall be included in
|
||||||
|
# all copies or substantial portions of the Software.
|
||||||
|
#
|
||||||
|
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
# DEALINGS IN THE SOFTWARE.
|
||||||
|
#
|
||||||
|
# libnvethernetrm interface makefile fragment
|
||||||
|
#
|
||||||
|
###############################################################################
|
||||||
|
|
||||||
|
ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION
|
||||||
|
NV_INTERFACE_NAME := nvethernetrm
|
||||||
|
NV_INTERFACE_EXPORTS := lib$(NV_INTERFACE_NAME)
|
||||||
|
NV_INTERFACE_PUBLIC_INCLUDES := \
|
||||||
|
./include
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Local Variables:
|
||||||
|
# indent-tabs-mode: t
|
||||||
|
# tab-width: 8
|
||||||
|
# End:
|
||||||
|
# vi: set tabstop=8 noexpandtab:
|
||||||
49
osi/core/Makefile.tmk
Normal file
49
osi/core/Makefile.tmk
Normal file
@@ -0,0 +1,49 @@
|
|||||||
|
################################### tell Emacs this is a -*- makefile-gmake -*-
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
#
|
||||||
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
# copy of this software and associated documentation files (the "Software"),
|
||||||
|
# to deal in the Software without restriction, including without limitation
|
||||||
|
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
# and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
# Software is furnished to do so, subject to the following conditions:
|
||||||
|
#
|
||||||
|
# The above copyright notice and this permission notice shall be included in
|
||||||
|
# all copies or substantial portions of the Software.
|
||||||
|
#
|
||||||
|
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
# DEALINGS IN THE SOFTWARE.
|
||||||
|
#
|
||||||
|
###############################################################################
|
||||||
|
|
||||||
|
ifdef NV_COMPONENT_FLAG_SHARED_LIBRARY_SECTION
|
||||||
|
include $(NV_BUILD_START_COMPONENT)
|
||||||
|
|
||||||
|
NV_COMPONENT_NAME := nvethernetrm
|
||||||
|
NV_COMPONENT_OWN_INTERFACE_DIR := .
|
||||||
|
NV_COMPONENT_SOURCES := \
|
||||||
|
eqos_core.c \
|
||||||
|
osi_common.c \
|
||||||
|
osi_core.c
|
||||||
|
|
||||||
|
NV_COMPONENT_NEEDED_INTERFACE_DIRS := \
|
||||||
|
$(NV_SOURCE)/qnx/src/libs/nvethernet/osi_dependencies
|
||||||
|
|
||||||
|
NV_COMPONENT_INCLUDES := \
|
||||||
|
$(NV_SOURCE)/nvethernetrm/include \
|
||||||
|
$(NV_SOURCE)/core/include
|
||||||
|
|
||||||
|
include $(NV_BUILD_SHARED_LIBRARY)
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Local Variables:
|
||||||
|
# indent-tabs-mode: t
|
||||||
|
# tab-width: 8
|
||||||
|
# End:
|
||||||
|
# vi: set tabstop=8 noexpandtab:
|
||||||
@@ -1174,7 +1174,8 @@ static int eqos_get_avb_algorithm(struct osi_core_priv_data *osi_core,
|
|||||||
EQOS_MTL_TXQ_ETS_CR_AVALG_SHIFT;
|
EQOS_MTL_TXQ_ETS_CR_AVALG_SHIFT;
|
||||||
|
|
||||||
/* Get Send slope credit */
|
/* Get Send slope credit */
|
||||||
value = osi_readl(osi_core->base + EQOS_MTL_TXQ_ETS_SSCR(qinx));
|
value = osi_readl((unsigned char *)osi_core->base +
|
||||||
|
EQOS_MTL_TXQ_ETS_SSCR(qinx));
|
||||||
avb->send_slope = value & EQOS_MTL_TXQ_ETS_SSCR_SSC_MASK;
|
avb->send_slope = value & EQOS_MTL_TXQ_ETS_SSCR_SSC_MASK;
|
||||||
|
|
||||||
/* Get Idle slope credit*/
|
/* Get Idle slope credit*/
|
||||||
45
osi/core/libnvethernetrm.export
Normal file
45
osi/core/libnvethernetrm.export
Normal file
@@ -0,0 +1,45 @@
|
|||||||
|
################################### tell Emacs this is a -*- makefile-gmake -*-
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
#
|
||||||
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
# copy of this software and associated documentation files (the "Software"),
|
||||||
|
# to deal in the Software without restriction, including without limitation
|
||||||
|
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
# and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
# Software is furnished to do so, subject to the following conditions:
|
||||||
|
#
|
||||||
|
# The above copyright notice and this permission notice shall be included in
|
||||||
|
# all copies or substantial portions of the Software.
|
||||||
|
#
|
||||||
|
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
# DEALINGS IN THE SOFTWARE.
|
||||||
|
#
|
||||||
|
# libnvethernetrm interface export
|
||||||
|
#
|
||||||
|
###############################################################################
|
||||||
|
osi_init_core_ops
|
||||||
|
osi_write_phy_reg
|
||||||
|
osi_read_phy_reg
|
||||||
|
osi_poll_for_swr
|
||||||
|
osi_set_mdc_clk_rate
|
||||||
|
osi_hw_core_init
|
||||||
|
osi_start_mac
|
||||||
|
osi_stop_mac
|
||||||
|
osi_common_isr
|
||||||
|
osi_set_mode
|
||||||
|
osi_set_speed
|
||||||
|
osi_pad_calibrate
|
||||||
|
osi_flush_mtl_tx_queue
|
||||||
|
osi_config_mac_loopback
|
||||||
|
osi_set_avb
|
||||||
|
osi_get_avb
|
||||||
|
osi_configure_txstatus
|
||||||
|
osi_config_rx_crc_check
|
||||||
|
osi_get_mac_version
|
||||||
|
osi_get_hw_features
|
||||||
@@ -118,3 +118,18 @@ void osi_get_hw_features(void *base, struct osi_hw_features *hw_feat)
|
|||||||
hw_feat->aux_snap_num =
|
hw_feat->aux_snap_num =
|
||||||
((mac_hfr2 >> 28U) & EQOS_MAC_HFR2_AUXSNAPNUM_MASK);
|
((mac_hfr2 >> 28U) & EQOS_MAC_HFR2_AUXSNAPNUM_MASK);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int osi_get_mac_version(void *addr, unsigned int *mac_ver)
|
||||||
|
{
|
||||||
|
unsigned int macver;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
macver = osi_readl((unsigned char *)addr + MAC_VERSION) &
|
||||||
|
MAC_VERSION_SNVER_MASK;
|
||||||
|
if (is_valid_mac_version(macver) == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
*mac_ver = macver;
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
@@ -225,3 +225,175 @@ void osi_init_core_ops(struct osi_core_priv_data *osi_core)
|
|||||||
osi_core->ops = eqos_get_hw_core_ops();
|
osi_core->ops = eqos_get_hw_core_ops();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int osi_poll_for_swr(struct osi_core_priv_data *osi_core)
|
||||||
|
{
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->poll_for_swr != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->poll_for_swr(osi_core->base);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_set_mdc_clk_rate(struct osi_core_priv_data *osi_core,
|
||||||
|
unsigned long csr_clk_rate)
|
||||||
|
{
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->set_mdc_clk_rate != OSI_NULL)) {
|
||||||
|
osi_core->ops->set_mdc_clk_rate(osi_core, csr_clk_rate);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_hw_core_init(struct osi_core_priv_data *osi_core,
|
||||||
|
unsigned int tx_fifo_size,
|
||||||
|
unsigned int rx_fifo_size)
|
||||||
|
{
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->core_init != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->core_init(osi_core, tx_fifo_size,
|
||||||
|
rx_fifo_size);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_start_mac(struct osi_core_priv_data *osi_core)
|
||||||
|
{
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->start_mac != OSI_NULL)) {
|
||||||
|
osi_core->ops->start_mac(osi_core->base);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_stop_mac(struct osi_core_priv_data *osi_core)
|
||||||
|
{
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->stop_mac != OSI_NULL)) {
|
||||||
|
osi_core->ops->stop_mac(osi_core->base);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_common_isr(struct osi_core_priv_data *osi_core)
|
||||||
|
{
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->handle_common_intr != OSI_NULL)) {
|
||||||
|
osi_core->ops->handle_common_intr(osi_core);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_set_mode(struct osi_core_priv_data *osi_core, int mode)
|
||||||
|
{
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->set_mode != OSI_NULL)) {
|
||||||
|
osi_core->ops->set_mode(osi_core->base, mode);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_set_speed(struct osi_core_priv_data *osi_core, int speed)
|
||||||
|
{
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->set_speed != OSI_NULL)) {
|
||||||
|
osi_core->ops->set_speed(osi_core->base, speed);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_pad_calibrate(struct osi_core_priv_data *osi_core)
|
||||||
|
{
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->pad_calibrate != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->pad_calibrate(osi_core);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_flush_mtl_tx_queue(struct osi_core_priv_data *osi_core,
|
||||||
|
unsigned int qinx)
|
||||||
|
{
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->flush_mtl_tx_queue != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->flush_mtl_tx_queue(osi_core->base, qinx);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_config_mac_loopback(struct osi_core_priv_data *osi_core,
|
||||||
|
unsigned int lb_mode)
|
||||||
|
{
|
||||||
|
int ret = -1;
|
||||||
|
|
||||||
|
/* Configure MAC LoopBack */
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->config_mac_loopback != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->config_mac_loopback(osi_core->base,
|
||||||
|
lb_mode);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_set_avb(struct osi_core_priv_data *osi_core,
|
||||||
|
struct osi_core_avb_algorithm *avb)
|
||||||
|
{
|
||||||
|
int ret = -1;
|
||||||
|
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->set_avb_algorithm != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->set_avb_algorithm(osi_core, avb);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_get_avb(struct osi_core_priv_data *osi_core,
|
||||||
|
struct osi_core_avb_algorithm *avb)
|
||||||
|
{
|
||||||
|
int ret = -1;
|
||||||
|
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->get_avb_algorithm != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->get_avb_algorithm(osi_core, avb);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_configure_txstatus(struct osi_core_priv_data *osi_core,
|
||||||
|
unsigned int tx_status)
|
||||||
|
{
|
||||||
|
int ret = -1;
|
||||||
|
|
||||||
|
/* Configure Drop Transmit Status */
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->config_tx_status != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->config_tx_status(osi_core->base,
|
||||||
|
tx_status);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_config_rx_crc_check(struct osi_core_priv_data *osi_core,
|
||||||
|
unsigned int crc_chk)
|
||||||
|
{
|
||||||
|
int ret = -1;
|
||||||
|
|
||||||
|
/* Configure CRC Checking for Received Packets */
|
||||||
|
if ((osi_core != OSI_NULL) && (osi_core->ops != OSI_NULL) &&
|
||||||
|
(osi_core->ops->config_rx_crc_check != OSI_NULL)) {
|
||||||
|
ret = osi_core->ops->config_rx_crc_check(osi_core->base,
|
||||||
|
crc_chk);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
39
osi/dma/Makefile.interface.tmk
Normal file
39
osi/dma/Makefile.interface.tmk
Normal file
@@ -0,0 +1,39 @@
|
|||||||
|
################################### tell Emacs this is a -*- makefile-gmake -*-
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
#
|
||||||
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
# copy of this software and associated documentation files (the "Software"),
|
||||||
|
# to deal in the Software without restriction, including without limitation
|
||||||
|
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
# and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
# Software is furnished to do so, subject to the following conditions:
|
||||||
|
#
|
||||||
|
# The above copyright notice and this permission notice shall be included in
|
||||||
|
# all copies or substantial portions of the Software.
|
||||||
|
#
|
||||||
|
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
# DEALINGS IN THE SOFTWARE.
|
||||||
|
#
|
||||||
|
# libnvethernetcl interface makefile fragment
|
||||||
|
#
|
||||||
|
###############################################################################
|
||||||
|
|
||||||
|
ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION
|
||||||
|
NV_INTERFACE_NAME := nvethernetcl
|
||||||
|
NV_INTERFACE_EXPORTS := lib$(NV_INTERFACE_NAME)
|
||||||
|
NV_INTERFACE_PUBLIC_INCLUDES := \
|
||||||
|
./include
|
||||||
|
endif
|
||||||
|
|
||||||
|
|
||||||
|
# Local Variables:
|
||||||
|
# indent-tabs-mode: t
|
||||||
|
# tab-width: 8
|
||||||
|
# End:
|
||||||
|
# vi: set tabstop=8 noexpandtab:
|
||||||
50
osi/dma/Makefile.tmk
Normal file
50
osi/dma/Makefile.tmk
Normal file
@@ -0,0 +1,50 @@
|
|||||||
|
################################### tell Emacs this is a -*- makefile-gmake -*-
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
#
|
||||||
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
# copy of this software and associated documentation files (the "Software"),
|
||||||
|
# to deal in the Software without restriction, including without limitation
|
||||||
|
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
# and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
# Software is furnished to do so, subject to the following conditions:
|
||||||
|
#
|
||||||
|
# The above copyright notice and this permission notice shall be included in
|
||||||
|
# all copies or substantial portions of the Software.
|
||||||
|
#
|
||||||
|
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
# DEALINGS IN THE SOFTWARE.
|
||||||
|
#
|
||||||
|
###############################################################################
|
||||||
|
|
||||||
|
ifdef NV_COMPONENT_FLAG_SHARED_LIBRARY_SECTION
|
||||||
|
include $(NV_BUILD_START_COMPONENT)
|
||||||
|
|
||||||
|
NV_COMPONENT_NAME := nvethernetcl
|
||||||
|
NV_COMPONENT_OWN_INTERFACE_DIR := .
|
||||||
|
NV_COMPONENT_SOURCES := \
|
||||||
|
eqos_dma.c \
|
||||||
|
osi_dma.c \
|
||||||
|
osi_dma_txrx.c
|
||||||
|
|
||||||
|
NV_COMPONENT_NEEDED_INTERFACE_DIRS := \
|
||||||
|
$(NV_SOURCE)/qnx/src/libs/nvethernet/osi_dependencies
|
||||||
|
|
||||||
|
NV_COMPONENT_INCLUDES := \
|
||||||
|
$(NV_SOURCE)/nvethernetrm/include \
|
||||||
|
$(NV_SOURCE)/core/include
|
||||||
|
|
||||||
|
include $(NV_BUILD_SHARED_LIBRARY)
|
||||||
|
endif
|
||||||
|
|
||||||
|
|
||||||
|
# Local Variables:
|
||||||
|
# indent-tabs-mode: t
|
||||||
|
# tab-width: 8
|
||||||
|
# End:
|
||||||
|
# vi: set tabstop=8 noexpandtab:
|
||||||
@@ -20,8 +20,8 @@
|
|||||||
* DEALINGS IN THE SOFTWARE.
|
* DEALINGS IN THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef EQOS_H_
|
#ifndef EQOS_DMA_H_
|
||||||
#define EQOS_H_
|
#define EQOS_DMA_H_
|
||||||
|
|
||||||
#define EQOS_AXI_BUS_WIDTH 0x10U
|
#define EQOS_AXI_BUS_WIDTH 0x10U
|
||||||
|
|
||||||
43
osi/dma/libnvethernetcl.export
Normal file
43
osi/dma/libnvethernetcl.export
Normal file
@@ -0,0 +1,43 @@
|
|||||||
|
################################### tell Emacs this is a -*- makefile-gmake -*-
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
#
|
||||||
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
# copy of this software and associated documentation files (the "Software"),
|
||||||
|
# to deal in the Software without restriction, including without limitation
|
||||||
|
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
# and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
# Software is furnished to do so, subject to the following conditions:
|
||||||
|
#
|
||||||
|
# The above copyright notice and this permission notice shall be included in
|
||||||
|
# all copies or substantial portions of the Software.
|
||||||
|
#
|
||||||
|
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
# DEALINGS IN THE SOFTWARE.
|
||||||
|
#
|
||||||
|
# libnvethernetcl interface export
|
||||||
|
#
|
||||||
|
###############################################################################
|
||||||
|
osi_disable_chan_tx_intr
|
||||||
|
osi_enable_chan_tx_intr
|
||||||
|
osi_disable_chan_rx_intr
|
||||||
|
osi_enable_chan_rx_intr
|
||||||
|
osi_clear_tx_intr
|
||||||
|
osi_clear_rx_intr
|
||||||
|
osi_start_dma
|
||||||
|
osi_stop_dma
|
||||||
|
osi_get_refill_rx_desc_cnt
|
||||||
|
osi_rx_dma_desc_init
|
||||||
|
osi_update_rx_tailptr
|
||||||
|
osi_set_rx_buf_len
|
||||||
|
osi_hw_transmit
|
||||||
|
osi_process_tx_completions
|
||||||
|
osi_process_rx_completions
|
||||||
|
osi_hw_dma_init
|
||||||
|
osi_hw_dma_deinit
|
||||||
|
osi_init_dma_ops
|
||||||
192
osi/dma/osi_dma.c
Normal file
192
osi/dma/osi_dma.c
Normal file
@@ -0,0 +1,192 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <osi_dma.h>
|
||||||
|
|
||||||
|
extern int dma_desc_init(struct osi_dma_priv_data *osi_dma);
|
||||||
|
extern struct osi_dma_chan_ops *eqos_get_dma_chan_ops(void);
|
||||||
|
|
||||||
|
void osi_init_dma_ops(struct osi_dma_priv_data *osi_dma)
|
||||||
|
{
|
||||||
|
if (osi_dma->mac == OSI_MAC_HW_EQOS) {
|
||||||
|
/* Get EQOS HW ops */
|
||||||
|
osi_dma->ops = eqos_get_dma_chan_ops();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int osi_hw_dma_init(struct osi_dma_priv_data *osi_dma)
|
||||||
|
{
|
||||||
|
unsigned int i, chan;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
if (osi_dma->ops->init_dma_channel != OSI_NULL) {
|
||||||
|
osi_dma->ops->init_dma_channel(osi_dma);
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = dma_desc_init(osi_dma);
|
||||||
|
if (ret != 0) {
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Enable channel interrupts at wrapper level and start DMA */
|
||||||
|
for (i = 0; i < osi_dma->num_dma_chans; i++) {
|
||||||
|
chan = osi_dma->dma_chans[i];
|
||||||
|
|
||||||
|
osi_enable_chan_tx_intr(osi_dma, chan);
|
||||||
|
osi_enable_chan_rx_intr(osi_dma, chan);
|
||||||
|
osi_start_dma(osi_dma, chan);
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* osi_hw_deinit - De-init the HW
|
||||||
|
* @osi: OSI private data structure.
|
||||||
|
*
|
||||||
|
* Algorithm:
|
||||||
|
* 1) Stop the DMA
|
||||||
|
* 2) free all allocated resources.
|
||||||
|
*
|
||||||
|
* Dependencies: None
|
||||||
|
* Protection: None
|
||||||
|
* Return: None
|
||||||
|
*/
|
||||||
|
void osi_hw_dma_deinit(struct osi_dma_priv_data *osi_dma)
|
||||||
|
{
|
||||||
|
unsigned int i;
|
||||||
|
|
||||||
|
for (i = 0; i < osi_dma->num_dma_chans; i++) {
|
||||||
|
osi_stop_dma(osi_dma, osi_dma->dma_chans[i]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_disable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->disable_chan_tx_intr != OSI_NULL)) {
|
||||||
|
osi_dma->ops->disable_chan_tx_intr(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_enable_chan_tx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->enable_chan_tx_intr != OSI_NULL)) {
|
||||||
|
osi_dma->ops->enable_chan_tx_intr(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_disable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->disable_chan_rx_intr != OSI_NULL)) {
|
||||||
|
osi_dma->ops->disable_chan_rx_intr(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_enable_chan_rx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->enable_chan_rx_intr != OSI_NULL)) {
|
||||||
|
osi_dma->ops->enable_chan_rx_intr(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_clear_tx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->clear_tx_intr != OSI_NULL)) {
|
||||||
|
osi_dma->ops->clear_tx_intr(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_clear_rx_intr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->clear_rx_intr != OSI_NULL)) {
|
||||||
|
osi_dma->ops->clear_rx_intr(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_start_dma(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->start_dma != OSI_NULL)) {
|
||||||
|
osi_dma->ops->start_dma(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_stop_dma(struct osi_dma_priv_data *osi_dma,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
if ((osi_dma != OSI_NULL) && (osi_dma->ops != OSI_NULL) &&
|
||||||
|
(osi_dma->ops->stop_dma != OSI_NULL)) {
|
||||||
|
osi_dma->ops->stop_dma(osi_dma->base, chan);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned int osi_get_refill_rx_desc_cnt(struct osi_rx_ring *rx_ring)
|
||||||
|
{
|
||||||
|
return (rx_ring->cur_rx_idx - rx_ring->refill_idx) & (RX_DESC_CNT - 1U);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_rx_dma_desc_init(struct osi_rx_swcx *rx_swcx,
|
||||||
|
struct osi_rx_desc *rx_desc)
|
||||||
|
{
|
||||||
|
rx_desc->rdes0 = (unsigned int)L32(rx_swcx->buf_phy_addr);
|
||||||
|
rx_desc->rdes1 = (unsigned int)H32(rx_swcx->buf_phy_addr);
|
||||||
|
rx_desc->rdes2 = 0;
|
||||||
|
rx_desc->rdes3 = (RDES3_OWN | RDES3_IOC | RDES3_B1V);
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_update_rx_tailptr(struct osi_dma_priv_data *osi_dma,
|
||||||
|
struct osi_rx_ring *rx_ring,
|
||||||
|
unsigned int chan)
|
||||||
|
{
|
||||||
|
unsigned long tailptr = 0;
|
||||||
|
unsigned int refill_idx = rx_ring->refill_idx;
|
||||||
|
|
||||||
|
DECR_RX_DESC_INDEX(refill_idx, 1U);
|
||||||
|
tailptr = rx_ring->rx_desc_phy_addr +
|
||||||
|
(refill_idx * sizeof(struct osi_rx_desc));
|
||||||
|
|
||||||
|
if (osi_dma != OSI_NULL && osi_dma->ops != OSI_NULL &&
|
||||||
|
osi_dma->ops->update_rx_tailptr != OSI_NULL) {
|
||||||
|
osi_dma->ops->update_rx_tailptr(osi_dma->base, chan, tailptr);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void osi_set_rx_buf_len(struct osi_dma_priv_data *osi_dma)
|
||||||
|
{
|
||||||
|
if (osi_dma != OSI_NULL && osi_dma->ops != OSI_NULL &&
|
||||||
|
osi_dma->ops->set_rx_buf_len != OSI_NULL) {
|
||||||
|
osi_dma->ops->set_rx_buf_len(osi_dma);
|
||||||
|
}
|
||||||
|
}
|
||||||
@@ -24,6 +24,8 @@
|
|||||||
#include <osi_dma.h>
|
#include <osi_dma.h>
|
||||||
#include <osi_dma_txrx.h>
|
#include <osi_dma_txrx.h>
|
||||||
|
|
||||||
|
int dma_desc_init(struct osi_dma_priv_data *osi_dma);
|
||||||
|
|
||||||
static inline void osi_memset(void *s, int c, unsigned long count)
|
static inline void osi_memset(void *s, int c, unsigned long count)
|
||||||
{
|
{
|
||||||
char *xs = s;
|
char *xs = s;
|
||||||
@@ -1,81 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
|
||||||
* to deal in the Software without restriction, including without limitation
|
|
||||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
||||||
* and/or sell copies of the Software, and to permit persons to whom the
|
|
||||||
* Software is furnished to do so, subject to the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice shall be included in
|
|
||||||
* all copies or substantial portions of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
||||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
||||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
||||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
||||||
* DEALINGS IN THE SOFTWARE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <osi_dma.h>
|
|
||||||
|
|
||||||
extern int dma_desc_init(struct osi_dma_priv_data *osi_dma);
|
|
||||||
extern struct osi_dma_chan_ops *eqos_get_dma_chan_ops(void);
|
|
||||||
|
|
||||||
void osi_init_dma_ops(struct osi_dma_priv_data *osi_dma)
|
|
||||||
{
|
|
||||||
if (osi_dma->mac == OSI_MAC_HW_EQOS) {
|
|
||||||
/* Get EQOS HW ops */
|
|
||||||
osi_dma->ops = eqos_get_dma_chan_ops();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int osi_hw_dma_init(struct osi_dma_priv_data *osi_dma)
|
|
||||||
{
|
|
||||||
unsigned int i, chan;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if (osi_dma->ops->init_dma_channel != OSI_NULL) {
|
|
||||||
osi_dma->ops->init_dma_channel(osi_dma);
|
|
||||||
}
|
|
||||||
|
|
||||||
ret = dma_desc_init(osi_dma);
|
|
||||||
if (ret != 0) {
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Enable channel interrupts at wrapper level and start DMA */
|
|
||||||
for (i = 0; i < osi_dma->num_dma_chans; i++) {
|
|
||||||
chan = osi_dma->dma_chans[i];
|
|
||||||
|
|
||||||
osi_enable_chan_tx_intr(osi_dma, chan);
|
|
||||||
osi_enable_chan_rx_intr(osi_dma, chan);
|
|
||||||
osi_start_dma(osi_dma, chan);
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* osi_hw_deinit - De-init the HW
|
|
||||||
* @osi: OSI private data structure.
|
|
||||||
*
|
|
||||||
* Algorithm:
|
|
||||||
* 1) Stop the DMA
|
|
||||||
* 2) free all allocated resources.
|
|
||||||
*
|
|
||||||
* Dependencies: None
|
|
||||||
* Protection: None
|
|
||||||
* Return: None
|
|
||||||
*/
|
|
||||||
void osi_hw_dma_deinit(struct osi_dma_priv_data *osi_dma)
|
|
||||||
{
|
|
||||||
unsigned int i;
|
|
||||||
|
|
||||||
for (i = 0; i < osi_dma->num_dma_chans; i++) {
|
|
||||||
osi_stop_dma(osi_dma, osi_dma->dma_chans[i]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Reference in New Issue
Block a user