diff --git a/osi/core/eqos_core.c b/osi/core/eqos_core.c
index de6dad4..a21b838 100644
--- a/osi/core/eqos_core.c
+++ b/osi/core/eqos_core.c
@@ -2001,6 +2001,14 @@ static void eqos_tsn_init(struct osi_core_priv_data *osi_core,
 		osi_writela(osi_core, val, (nveu8_t *)osi_core->base +
 			   EQOS_MTL_EST_CONTROL);
 
+		val = osi_readla(osi_core, (nveu8_t *)osi_core->base +
+				EQOS_MTL_EST_OVERHEAD);
+		val &= ~EQOS_MTL_EST_OVERHEAD_OVHD;
+		/* As per hardware team recommendation */
+		val |= EQOS_MTL_EST_OVERHEAD_RECOMMEND;
+		osi_writela(osi_core, val, (nveu8_t *)osi_core->base +
+			   EQOS_MTL_EST_OVERHEAD);
+
 		eqos_enable_mtl_interrupts(osi_core);
 	}
 
diff --git a/osi/core/eqos_core.h b/osi/core/eqos_core.h
index 8aa0d70..326732d 100644
--- a/osi/core/eqos_core.h
+++ b/osi/core/eqos_core.h
@@ -145,6 +145,7 @@
 #define EQOS_MTL_RXQ_DMA_MAP0		0x0C30
 #define EQOS_MTL_RXQ_DMA_MAP1		0x0C34
 #define EQOS_MTL_EST_CONTROL		0x0C50
+#define EQOS_MTL_EST_OVERHEAD		0x0C54
 #define EQOS_MTL_EST_STATUS		0x0C58
 #define EQOS_MTL_EST_SCH_ERR		0x0C60
 #define EQOS_MTL_EST_FRMS_ERR		0x0C64
@@ -538,6 +539,10 @@
 #define EQOS_MTL_EST_CONTROL_DDBF		OSI_BIT(4)
 #define EQOS_MTL_EST_CONTROL_SSWL		OSI_BIT(1)
 #define EQOS_MTL_EST_CONTROL_EEST		OSI_BIT(0)
+#define EQOS_MTL_EST_OVERHEAD_OVHD		(OSI_BIT(5) | OSI_BIT(4) | \
+						 OSI_BIT(3) | OSI_BIT(2) | \
+						 OSI_BIT(1) | OSI_BIT(0))
+#define EQOS_MTL_EST_OVERHEAD_RECOMMEND		0x17U
 /* EST GCL controlOSI_BITmap */
 #define EQOS_MTL_EST_ADDR_SHIFT			8U
 #define EQOS_MTL_EST_ADDR_MASK			(OSI_BIT(8) | OSI_BIT(9) | \