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osi: xpcs: Remove XPCS lane bring up retry

Browse Source 
Issue:
When the ethernet server got enabled the boot time KPI
increased due to the XPCS lane up retry.

Fix:
Remove retry from OSI and add SET_SPEED ioctl
retry from OSD.

Bug 3414276

Change-Id: I617ab51ee6ddd50b449f78ecc9c858b1d9196b3e
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2617516
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Mohan Thadikamalla
2021-10-27 08:12:36 +05:30
committed by Bhadram Varka
parent e424035b9b
commit 6594bc87f2
1 changed files with 21 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

57
osi/core/xpcs.c
View File

@@ -309,10 +309,8 @@ static nve32_t xpcs_lane_bring_up(struct osi_core_priv_data *osi_core)
{
unsigned int retry = 1000;
unsigned int count;
int cond;
nveu32_t cnt = 0;
nveu32_t val = 0;
#define PCS_RETRY_MAX 300
int cond;
if (xpcs_uphy_lane_bring_up(osi_core,
XPCS_WRAP_UPHY_HW_INIT_CTRL_TX_EN) < 0) {
@@ -393,43 +391,30 @@ static nve32_t xpcs_lane_bring_up(struct osi_core_priv_data *osi_core)
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
/* Step7 RX_CDR_RESET */
val = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
val |= XPCS_WRAP_UPHY_RX_CONTROL_0_0_RX_CDR_RESET;
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
while (cnt < PCS_RETRY_MAX) {
/* Step7 RX_CDR_RESET */
val = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
val |= XPCS_WRAP_UPHY_RX_CONTROL_0_0_RX_CDR_RESET;
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
/* Step8 RX_CDR_RESET */
val = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
val &= ~(XPCS_WRAP_UPHY_RX_CONTROL_0_0_RX_CDR_RESET);
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
/* Step8 RX_CDR_RESET */
val = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
val &= ~(XPCS_WRAP_UPHY_RX_CONTROL_0_0_RX_CDR_RESET);
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
val = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
/* Step9 RX_PCS_PHY_RDY */
val |= XPCS_WRAP_UPHY_RX_CONTROL_0_0_RX_PCS_PHY_RDY;
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
val = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
/* Step9 RX_PCS_PHY_RDY */
val |= XPCS_WRAP_UPHY_RX_CONTROL_0_0_RX_PCS_PHY_RDY;
osi_writela(osi_core, val, (nveu8_t *)osi_core->xpcs_base +
XPCS_WRAP_UPHY_RX_CONTROL_0_0);
if (xpcs_check_pcs_lock_status(osi_core) < 0) {
cnt += 1;
osi_core->osd_ops.udelay(1000U);
} else {
OSI_CORE_INFO(OSI_NULL, OSI_LOG_ARG_HW_FAIL,
"PCS block lock SUCCESS\n", 0ULL);
break;
}
}
if (cnt == PCS_RETRY_MAX) {
if (xpcs_check_pcs_lock_status(osi_core) < 0) {
OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_HW_FAIL,
"Failed to get PCS block lock after max retries\n",
cnt);
"Failed to get PCS block lock\n", 0ULL);
return -1;
}