osi: xpcs: fix XPCS wrapper register programming

Bug 200760072

Change-Id: I704f8f9e5b46ada7bd4dd6dd09fd43d09f10e906
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2572477
Tested-by: Narayan Reddy <narayanr@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Bhadram Varka
2021-08-08 00:55:11 +05:30
committed by mobile promotions
parent 3293a90aba
commit 972f1cc398

View File

@@ -218,9 +218,11 @@ static nve32_t xpcs_uphy_lane_bring_up(struct osi_core_priv_data *osi_core,
nveu32_t val = 0;
nveu32_t count;
val = xpcs_read(xpcs_base, XPCS_WRAP_UPHY_HW_INIT_CTRL);
val = osi_readla(osi_core,
(nveu8_t *)xpcs_base + XPCS_WRAP_UPHY_HW_INIT_CTRL);
val |= lane_init_en;
xpcs_write(xpcs_base, XPCS_WRAP_UPHY_HW_INIT_CTRL, val);
osi_writela(osi_core, val,
(nveu8_t *)xpcs_base + XPCS_WRAP_UPHY_HW_INIT_CTRL);
count = 0;
while (cond == COND_NOT_MET) {
@@ -229,7 +231,8 @@ static nve32_t xpcs_uphy_lane_bring_up(struct osi_core_priv_data *osi_core,
}
count++;
val = xpcs_read(xpcs_base, XPCS_WRAP_UPHY_HW_INIT_CTRL);
val = osi_readla(osi_core,
(nveu8_t *)xpcs_base + XPCS_WRAP_UPHY_HW_INIT_CTRL);
if ((val & lane_init_en) == OSI_NONE) {
/* exit loop */
cond = COND_MET;
@@ -266,7 +269,8 @@ static nve32_t xpcs_check_pcs_lock_status(struct osi_core_priv_data *osi_core)
}
count++;
val = xpcs_read(xpcs_base, XPCS_WRAP_IRQ_STATUS);
val = osi_readla(osi_core,
(nveu8_t *)xpcs_base + XPCS_WRAP_IRQ_STATUS);
if ((val & XPCS_WRAP_IRQ_STATUS_PCS_LINK_STS) ==
XPCS_WRAP_IRQ_STATUS_PCS_LINK_STS) {
/* exit loop */
@@ -277,7 +281,7 @@ static nve32_t xpcs_check_pcs_lock_status(struct osi_core_priv_data *osi_core)
}
/* Clear the status */
xpcs_write(xpcs_base, XPCS_WRAP_IRQ_STATUS, val);
osi_writela(osi_core, val, (nveu8_t *)xpcs_base + XPCS_WRAP_IRQ_STATUS);
return 0;
}