osi: core: combine set_mode

Bug 3701869

Change-Id: I01d8e45b5818277441775d17e332c246ffa13a0e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738021
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit

osi/core/core_common.c

@@ -103,6 +103,32 @@ void hw_stop_mac(struct osi_core_priv_data *const osi_core)
 	osi_writela(osi_core, value, ((nveu8_t *)addr + mac_mcr_re_reg[osi_core->mac]));
 }
 
+nve32_t hw_set_mode(struct osi_core_priv_data *const osi_core, const nve32_t mode)
+{
+	void *base = osi_core->base;
+	nveu32_t mcr_val;
+	nve32_t ret = 0;
+	const nveu32_t set_bit[2] = { EQOS_MCR_DO, EQOS_MCR_DM };
+	const nveu32_t clear_bit[2] = { EQOS_MCR_DM, EQOS_MCR_DO };
+
+	/* don't allow only if loopback mode is other than 0 or 1 */
+	if ((mode != OSI_FULL_DUPLEX) && (mode != OSI_HALF_DUPLEX)) {
+		OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_INVALID,
+				"Invalid duplex mode\n", 0ULL);
+		ret = -1;
+		goto fail;
+	}
+
+	if (osi_core->mac == OSI_MAC_HW_EQOS) {
+		mcr_val = osi_readla(osi_core, (nveu8_t *)base + EQOS_MAC_MCR);
+		mcr_val |= set_bit[mode];
+		mcr_val &= ~clear_bit[mode];
+		osi_writela(osi_core, mcr_val, ((nveu8_t *)base + EQOS_MAC_MCR));
+	}
+fail:
+	return ret;
+}
+
 /**
  * @brief hw_est_read - indirect read the GCL to Software own list
  * (SWOL)

osi/core/core_common.h

@@ -62,4 +62,5 @@ nve32_t gcl_validate(struct osi_core_priv_data *const osi_core,
 nve32_t hw_poll_for_swr(struct osi_core_priv_data *const osi_core);
 void hw_start_mac(struct osi_core_priv_data *const osi_core);
 void hw_stop_mac(struct osi_core_priv_data *const osi_core);
+nve32_t hw_set_mode(struct osi_core_priv_data *const osi_core, const nve32_t mode);
 #endif /* INCLUDED_CORE_COMMON_H */

osi/core/core_local.h

@@ -95,9 +95,6 @@ struct core_ops {
 	void (*core_deinit)(struct osi_core_priv_data *const osi_core);
 	/** Called to handle common interrupt */
 	void (*handle_common_intr)(struct osi_core_priv_data *const osi_core);
-	/** Called to set the mode at MAC (full/duplex) */
-	nve32_t (*set_mode)(struct osi_core_priv_data *const osi_core,
-			    const nve32_t mode);
 	/** Called to set the speed at MAC */
 	nve32_t (*set_speed)(struct osi_core_priv_data *const osi_core,
 			     const nve32_t speed);

osi/core/eqos_core.c

@@ -606,58 +606,6 @@ static int eqos_set_speed(struct osi_core_priv_data *const osi_core,
 	return 0;
 }
 
-/**
- * @brief eqos_set_mode - Set operating mode
- *
- * @note
- * Algorithm:
- *  - Based on the mode (HALF/FULL Duplex) MAC will be configured
- *    accordingly.
- *  - If invalid value for mode, return -1.
- *  - Refer to EQOS column of <<RM_11, (sequence diagram)>> for API details.
- *  - TraceID: ETHERNET_NVETHERNETRM_011
- *
- * @param[in] osi_core: OSI core private data structure. used param is base.
- * @param[in] mode:	Operating mode. (OSI_FULL_DUPLEX/OSI_HALF_DUPLEX)
- *
- * @pre MAC should be initialized and started. see osi_start_mac()
- *
- * @note
- * API Group:
- * - Initialization: Yes
- * - Run time: Yes
- * - De-initialization: No
- *
- * @retval 0 on success
- * @retval -1 on failure.
- */
-static nve32_t eqos_set_mode(struct osi_core_priv_data *const osi_core,
-			     const nve32_t mode)
-{
-	void *base = osi_core->base;
-	nveu32_t mcr_val;
-
-	mcr_val = osi_readla(osi_core, (nveu8_t *)base + EQOS_MAC_MCR);
-	if (mode == OSI_FULL_DUPLEX) {
-		mcr_val |= EQOS_MCR_DM;
-		/* DO (disable receive own) bit is not applicable, don't care */
-		mcr_val &= ~EQOS_MCR_DO;
-	} else if (mode == OSI_HALF_DUPLEX) {
-		mcr_val &= ~EQOS_MCR_DM;
-		/* Set DO (disable receive own) bit */
-		mcr_val |= EQOS_MCR_DO;
-	} else {
-		OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_INVALID,
-			     "set_mode: invalid mode\n", 0ULL);
-		return -1;
-		/* Nothing here */
-	}
-	eqos_core_safety_writel(osi_core, mcr_val,
-				(nveu8_t *)base + EQOS_MAC_MCR,
-				EQOS_MAC_MCR_IDX);
-	return 0;
-}
-
 /**
  * @brief eqos_calculate_per_queue_fifo - Calculate per queue FIFO size
  *
@@ -2437,7 +2385,7 @@ static void eqos_handle_mac_fpe_intrs(struct osi_core_priv_data *osi_core)
  *    - RGMII/SMII MAC interrupt
  *    - If link is down
  *  - Identify speed and mode changes from EQOS_MAC_PCS register and configure the same by calling
- *    eqos_set_speed(), eqos_set_mode()(proceed even on error for this call) API's.
+ *    eqos_set_speed(), hw_set_mode()(proceed even on error for this call) API's.
  *  - SWUD_ID: ETHERNET_NVETHERNETRM_010_1
  *
  * @param[in] osi_core: OSI core private data structure. Used param base.
@@ -2514,13 +2462,13 @@ static void eqos_handle_mac_intrs(struct osi_core_priv_data *const osi_core,
 
 	/* check for Link mode (full/half duplex) */
 	if ((mac_pcs & EQOS_MAC_PCS_LNKMOD) == EQOS_MAC_PCS_LNKMOD) {
-		ret = eqos_set_mode(osi_core, OSI_FULL_DUPLEX);
+		ret = hw_set_mode(osi_core, OSI_FULL_DUPLEX);
 		if (osi_unlikely(ret < 0)) {
 			OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_HW_FAIL,
 				     "set mode in full duplex failed\n", 0ULL);
 		}
 	} else {
-		ret = eqos_set_mode(osi_core, OSI_HALF_DUPLEX);
+		ret = hw_set_mode(osi_core, OSI_HALF_DUPLEX);
 		if (osi_unlikely(ret < 0)) {
 			OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_HW_FAIL,
 				     "set mode in half duplex failed\n", 0ULL);
@@ -6740,7 +6688,6 @@ void eqos_init_core_ops(struct core_ops *ops)
 	ops->core_init = eqos_core_init;
 	ops->core_deinit = eqos_core_deinit;
 	ops->handle_common_intr = eqos_handle_common_intr;
-	ops->set_mode = eqos_set_mode;
 	ops->set_speed = eqos_set_speed;
 	ops->pad_calibrate = eqos_pad_calibrate;
 	ops->config_fw_err_pkts = eqos_config_fw_err_pkts;

osi/core/mgbe_core.c

@@ -5816,26 +5816,6 @@ static void mgbe_config_ssir(struct osi_core_priv_data *const osi_core,
 	}
 }
 
-/**
- * @brief mgbe_set_mode - Setting the mode.
- *
- * @param[in] osi_core: OSI core private data structure.
- * @param[in] mode: mode to be set.
- *
- * @note
- * API Group:
- * - Initialization: Yes
- * - Run time: Yes
- * - De-initialization: Yes
- * @retval 0
- */
-static nve32_t mgbe_set_mode(OSI_UNUSED
-			     struct osi_core_priv_data *const osi_core,
-			     OSI_UNUSED const nve32_t mode)
-{
-	return 0;
-}
-
 /**
  * @brief mgbe_read_reg - Read a register
  *
@@ -6109,8 +6089,6 @@ void mgbe_init_core_ops(struct core_ops *ops)
 	ops->core_deinit = mgbe_core_deinit;
 	ops->validate_regs = mgbe_validate_core_regs;
 	ops->handle_common_intr = mgbe_handle_common_intr;
-	/* only MGBE supports full duplex */
-	ops->set_mode = mgbe_set_mode;
 	/* by default speed is 10G */
 	ops->set_speed = mgbe_set_speed;
 	ops->pad_calibrate = mgbe_pad_calibrate;

osi/core/osi_hal.c

@@ -316,7 +316,7 @@ nve32_t osi_set_mode(struct osi_core_priv_data *const osi_core,
 		return -1;
 	}
 
-	return l_core->ops_p->set_mode(osi_core, mode);
+	return hw_set_mode(osi_core, mode);
 }
 
 nve32_t osi_set_speed(struct osi_core_priv_data *const osi_core,
@@ -2003,7 +2003,7 @@ nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
 		break;
 
 	case OSI_CMD_SET_MODE:
-		ret = ops_p->set_mode(osi_core, data->arg6_32);
+		ret = hw_set_mode(osi_core, data->arg6_32);
 		break;
 
 	case OSI_CMD_SET_SPEED: