From a89360f8db82264cc5376c28298a29ce366d89b0 Mon Sep 17 00:00:00 2001 From: Bhadram Varka Date: Wed, 19 Jun 2024 12:14:35 +0000 Subject: [PATCH] osi: eqos: Keep the reset value for T264 EQOS Issue: Ethernet driver is programming the ASID - 0x3 for EQOS IP which is different from the value passed from DT. It resulted SMMU/memory issues while performing data transfers Fix: Keep the on reset values for T264 EQOS since lower 8-bits of ASID (0x160) needs to program in ASID registers of EQOS IP. Bug 4701860 Change-Id: I2c799554d054103bea4c8a05a7bdd0961be81683 Signed-off-by: Bhadram Varka Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3159696 GVS: buildbot_gerritrpt Tested-by: Seema Khowala Reviewed-by: svcacv Reviewed-by: Narayana Reddy P --- osi/core/eqos_core.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/osi/core/eqos_core.c b/osi/core/eqos_core.c index 6aad4be..3cdcc15 100644 --- a/osi/core/eqos_core.c +++ b/osi/core/eqos_core.c @@ -1199,8 +1199,15 @@ static nve32_t eqos_core_init(struct osi_core_priv_data *const osi_core) (nveu8_t *)osi_core->base + EQOS_MMC_CNTRL); #ifndef OSI_STRIPPED_LIB - /* Configure ASID */ - eqos_configure_asid(osi_core); + if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) { + /* Configure ASID for T234 EQOS + * Keep the on reset value for T264 EQOS + * which is zero since EQOS SID is 0x160 + * and driver needs to program lower 8 bit values + * which will be zero for T264 + */ + eqos_configure_asid(osi_core); + } /* Mapping MTL Rx queue and DMA Rx channel */ if (osi_core->dcs_en == OSI_ENABLE) {