diff --git a/include/ivc_core.h b/include/ivc_core.h index 88900fe..e977dd4 100644 --- a/include/ivc_core.h +++ b/include/ivc_core.h @@ -46,8 +46,7 @@ typedef enum ivc_cmd { handle_ioctl, init_macsec, deinit_macsec, - handle_ns_irq_macsec, - handle_s_irq_macsec, + handle_irq_macsec, lut_config_macsec, kt_config_macsec, cipher_config, @@ -58,7 +57,6 @@ typedef enum ivc_cmd { dbg_buf_config_macsec, dbg_events_config_macsec, macsec_get_sc_lut_key_index, - macsec_update_mtu_size, nvethmgr_get_status, nvethmgr_verify_ts, nvethmgr_get_avb_perf, diff --git a/include/osi_macsec.h b/include/osi_macsec.h index 5ac81d7..99f10f8 100644 --- a/include/osi_macsec.h +++ b/include/osi_macsec.h @@ -332,10 +332,8 @@ struct osi_macsec_core_ops { nveu32_t mtu); /** macsec de-init */ nve32_t (*deinit)(struct osi_core_priv_data *const osi_core); - /** Non Secure irq handler */ - void (*handle_ns_irq)(struct osi_core_priv_data *const osi_core); - /** Secure irq handler */ - void (*handle_s_irq)(struct osi_core_priv_data *const osi_core); + /** Macsec irq handler */ + void (*handle_irq)(struct osi_core_priv_data *const osi_core); /** macsec lut config */ nve32_t (*lut_config)(struct osi_core_priv_data *const osi_core, struct osi_macsec_lut_config *const lut_config); @@ -347,9 +345,11 @@ struct osi_macsec_core_ops { /** macsec cipher config */ nve32_t (*cipher_config)(struct osi_core_priv_data *const osi_core, nveu32_t cipher); +#ifdef DEBUG_MACSEC /** macsec loopback config */ nve32_t (*loopback_config)(struct osi_core_priv_data *const osi_core, nveu32_t enable); +#endif /* DEBUG_MACSEC */ /** macsec enable */ nve32_t (*macsec_en)(struct osi_core_priv_data *const osi_core, nveu32_t enable); @@ -360,21 +360,24 @@ struct osi_macsec_core_ops { nveu16_t *kt_idx); /** macsec read mmc counters */ void (*read_mmc)(struct osi_core_priv_data *const osi_core); +#ifdef DEBUG_MACSEC /** macsec debug buffer config */ nve32_t (*dbg_buf_config)(struct osi_core_priv_data *const osi_core, struct osi_macsec_dbg_buf_config *const dbg_buf_config); /** macsec debug buffer config */ nve32_t (*dbg_events_config)(struct osi_core_priv_data *const osi_core, struct osi_macsec_dbg_buf_config *const dbg_buf_config); +#endif /* DEBUG_MACSEC */ /** macsec get Key Index start for a given SCI */ nve32_t (*get_sc_lut_key_index)(struct osi_core_priv_data *const osi_core, nveu8_t *sci, nveu32_t *key_index, nveu16_t ctlr); /** macsec set MTU size */ nve32_t (*update_mtu)(struct osi_core_priv_data *const osi_core, nveu32_t mtu); -#ifdef OSI_DEBUG - void (*debug_intr_config)(struct osi_core_priv_data *const osi_core, nveu32_t enable); -#endif +#ifdef DEBUG_MACSEC + /** macsec interrupts configuration */ + void (*intr_config)(struct osi_core_priv_data *const osi_core, nveu32_t enable); +#endif /* DEBUG_MACSEC */ }; ////////////////////////////////////////////////////////////////////////// @@ -462,12 +465,12 @@ nve32_t osi_macsec_init(struct osi_core_priv_data *const osi_core, nve32_t osi_macsec_deinit(struct osi_core_priv_data *const osi_core); /** - * @brief osi_macsec_ns_isr - macsec non-secure irq handler + * @brief osi_macsec_isr - macsec irq handler * * @note * Algorithm: * - Return -1 if osi core or ops is null - * - handles non-secure macsec interrupts + * - handles macsec interrupts * - Refer to MACSEC column of <<******, (sequence diagram)>> for API details. * - TraceID: *********** * @@ -483,31 +486,7 @@ nve32_t osi_macsec_deinit(struct osi_core_priv_data *const osi_core); * * @retval none */ -void osi_macsec_ns_isr(struct osi_core_priv_data *const osi_core); - -/** - * @brief osi_macsec_s_isr - macsec secure irq handler - * - * @note - * Algorithm: - * - Return -1 if osi core or ops is null - * - handles secure macsec interrupts - * - Refer to MACSEC column of <<******, (sequence diagram)>> for API details. - * - TraceID: *********** - * - * @param[in] osi_core: OSI core private data structure - * - * @pre MACSEC needs to be out of reset and proper clock configured. - * - * @note - * API Group: - * - Initialization: No - * - Run time: Yes - * - De-initialization: No - * - * @retval none - */ -void osi_macsec_s_isr(struct osi_core_priv_data *const osi_core); +void osi_macsec_isr(struct osi_core_priv_data *const osi_core); /** * @brief osi_macsec_config_lut - Read or write to macsec LUTs @@ -592,6 +571,7 @@ nve32_t osi_macsec_config_kt(struct osi_core_priv_data *const osi_core, nve32_t osi_macsec_cipher_config(struct osi_core_priv_data *const osi_core, nveu32_t cipher); +#ifdef DEBUG_MACSEC /** * @brief osi_macsec_loopback - API to enable/disable macsec loopback * @@ -616,8 +596,10 @@ nve32_t osi_macsec_cipher_config(struct osi_core_priv_data *const osi_core, * @retval 0 on success * @retval -1 on failure */ + nve32_t osi_macsec_loopback(struct osi_core_priv_data *const osi_core, nveu32_t enable); +#endif /* DEBUG_MACSEC */ /** * @brief osi_macsec_en - API to enable/disable macsec @@ -704,6 +686,7 @@ nve32_t osi_macsec_config(struct osi_core_priv_data *const osi_core, */ nve32_t osi_macsec_read_mmc(struct osi_core_priv_data *const osi_core); +#ifdef DEBUG_MACSEC /** * @brief osi_macsec_config_dbg_buf - Reads the debug buffer captured * @@ -759,7 +742,7 @@ nve32_t osi_macsec_config_dbg_buf( nve32_t osi_macsec_dbg_events_config( struct osi_core_priv_data *const osi_core, struct osi_macsec_dbg_buf_config *const dbg_buf_config); - +#endif /* DEBUG_MACSEC */ /** * @brief osi_macsec_get_sc_lut_key_index - API to get key index for a given SCI * diff --git a/osi/core/Makefile.interface.tmk b/osi/core/Makefile.interface.tmk index 4637979..752cfc2 100644 --- a/osi/core/Makefile.interface.tmk +++ b/osi/core/Makefile.interface.tmk @@ -26,7 +26,11 @@ ifdef NV_INTERFACE_FLAG_SHARED_LIBRARY_SECTION NV_INTERFACE_NAME := nvethernetrm +ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),0) +NV_INTERFACE_EXPORTS := lib$(NV_INTERFACE_NAME)_debug +else NV_INTERFACE_EXPORTS := lib$(NV_INTERFACE_NAME) +endif NV_INTERFACE_PUBLIC_INCLUDES := \ ./include endif diff --git a/osi/core/Makefile.tmk b/osi/core/Makefile.tmk index 00ba1cb..9f97df6 100644 --- a/osi/core/Makefile.tmk +++ b/osi/core/Makefile.tmk @@ -48,7 +48,6 @@ NV_COMPONENT_SOURCES := \ $(NV_SOURCE)/nvethernetrm/osi/core/macsec.c NV_COMPONENT_CFLAGS += -DMACSEC_SUPPORT -NV_COMPONENT_CFLAGS += -DDEBUG_MACSEC #NV_COMPONENT_CFLAGS += -DMACSEC_KEY_PROGRAM ifeq ($(NV_BUILD_CONFIGURATION_OS_IS_LINUX),1) @@ -59,6 +58,7 @@ endif ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),0) NV_COMPONENT_CFLAGS += -DOSI_DEBUG +NV_COMPONENT_CFLAGS += -DDEBUG_MACSEC endif NV_COMPONENT_INCLUDES := \ diff --git a/osi/core/ivc_core.c b/osi/core/ivc_core.c index 31bd1e9..ce39fa7 100644 --- a/osi/core/ivc_core.c +++ b/osi/core/ivc_core.c @@ -190,6 +190,7 @@ static nve32_t ivc_read_phy_reg(struct osi_core_priv_data *const osi_core, } #ifdef MACSEC_SUPPORT +#ifdef DEBUG_MACSEC /** * @brief ivc_macsec_dbg_events_config - Configure Debug events * @@ -261,6 +262,7 @@ static int ivc_macsec_dbg_buf_config( exit: return ret; } +#endif /* DEBUG_MACSEC */ /** * @brief macsec_read_mmc - To read statitics registers and update structure @@ -368,31 +370,6 @@ exit: return ret; } -/** - * @brief ivc_macsec_update_mtu - Update MACSEC mtu. - * - * @param[in] osi_core: OSI Core private data structure. - * @param[in] mtu: MACSEC MTU len. - * - * @retval 0 on Success - * @retval -1 on Failure - */ -static nve32_t ivc_macsec_update_mtu(struct osi_core_priv_data *const osi_core, - nveu32_t mtu) -{ - ivc_msg_common_t msg; - nveu32_t index = 0; - - osi_memset(&msg, 0, sizeof(msg)); - - msg.cmd = macsec_update_mtu_size; - msg.data.args.arguments[index] = mtu; - index++; - msg.data.args.count = index; - - return osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg)); -} - /** * @brief ivc_macsec_enable - Enable or disable Macsec. * @@ -418,6 +395,7 @@ static int ivc_macsec_enable(struct osi_core_priv_data *const osi_core, return osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg)); } +#ifdef DEBUG_MACSEC /** * @brief ivc_macsec_loopback_config - Loopback configure. * @@ -442,6 +420,7 @@ static int ivc_macsec_loopback_config(struct osi_core_priv_data *const osi_core, return osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg)); } +#endif /* DEBUG_MACSEC */ #ifdef MACSEC_KEY_PROGRAM /** @@ -537,32 +516,18 @@ exit: } /** - * @brief ivc_macsec_handle_s_irq - handle s irq. + * @brief ivc_macsec_handle_irq - handle macsec irq. * * @param[in] osi_core: OSI Core private data structure. * */ -static void ivc_macsec_handle_s_irq(OSI_UNUSED +static void ivc_macsec_handle_irq(OSI_UNUSED struct osi_core_priv_data *const osi_core) { OSI_CORE_INFO(osi_core->osd, OSI_LOG_ARG_INVALID, "Nothing to handle \n", 0ULL); } -/** - * @brief ivc_macsec_handle_ns_irq - handle ns irq. - * - * @param[in] osi_core: OSI Core private data structure. - * - */ - -static void ivc_macsec_handle_ns_irq(OSI_UNUSED - struct osi_core_priv_data *const osi_core) -{ - OSI_CORE_INFO(osi_core->osd, OSI_LOG_ARG_INVALID, - "Nothing to handle \n", 0ULL); -} - /** * @brief ivc_macsec_deinit - De Initialize. * @@ -623,21 +588,21 @@ void ivc_init_macsec_ops(void *macsecops) ops->init = ivc_macsec_init; ops->deinit = ivc_macsec_deinit; - ops->handle_ns_irq = ivc_macsec_handle_ns_irq; - ops->handle_s_irq = ivc_macsec_handle_s_irq; + ops->handle_irq = ivc_macsec_handle_irq; ops->lut_config = ivc_macsec_lut_config; #ifdef MACSEC_KEY_PROGRAM ops->kt_config = ivc_macsec_kt_config; #endif /* MACSEC_KEY_PROGRAM */ ops->cipher_config = ivc_macsec_cipher_config; - ops->loopback_config = ivc_macsec_loopback_config; ops->macsec_en = ivc_macsec_enable; ops->config = ivc_macsec_config; ops->read_mmc = ivc_macsec_read_mmc; - ops->dbg_buf_config = ivc_macsec_dbg_buf_config; +#ifdef DEBUG_MACSEC + ops->loopback_config = ivc_macsec_loopback_config; ops->dbg_events_config = ivc_macsec_dbg_events_config; + ops->dbg_buf_config = ivc_macsec_dbg_buf_config; +#endif /* DEBUG_MACSEC */ ops->get_sc_lut_key_index = ivc_get_sc_lut_key_index; - ops->update_mtu = ivc_macsec_update_mtu; } #endif diff --git a/osi/core/libnvethernetrm.export b/osi/core/libnvethernetrm.export index 28df803..c267b97 100644 --- a/osi/core/libnvethernetrm.export +++ b/osi/core/libnvethernetrm.export @@ -32,18 +32,13 @@ osi_get_core osi_handle_ioctl osi_macsec_en osi_macsec_deinit -osi_macsec_ns_isr -osi_macsec_s_isr +osi_macsec_isr osi_macsec_init osi_macsec_cipher_config osi_macsec_config osi_init_macsec_ops -osi_macsec_loopback osi_macsec_read_mmc -osi_macsec_dbg_events_config -osi_macsec_config_dbg_buf osi_macsec_config_lut osi_macsec_get_sc_lut_key_index -osi_macsec_update_mtu # Enable below if MACSEC_KEY_PROGRAM is enabled #osi_macsec_kt_config diff --git a/osi/core/libnvethernetrm_debug.export b/osi/core/libnvethernetrm_debug.export new file mode 100644 index 0000000..32f526d --- /dev/null +++ b/osi/core/libnvethernetrm_debug.export @@ -0,0 +1,47 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# libnvethernetrm interface export +# +############################################################################### +osi_init_core_ops +osi_write_phy_reg +osi_read_phy_reg +osi_hw_core_init +osi_hw_core_deinit +osi_get_core +osi_handle_ioctl +osi_macsec_en +osi_macsec_deinit +osi_macsec_isr +osi_macsec_init +osi_macsec_cipher_config +osi_macsec_config +osi_init_macsec_ops +osi_macsec_loopback +osi_macsec_read_mmc +osi_macsec_dbg_events_config +osi_macsec_config_dbg_buf +osi_macsec_config_lut +osi_macsec_get_sc_lut_key_index +# Enable below if MACSEC_KEY_PROGRAM is enabled +#osi_macsec_kt_config diff --git a/osi/core/macsec.c b/osi/core/macsec.c index c3dbf21..d92f8f4 100644 --- a/osi/core/macsec.c +++ b/osi/core/macsec.c @@ -36,12 +36,13 @@ #include #define LOG(...) \ { \ - pr_err(##__VA_ARGS__); \ + pr_err(__VA_ARGS__); \ } #else #define LOG(...) #endif +#ifdef DEBUG_MACSEC /** * @brief poll_for_dbg_buf_update - Query the status of a debug buffer update. * @@ -649,6 +650,7 @@ static nve32_t macsec_dbg_events_config( err: return ret; } +#endif /* DEBUG_MACSEC */ /** * @brief update_macsec_mmc_val - Reads specific macsec mmc counters @@ -3703,7 +3705,7 @@ static inline void handle_common_irq(struct osi_core_priv_data *const osi_core) } /** - * @brief macsec_handle_ns_irq - Non-secure interrupt handler + * @brief macsec_handle_irq - Macsec interrupt handler * * @note * Algorithm: @@ -3725,7 +3727,7 @@ static inline void handle_common_irq(struct osi_core_priv_data *const osi_core) * - Run time: Yes * - De-initialization: No */ -static void macsec_handle_ns_irq(struct osi_core_priv_data *const osi_core) +static void macsec_handle_irq(struct osi_core_priv_data *const osi_core) { nveu32_t irq_common_sr, common_isr; nveu8_t *addr = (nveu8_t *)osi_core->macsec_base; @@ -3751,38 +3753,6 @@ static void macsec_handle_ns_irq(struct osi_core_priv_data *const osi_core) } } -/** - * @brief macsec_handle_s_irq - secure interrupt handler - * - * @note - * Algorithm: - * - Handles common interrupts - * - Refer to MACSEC column of <<******, (sequence diagram)>> for API details. - * - TraceID: *********** - * - * @param[in] osi_core: OSI core private data structure. used param macsec_base - * - * @pre MACSEC needs to be out of reset and proper clock configured. - * - * @note - * API Group: - * - Initialization: No - * - Run time: Yes - * - De-initialization: No - */ -static void macsec_handle_s_irq(struct osi_core_priv_data *const osi_core) -{ - nveu32_t common_isr; - nveu8_t *addr = (nveu8_t *)osi_core->macsec_base; - - LOG("%s()\n", __func__); - - common_isr = osi_readla(osi_core, addr + MACSEC_COMMON_ISR); - if (common_isr != OSI_NONE) { - handle_common_irq(osi_core); - } -} - /** * @brief macsec_cipher_config - Configures the cipher type * @@ -3833,6 +3803,7 @@ exit: return ret; } +#ifdef DEBUG_MACSEC /** * @brief macsec_loopback_config - Configures the loopback mode * @@ -3879,6 +3850,7 @@ static nve32_t macsec_loopback_config( exit: return ret; } +#endif /* DEBUG_MACSEC */ /** * @brief clear_byp_lut - Clears the bypass lut @@ -4393,6 +4365,81 @@ exit: return ret; } +#ifdef DEBUG_MACSEC +static void macsec_intr_config(struct osi_core_priv_data *const osi_core, nveu32_t enable) +{ + nveu32_t val = 0; + nveu8_t *addr = (nveu8_t *)osi_core->macsec_base; + + if (enable == OSI_ENABLE) { + val = osi_readla(osi_core, addr + MACSEC_TX_IMR); + LOG("Read MACSEC_TX_IMR: 0x%x\n", val); + val |= (MACSEC_TX_DBG_BUF_CAPTURE_DONE_INT_EN | + MACSEC_TX_MTU_CHECK_FAIL_INT_EN | + MACSEC_TX_SC_AN_NOT_VALID_INT_EN | + MACSEC_TX_AES_GCM_BUF_OVF_INT_EN | + MACSEC_TX_PN_EXHAUSTED_INT_EN | + MACSEC_TX_PN_THRSHLD_RCHD_INT_EN); + osi_writela(osi_core, val, addr + MACSEC_TX_IMR); + LOG("Write MACSEC_TX_IMR: 0x%x\n", val); + + val = osi_readla(osi_core, addr + MACSEC_RX_IMR); + LOG("Read MACSEC_RX_IMR: 0x%x\n", val); + + val |= (MACSEC_RX_DBG_BUF_CAPTURE_DONE_INT_EN | + RX_REPLAY_ERROR_INT_EN | + MACSEC_RX_MTU_CHECK_FAIL_INT_EN | + MACSEC_RX_AES_GCM_BUF_OVF_INT_EN | + MACSEC_RX_PN_EXHAUSTED_INT_EN + ); + osi_writela(osi_core, val, addr + MACSEC_RX_IMR); + LOG("Write MACSEC_RX_IMR: 0x%x\n", val); + + val = osi_readla(osi_core, addr + MACSEC_COMMON_IMR); + LOG("Read MACSEC_COMMON_IMR: 0x%x\n", val); + val |= (MACSEC_RX_UNINIT_KEY_SLOT_INT_EN | + MACSEC_RX_LKUP_MISS_INT_EN | + MACSEC_TX_UNINIT_KEY_SLOT_INT_EN | + MACSEC_TX_LKUP_MISS_INT_EN | + MACSEC_SECURE_REG_VIOL_INT_EN); + osi_writela(osi_core, val, addr + MACSEC_COMMON_IMR); + LOG("Write MACSEC_COMMON_IMR: 0x%x\n", val); + } else { + val = osi_readla(osi_core, addr + MACSEC_TX_IMR); + LOG("Read MACSEC_TX_IMR: 0x%x\n", val); + val &= (~MACSEC_TX_DBG_BUF_CAPTURE_DONE_INT_EN & + ~MACSEC_TX_MTU_CHECK_FAIL_INT_EN & + ~MACSEC_TX_SC_AN_NOT_VALID_INT_EN & + ~MACSEC_TX_AES_GCM_BUF_OVF_INT_EN & + ~MACSEC_TX_PN_EXHAUSTED_INT_EN & + ~MACSEC_TX_PN_THRSHLD_RCHD_INT_EN); + osi_writela(osi_core, val, addr + MACSEC_TX_IMR); + LOG("Write MACSEC_TX_IMR: 0x%x\n", val); + + val = osi_readla(osi_core, addr + MACSEC_RX_IMR); + LOG("Read MACSEC_RX_IMR: 0x%x\n", val); + val &= (~MACSEC_RX_DBG_BUF_CAPTURE_DONE_INT_EN & + ~RX_REPLAY_ERROR_INT_EN & + ~MACSEC_RX_MTU_CHECK_FAIL_INT_EN & + ~MACSEC_RX_AES_GCM_BUF_OVF_INT_EN & + ~MACSEC_RX_PN_EXHAUSTED_INT_EN + ); + osi_writela(osi_core, val, addr + MACSEC_RX_IMR); + LOG("Write MACSEC_RX_IMR: 0x%x\n", val); + + val = osi_readla(osi_core, addr + MACSEC_COMMON_IMR); + LOG("Read MACSEC_COMMON_IMR: 0x%x\n", val); + val &= (~MACSEC_RX_UNINIT_KEY_SLOT_INT_EN & + ~MACSEC_RX_LKUP_MISS_INT_EN & + ~MACSEC_TX_UNINIT_KEY_SLOT_INT_EN & + ~MACSEC_TX_LKUP_MISS_INT_EN & + ~MACSEC_SECURE_REG_VIOL_INT_EN); + osi_writela(osi_core, val, addr + MACSEC_COMMON_IMR); + LOG("Write MACSEC_COMMON_IMR: 0x%x\n", val); + } +} +#endif /* DEBUG_MACSEC */ + /** * @brief macsec_init - Inititlizes macsec * @@ -4505,7 +4552,7 @@ static nve32_t macsec_init(struct osi_core_priv_data *const osi_core, /* set ICV error threshold to 1 */ osi_writela(osi_core, 1U, addr + MACSEC_RX_ICV_ERR_CNTRL); - + /* Enabling interrupts only related to HSI */ val = osi_readla(osi_core, addr + MACSEC_RX_IMR); LOG("Read MACSEC_RX_IMR: 0x%x\n", val); val |= (MACSEC_RX_ICV_ERROR_INT_EN | @@ -5386,69 +5433,6 @@ exit: return ret; } -#ifdef OSI_DEBUG -static void macsec_debug_intr_config(struct osi_core_priv_data *const osi_core, nveu32_t enable) -{ - nveu32_t val = 0; - nveu8_t *addr = (nveu8_t *)osi_core->macsec_base; - - if (enable == OSI_ENABLE) { - val = osi_readla(osi_core, addr + MACSEC_TX_IMR); - val |= (MACSEC_TX_DBG_BUF_CAPTURE_DONE_INT_EN | - MACSEC_TX_MTU_CHECK_FAIL_INT_EN | - MACSEC_TX_SC_AN_NOT_VALID_INT_EN | - MACSEC_TX_AES_GCM_BUF_OVF_INT_EN | - MACSEC_TX_PN_EXHAUSTED_INT_EN | - MACSEC_TX_PN_THRSHLD_RCHD_INT_EN); - osi_writela(osi_core, val, addr + MACSEC_TX_IMR); - - val = osi_readla(osi_core, addr + MACSEC_RX_IMR); - - val |= (MACSEC_RX_DBG_BUF_CAPTURE_DONE_INT_EN | - RX_REPLAY_ERROR_INT_EN | - MACSEC_RX_MTU_CHECK_FAIL_INT_EN | - MACSEC_RX_AES_GCM_BUF_OVF_INT_EN | - MACSEC_RX_PN_EXHAUSTED_INT_EN - ); - osi_writela(osi_core, val, addr + MACSEC_RX_IMR); - - val = osi_readla(osi_core, addr + MACSEC_COMMON_IMR); - val |= (MACSEC_RX_UNINIT_KEY_SLOT_INT_EN | - MACSEC_RX_LKUP_MISS_INT_EN | - MACSEC_TX_UNINIT_KEY_SLOT_INT_EN | - MACSEC_TX_LKUP_MISS_INT_EN | - MACSEC_SECURE_REG_VIOL_INT_EN); - osi_writela(osi_core, val, addr + MACSEC_COMMON_IMR); - } else { - val = osi_readla(osi_core, addr + MACSEC_TX_IMR); - val &= (~MACSEC_TX_DBG_BUF_CAPTURE_DONE_INT_EN & - ~MACSEC_TX_MTU_CHECK_FAIL_INT_EN & - ~MACSEC_TX_SC_AN_NOT_VALID_INT_EN & - ~MACSEC_TX_AES_GCM_BUF_OVF_INT_EN & - ~MACSEC_TX_PN_EXHAUSTED_INT_EN & - ~MACSEC_TX_PN_THRSHLD_RCHD_INT_EN); - osi_writela(osi_core, val, addr + MACSEC_TX_IMR); - - val = osi_readla(osi_core, addr + MACSEC_RX_IMR); - val &= (~MACSEC_RX_DBG_BUF_CAPTURE_DONE_INT_EN & - ~RX_REPLAY_ERROR_INT_EN & - ~MACSEC_RX_MTU_CHECK_FAIL_INT_EN & - ~MACSEC_RX_AES_GCM_BUF_OVF_INT_EN & - ~MACSEC_RX_PN_EXHAUSTED_INT_EN - ); - osi_writela(osi_core, val, addr + MACSEC_RX_IMR); - - val = osi_readla(osi_core, addr + MACSEC_COMMON_IMR); - val &= (~MACSEC_RX_UNINIT_KEY_SLOT_INT_EN & - ~MACSEC_RX_LKUP_MISS_INT_EN & - ~MACSEC_TX_UNINIT_KEY_SLOT_INT_EN & - ~MACSEC_TX_LKUP_MISS_INT_EN & - ~MACSEC_SECURE_REG_VIOL_INT_EN); - osi_writela(osi_core, val, addr + MACSEC_COMMON_IMR); - } -} -#endif - /** * @brief osi_init_macsec_ops - macsec initialize operations * @@ -5481,23 +5465,22 @@ nve32_t osi_init_macsec_ops(struct osi_core_priv_data *const osi_core) static struct osi_macsec_core_ops macsec_ops = { .init = macsec_init, .deinit = macsec_deinit, - .handle_ns_irq = macsec_handle_ns_irq, - .handle_s_irq = macsec_handle_s_irq, + .handle_irq = macsec_handle_irq, .lut_config = macsec_lut_config, #ifdef MACSEC_KEY_PROGRAM .kt_config = macsec_kt_config, #endif /* MACSEC_KEY_PROGRAM */ .cipher_config = macsec_cipher_config, - .loopback_config = macsec_loopback_config, .macsec_en = macsec_enable, .config = config_macsec, .read_mmc = macsec_read_mmc, - .dbg_buf_config = macsec_dbg_buf_config, - .dbg_events_config = macsec_dbg_events_config, .get_sc_lut_key_index = macsec_get_key_index, .update_mtu = macsec_update_mtu, -#ifdef OSI_DEBUG - .debug_intr_config = macsec_debug_intr_config, +#ifdef DEBUG_MACSEC + .loopback_config = macsec_loopback_config, + .dbg_buf_config = macsec_dbg_buf_config, + .dbg_events_config = macsec_dbg_events_config, + .intr_config = macsec_intr_config, #endif }; @@ -5588,12 +5571,12 @@ nve32_t osi_macsec_deinit(struct osi_core_priv_data *const osi_core) } /** - * @brief osi_macsec_ns_isr - macsec non-secure irq handler + * @brief osi_macsec_isr - macsec irq handler * * @note * Algorithm: * - Return -1 if osi core or ops is null - * - handles non-secure macsec interrupts + * - handles macsec interrupts * - Refer to MACSEC column of <<******, (sequence diagram)>> for API details. * - TraceID: *********** * @@ -5607,39 +5590,11 @@ nve32_t osi_macsec_deinit(struct osi_core_priv_data *const osi_core) * - Run time: Yes * - De-initialization: No */ -void osi_macsec_ns_isr(struct osi_core_priv_data *const osi_core) +void osi_macsec_isr(struct osi_core_priv_data *const osi_core) { if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) && - (osi_core->macsec_ops->handle_ns_irq != OSI_NULL)) { - osi_core->macsec_ops->handle_ns_irq(osi_core); - } -} - -/** - * @brief osi_macsec_s_isr - macsec secure irq handler - * - * @note - * Algorithm: - * - Return -1 if osi core or ops is null - * - handles secure macsec interrupts - * - Refer to MACSEC column of <<******, (sequence diagram)>> for API details. - * - TraceID: *********** - * - * @param[in] osi_core: OSI core private data structure - * - * @pre MACSEC needs to be out of reset and proper clock configured. - * - * @note - * API Group: - * - Initialization: No - * - Run time: Yes - * - De-initialization: No - */ -void osi_macsec_s_isr(struct osi_core_priv_data *const osi_core) -{ - if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) && - (osi_core->macsec_ops->handle_s_irq != OSI_NULL)) { - osi_core->macsec_ops->handle_s_irq(osi_core); + (osi_core->macsec_ops->handle_irq != OSI_NULL)) { + osi_core->macsec_ops->handle_irq(osi_core); } } @@ -5835,6 +5790,7 @@ nve32_t osi_macsec_cipher_config(struct osi_core_priv_data *const osi_core, return ret; } +#ifdef DEBUG_MACSEC /** * @brief osi_macsec_loopback - API to enable/disable macsec loopback * @@ -5871,6 +5827,7 @@ nve32_t osi_macsec_loopback(struct osi_core_priv_data *const osi_core, return ret; } +#endif /* DEBUG_MACSEC */ /** * @brief osi_macsec_en - API to enable/disable macsec @@ -5999,6 +5956,7 @@ nve32_t osi_macsec_read_mmc(struct osi_core_priv_data *const osi_core) return ret; } +#ifdef DEBUG_MACSEC /** * @brief osi_macsec_config_dbg_buf - Reads the debug buffer captured * @@ -6077,4 +6035,5 @@ nve32_t osi_macsec_dbg_events_config( return ret; } +#endif /* DEBUG_MACSEC */ #endif /* MACSEC_SUPPORT */ diff --git a/osi/core/macsec.h b/osi/core/macsec.h index 6a2c132..d958c91 100644 --- a/osi/core/macsec.h +++ b/osi/core/macsec.h @@ -91,23 +91,25 @@ #define MACSEC_TX_SCI_LUT_VALID 0xD028 #define MACSEC_RX_BYP_LUT_VALID 0xD02C #define MACSEC_RX_SCI_LUT_VALID 0xD030 -#ifdef OSI_DEBUG +#ifdef DEBUG_MACSEC #define MACSEC_COMMON_IMR 0xD054 -#endif /* OSI_DEBUG */ +#endif /* DEBUG_MACSEC */ #define MACSEC_COMMON_ISR 0xD058 #define MACSEC_TX_SC_KEY_INVALID_STS0_0 0xD064 #define MACSEC_TX_SC_KEY_INVALID_STS1_0 0xD068 #define MACSEC_RX_SC_KEY_INVALID_STS0_0 0xD080 #define MACSEC_RX_SC_KEY_INVALID_STS1_0 0xD084 -#define MACSEC_TX_DEBUG_CONTROL_0 0xD098 -#define MACSEC_TX_DEBUG_TRIGGER_EN_0 0xD09C #define MACSEC_TX_DEBUG_STATUS_0 0xD0C4 +#define MACSEC_TX_DEBUG_TRIGGER_EN_0 0xD09C +#define MACSEC_RX_DEBUG_STATUS_0 0xD0F8 +#define MACSEC_RX_DEBUG_TRIGGER_EN_0 0xD0E0 +#ifdef DEBUG_MACSEC +#define MACSEC_TX_DEBUG_CONTROL_0 0xD098 #define MACSEC_DEBUG_BUF_CONFIG_0 0xD0C8 #define MACSEC_DEBUG_BUF_DATA_0(x) ((0xD0CCU) + ((x) * 4U)) #define MACSEC_RX_DEBUG_CONTROL_0 0xD0DC -#define MACSEC_RX_DEBUG_TRIGGER_EN_0 0xD0E0 -#define MACSEC_RX_DEBUG_STATUS_0 0xD0F8 +#endif /* DEBUG_MACSEC */ #define MACSEC_CONTROL1 0xE000 #define MACSEC_GCM_AES_CONTROL_0 0xE004 @@ -193,7 +195,9 @@ * @brief Bit definitions of MACSEC_CONTROL1 register * @{ */ +#ifdef DEBUG_MACSEC #define MACSEC_LOOPBACK_MODE_EN OSI_BIT(31) +#endif /* DEBUG_MACSEC */ #define MACSEC_RX_MTU_CHECK_EN OSI_BIT(16) #define MACSEC_TX_LUT_PRIO_BYP OSI_BIT(2) #define MACSEC_TX_MTU_CHECK_EN OSI_BIT(0) @@ -213,7 +217,7 @@ #define MACSEC_TX_AES_MODE_AES256 OSI_BIT(1) /** @} */ -#ifdef OSI_DEBUG +#ifdef DEBUG_MACSEC /** * @addtogroup MACSEC_COMMON_IMR register * @@ -226,7 +230,7 @@ #define MACSEC_TX_UNINIT_KEY_SLOT_INT_EN OSI_BIT(1) #define MACSEC_TX_LKUP_MISS_INT_EN OSI_BIT(0) /** @} */ -#endif /* OSI_DEBUG */ +#endif /* DEBUG_MACSEC */ /** * @addtogroup MACSEC_TX_IMR register @@ -235,7 +239,7 @@ * @{ */ #define MACSEC_TX_MAC_CRC_ERROR_INT_EN OSI_BIT(16) -#ifdef OSI_DEBUG +#ifdef DEBUG_MACSEC #define MACSEC_TX_DBG_BUF_CAPTURE_DONE_INT_EN OSI_BIT(22) #define MACSEC_TX_MTU_CHECK_FAIL_INT_EN OSI_BIT(19) #define MACSEC_TX_AES_GCM_BUF_OVF_INT_EN OSI_BIT(18) @@ -255,7 +259,7 @@ #define MACSEC_RX_MTU_CHECK_FAIL_INT_EN OSI_BIT(19) #define MACSEC_RX_AES_GCM_BUF_OVF_INT_EN OSI_BIT(18) #define MACSEC_RX_PN_EXHAUSTED_INT_EN OSI_BIT(1) -#endif /* OSI_DEBUG */ +#endif /* DEBUG_MACSEC */ #define MACSEC_RX_ICV_ERROR_INT_EN OSI_BIT(21) #define MACSEC_RX_MAC_CRC_ERROR_INT_EN OSI_BIT(16) /** @} */ @@ -273,6 +277,16 @@ #define MACSEC_TX_LKUP_MISS OSI_BIT(0) /** @} */ +/** + * @addtogroup MACSEC_STATS_CONTROL_0 register + * + * @brief Bit definitions of MACSEC_STATS_CONTROL_0 register + * @{ + */ +#define MACSEC_STATS_CONTROL0_CNT_RL_OVR_CPY OSI_BIT(1) +/** @} */ + + /** * @addtogroup MACSEC_TX_ISR register * @@ -303,15 +317,7 @@ #define MACSEC_RX_PN_EXHAUSTED OSI_BIT(1) /** @} */ -/** - * @addtogroup MACSEC_STATS_CONTROL_0 register - * - * @brief Bit definitions of MACSEC_STATS_CONTROL_0 register - * @{ - */ -#define MACSEC_STATS_CONTROL0_CNT_RL_OVR_CPY OSI_BIT(1) -/** @} */ - +#ifdef DEBUG_MACSEC /** * @addtogroup MACSEC_DEBUG_BUF_CONFIG_0 register * @@ -370,6 +376,7 @@ */ #define MACSEC_RX_DEBUG_CONTROL_0_START_CAP OSI_BIT(31) /** @} */ +#endif /* DEBUG_MACSEC */ #define MTU_LENGTH_MASK 0xFFFFU #define SOT_LENGTH_MASK 0xFFU diff --git a/osi/core/osi_hal.c b/osi/core/osi_hal.c index 44f3f65..d1a4ecd 100644 --- a/osi/core/osi_hal.c +++ b/osi/core/osi_hal.c @@ -2271,6 +2271,11 @@ nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core, case OSI_CMD_MAC_MTU: ret = 0; +#ifdef MACSEC_SUPPORT + if (osi_core->macsec_ops->update_mtu != OSI_NULL) { + ret = osi_core->macsec_ops->update_mtu(osi_core, data->arg1_u32); + } +#endif /* MACSEC_SUPPORT */ break; #ifdef OSI_DEBUG @@ -2301,8 +2306,8 @@ nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core, #ifdef OSI_DEBUG case OSI_CMD_DEBUG_INTR_CONFIG: -#ifdef MACSEC_SUPPORT - osi_core->macsec_ops->debug_intr_config(osi_core, data->arg1_u32); +#ifdef DEBUG_MACSEC + osi_core->macsec_ops->intr_config(osi_core, data->arg1_u32); #endif ret = 0; break;