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osi: hsi: Add return code for HSI Error injection

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Issue:
HSI error injection IOCTL does
not return failure on invalid
error codes.

Fix:
Handle invalid HSI error codes
for HSI error injection IOCTL.

Bug 3806923

Change-Id: I317b15e9a3ac98ab3d8d5c3ab37dd6782760bec3
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2823800
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mohan Thadikamalla
2022-12-08 10:56:59 +05:30
committed by Bhadram Varka
parent 4477838ca3
commit b38ca1d2f6
6 changed files with 27 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
osi/core/core_common.c
View File

@@ -1438,10 +1438,15 @@ void hw_tsn_init(struct osi_core_priv_data *osi_core,
* @param[in] error_code: Ethernet HSI error code * @param[in] error_code: Ethernet HSI error code
* *
* @note MAC should be init and started. see osi_start_mac() * @note MAC should be init and started. see osi_start_mac()
*
* @retval 0 on success
* @retval -1 on failure.
*/ */
void hsi_common_error_inject(struct osi_core_priv_data *osi_core, nve32_t hsi_common_error_inject(struct osi_core_priv_data *osi_core,
nveu32_t error_code) nveu32_t error_code)
{ {
nve32_t ret = 0;
switch (error_code) { switch (error_code) {
case OSI_INBOUND_BUS_CRC_ERR: case OSI_INBOUND_BUS_CRC_ERR:
osi_core->hsi.inject_crc_err_count = osi_core->hsi.inject_crc_err_count =
@@ -1491,8 +1496,11 @@ void hsi_common_error_inject(struct osi_core_priv_data *osi_core,
default: default:
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
"Invalid error code\n", (nveu32_t)error_code); "Invalid error code\n", (nveu32_t)error_code);
ret = -1;
break; break;
} }
return ret;
} }
#endif #endif

4
osi/core/core_common.h
View File

@@ -173,7 +173,7 @@ void prepare_l3l4_registers(const struct osi_core_priv_data *const osi_core,
nveu32_t *l3_addr1_reg, nveu32_t *l3_addr1_reg,
nveu32_t *ctr_reg); nveu32_t *ctr_reg);
#ifdef HSI_SUPPORT #ifdef HSI_SUPPORT
void hsi_common_error_inject(struct osi_core_priv_data *osi_core, nve32_t hsi_common_error_inject(struct osi_core_priv_data *osi_core,
nveu32_t error_code); nveu32_t error_code);
#endif #endif
#endif /* INCLUDED_CORE_COMMON_H */ #endif /* INCLUDED_CORE_COMMON_H */

4
osi/core/core_local.h
View File

@@ -228,8 +228,8 @@ struct core_ops {
nve32_t (*core_hsi_configure)(struct osi_core_priv_data *const osi_core, nve32_t (*core_hsi_configure)(struct osi_core_priv_data *const osi_core,
const nveu32_t enable); const nveu32_t enable);
/** Interface function called to inject error */ /** Interface function called to inject error */
void (*core_hsi_inject_err)(struct osi_core_priv_data *const osi_core, nve32_t (*core_hsi_inject_err)(struct osi_core_priv_data *const osi_core,
const nveu32_t error_code); const nveu32_t error_code);
#endif #endif
}; };

7
osi/core/eqos_core.c
View File

@@ -957,10 +957,11 @@ static nve32_t eqos_hsi_configure(struct osi_core_priv_data *const osi_core,
* @retval -1 on failure * @retval -1 on failure
*/ */
static void eqos_hsi_inject_err(struct osi_core_priv_data *const osi_core, static nve32_t eqos_hsi_inject_err(struct osi_core_priv_data *const osi_core,
const nveu32_t error_code) const nveu32_t error_code)
{ {
nveu32_t value; nveu32_t value;
nve32_t ret = 0;
switch (error_code) { switch (error_code) {
case OSI_HSI_EQOS0_CE_CODE: case OSI_HSI_EQOS0_CE_CODE:
@@ -978,9 +979,11 @@ static void eqos_hsi_inject_err(struct osi_core_priv_data *const osi_core,
EQOS_MTL_DBG_CTL); EQOS_MTL_DBG_CTL);
break; break;
default: default:
hsi_common_error_inject(osi_core, error_code); ret = hsi_common_error_inject(osi_core, error_code);
break; break;
} }
return ret;
} }
#endif #endif

9
osi/core/mgbe_core.c
View File

@@ -1687,8 +1687,10 @@ fail:
* @param[in] osi_core: OSI core private data structure. * @param[in] osi_core: OSI core private data structure.
* @param[in] error_code: HSI Error code * @param[in] error_code: HSI Error code
* *
* @retval 0 on success
* @retval -1 on failure
*/ */
static void mgbe_hsi_inject_err(struct osi_core_priv_data *const osi_core, static nve32_t mgbe_hsi_inject_err(struct osi_core_priv_data *const osi_core,
const nveu32_t error_code) const nveu32_t error_code)
{ {
const nveu32_t val_ce = (MGBE_MTL_DEBUG_CONTROL_FDBGEN | const nveu32_t val_ce = (MGBE_MTL_DEBUG_CONTROL_FDBGEN |
@@ -1701,6 +1703,7 @@ static void mgbe_hsi_inject_err(struct osi_core_priv_data *const osi_core,
MGBE_MTL_DEBUG_CONTROL_DBGMOD | MGBE_MTL_DEBUG_CONTROL_DBGMOD |
MGBE_MTL_DEBUG_CONTROL_FIFORDEN | MGBE_MTL_DEBUG_CONTROL_FIFORDEN |
MGBE_MTL_DEBUG_CONTROL_EIEE); MGBE_MTL_DEBUG_CONTROL_EIEE);
nve32_t ret = 0;
switch (error_code) { switch (error_code) {
case OSI_HSI_MGBE0_CE_CODE: case OSI_HSI_MGBE0_CE_CODE:
@@ -1718,9 +1721,11 @@ static void mgbe_hsi_inject_err(struct osi_core_priv_data *const osi_core,
MGBE_MTL_DEBUG_CONTROL); MGBE_MTL_DEBUG_CONTROL);
break; break;
default: default:
hsi_common_error_inject(osi_core, error_code); ret = hsi_common_error_inject(osi_core, error_code);
break; break;
} }
return ret;
} }
#endif #endif

3
osi/core/osi_hal.c
View File

@@ -2768,8 +2768,7 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
ret = ops_p->core_hsi_configure(osi_core, data->arg1_u32); ret = ops_p->core_hsi_configure(osi_core, data->arg1_u32);
break; break;
case OSI_CMD_HSI_INJECT_ERR: case OSI_CMD_HSI_INJECT_ERR:
ops_p->core_hsi_inject_err(osi_core, data->arg1_u32); ret = ops_p->core_hsi_inject_err(osi_core, data->arg1_u32);
ret = 0;
break; break;
#endif #endif