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osi: macsec: fixes for misra defects
Below are the rules addressed Rule: MISRA_C-2012_Rule_15.5 Diff: -90 Rule: MISRA_C-2012_Rule_2.5 Diff: -34 Rule: MISRA_C-2012_Rule_8.13 Diff: -5 Rule: MISRA_C-2012_Rule_8.6 Diff: -1 Rule: CERT_INT31-C Diff: -2 Bug 3691236 Change-Id: I0b943b7626ea47e34eee585e42f0c9b98d67a7f4 Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2732627 Reviewed-by: Narayan Reddy <narayanr@nvidia.com> Reviewed-by: Mahesh Patil <maheshp@nvidia.com> Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com> GVS: Gerrit_Virtual_Submit
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@@ -41,7 +41,9 @@
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#define OSI_AN2_VALID OSI_BIT(2)
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#define OSI_AN3_VALID OSI_BIT(3)
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#define OSI_MAX_NUM_SA 4U
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#ifdef DEBUG_MACSEC
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#define OSI_CURR_AN_MAX 3
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#endif /* DEBUG_MACSEC */
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#define OSI_KEY_INDEX_MAX 31U
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#define OSI_PN_MAX_DEFAULT 0xFFFFFFFFU
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#define OSI_PN_THRESHOLD_DEFAULT 0xC0000000U
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@@ -120,8 +122,6 @@
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* @brief Helper macros for debug buffer table CONFIG register programming
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* @{
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*/
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#define OSI_DBG_TBL_READ OSI_LUT_READ
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#define OSI_DBG_TBL_WRITE OSI_LUT_WRITE
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/* Num of Tx debug buffers */
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#define OSI_TX_DBG_BUF_IDX_MAX 12U
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/* Num of Rx debug buffers */
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@@ -159,20 +159,15 @@
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*/
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#define OSI_MACSEC_TX_EN OSI_BIT(0)
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#define OSI_MACSEC_RX_EN OSI_BIT(1)
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/* MACSEC SECTAG + ICV + 2B ethertype adds upto 34B */
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#define MACSEC_TAG_ICV_LEN 34U
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/* MACSEC TZ key config cmd */
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#define OSI_MACSEC_CMD_TZ_CONFIG 0x1
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/* MACSEC TZ key table entries reset cmd */
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#define OSI_MACSEC_CMD_TZ_KT_RESET 0x2
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/** @} */
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/**
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* @brief Indicates different operations on MACSEC SA
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*/
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#ifdef MACSEC_KEY_PROGRAM
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#define OSI_CREATE_SA 1U
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#endif /* MACSEC_KEY_PROGRAM */
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#define OSI_ENABLE_SA 2U
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#define OSI_DISABLE_SA 3U
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/**
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* @brief MACSEC SA State LUT entry outputs structure
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@@ -238,6 +233,7 @@ struct osi_macsec_table_config {
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nveu16_t index;
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};
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#if defined(MACSEC_KEY_PROGRAM) || defined(LINUX_OS)
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/**
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* @brief MACSEC Key Table entry structure
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*/
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@@ -247,6 +243,7 @@ struct osi_kt_entry {
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/** Indicates Hash-key */
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nveu8_t h[OSI_KEY_LEN_128];
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};
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#endif /* MACSEC_KEY_PROGRAM */
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/**
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* @brief MACSEC BYP/SCI LUT entry inputs structure
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@@ -296,6 +293,7 @@ struct osi_macsec_lut_config {
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struct osi_sa_state_outputs sa_state_out;
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};
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#if defined(MACSEC_KEY_PROGRAM) || defined(LINUX_OS)
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/**
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* @brief MACSEC Key Table config data structure
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*/
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@@ -307,6 +305,7 @@ struct osi_macsec_kt_config {
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/** Indicates key table entry valid or not, bit 31 */
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nveu32_t flags;
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};
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#endif /* MACSEC_KEY_PROGRAM */
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/**
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* @brief MACSEC Debug buffer config data structure
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@@ -537,6 +536,7 @@ void osi_macsec_s_isr(struct osi_core_priv_data *const osi_core);
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nve32_t osi_macsec_config_lut(struct osi_core_priv_data *const osi_core,
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struct osi_macsec_lut_config *const lut_config);
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#ifdef MACSEC_KEY_PROGRAM
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/**
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* @brief osi_macsec_config_kt - API to read or update the keys
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*
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@@ -563,6 +563,7 @@ nve32_t osi_macsec_config_lut(struct osi_core_priv_data *const osi_core,
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*/
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nve32_t osi_macsec_config_kt(struct osi_core_priv_data *const osi_core,
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struct osi_macsec_kt_config *const kt_config);
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#endif /* MACSEC_KEY_PROGRAM */
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/**
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* @brief osi_macsec_cipher_config - API to update the cipher
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