diff --git a/include/osi_macsec.h b/include/osi_macsec.h
index aa03912..5ac81d7 100644
--- a/include/osi_macsec.h
+++ b/include/osi_macsec.h
@@ -41,7 +41,9 @@
 #define OSI_AN2_VALID			OSI_BIT(2)
 #define OSI_AN3_VALID			OSI_BIT(3)
 #define OSI_MAX_NUM_SA			4U
+#ifdef DEBUG_MACSEC
 #define OSI_CURR_AN_MAX 		3
+#endif /* DEBUG_MACSEC */
 #define OSI_KEY_INDEX_MAX		31U
 #define OSI_PN_MAX_DEFAULT		0xFFFFFFFFU
 #define OSI_PN_THRESHOLD_DEFAULT	0xC0000000U
@@ -120,8 +122,6 @@
  * @brief Helper macros for debug buffer table CONFIG register programming
  * @{
  */
-#define OSI_DBG_TBL_READ	OSI_LUT_READ
-#define OSI_DBG_TBL_WRITE	OSI_LUT_WRITE
 /* Num of Tx debug buffers */
 #define OSI_TX_DBG_BUF_IDX_MAX		12U
 /* Num of Rx debug buffers */
@@ -159,20 +159,15 @@
  */
 #define OSI_MACSEC_TX_EN	OSI_BIT(0)
 #define OSI_MACSEC_RX_EN	OSI_BIT(1)
-/* MACSEC SECTAG + ICV + 2B ethertype adds upto 34B */
-#define MACSEC_TAG_ICV_LEN		34U
-/* MACSEC TZ key config cmd */
-#define OSI_MACSEC_CMD_TZ_CONFIG	0x1
-/* MACSEC TZ key table entries reset cmd */
-#define OSI_MACSEC_CMD_TZ_KT_RESET	0x2
 /** @} */
 
 /**
  * @brief Indicates different operations on MACSEC SA
  */
+#ifdef MACSEC_KEY_PROGRAM
 #define OSI_CREATE_SA           1U
+#endif /* MACSEC_KEY_PROGRAM */
 #define OSI_ENABLE_SA           2U
-#define OSI_DISABLE_SA          3U
 
 /**
  * @brief MACSEC SA State LUT entry outputs structure
@@ -238,6 +233,7 @@ struct osi_macsec_table_config {
 	nveu16_t index;
 };
 
+#if defined(MACSEC_KEY_PROGRAM) || defined(LINUX_OS)
 /**
  * @brief MACSEC Key Table entry structure
  */
@@ -247,6 +243,7 @@ struct osi_kt_entry {
 	/** Indicates Hash-key */
 	nveu8_t h[OSI_KEY_LEN_128];
 };
+#endif /* MACSEC_KEY_PROGRAM */
 
 /**
  * @brief MACSEC BYP/SCI LUT entry inputs structure
@@ -296,6 +293,7 @@ struct osi_macsec_lut_config {
 	struct osi_sa_state_outputs sa_state_out;
 };
 
+#if defined(MACSEC_KEY_PROGRAM) || defined(LINUX_OS)
 /**
  * @brief MACSEC Key Table config data structure
  */
@@ -307,6 +305,7 @@ struct osi_macsec_kt_config {
 	/** Indicates key table entry valid or not, bit 31 */
 	nveu32_t flags;
 };
+#endif /* MACSEC_KEY_PROGRAM */
 
 /**
  * @brief MACSEC Debug buffer config data structure
@@ -537,6 +536,7 @@ void osi_macsec_s_isr(struct osi_core_priv_data *const osi_core);
 nve32_t osi_macsec_config_lut(struct osi_core_priv_data *const osi_core,
 			  struct osi_macsec_lut_config *const lut_config);
 
+#ifdef MACSEC_KEY_PROGRAM
 /**
  * @brief osi_macsec_config_kt - API to read or update the keys
  *
@@ -563,6 +563,7 @@ nve32_t osi_macsec_config_lut(struct osi_core_priv_data *const osi_core,
  */
 nve32_t osi_macsec_config_kt(struct osi_core_priv_data *const osi_core,
 			 struct osi_macsec_kt_config *const kt_config);
+#endif /* MACSEC_KEY_PROGRAM */
 
 /**
  * @brief osi_macsec_cipher_config - API to update the cipher
diff --git a/osi/core/eqos_core.c b/osi/core/eqos_core.c
index 399bc72..6cf75b4 100644
--- a/osi/core/eqos_core.c
+++ b/osi/core/eqos_core.c
@@ -6779,7 +6779,7 @@ static void eqos_config_for_macsec(struct osi_core_priv_data *const osi_core,
 	if ((enable != OSI_ENABLE) && (enable != OSI_DISABLE)) {
 		OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_INVALID,
 			     "Failed to config EQOS per MACSEC\n", 0ULL);
-		return;
+		goto exit;
 	}
 	if (osi_core->mac_ver == OSI_EQOS_MAC_5_30) {
 		/* stop MAC Tx */
@@ -6847,6 +6847,8 @@ static void eqos_config_for_macsec(struct osi_core_priv_data *const osi_core,
 			OSI_LOG_ARG_HW_FAIL, "Error: osi_core->hw_feature is NULL\n",
 			0ULL);
 	}
+exit:
+	return;
 }
 
 #endif /*  MACSEC_SUPPORT */
diff --git a/osi/core/ivc_core.c b/osi/core/ivc_core.c
index fe40e26..31bd1e9 100644
--- a/osi/core/ivc_core.c
+++ b/osi/core/ivc_core.c
@@ -216,13 +216,13 @@ static int ivc_macsec_dbg_events_config(
 
 	ret = osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg));
 	if (ret != 0) {
-		return ret;
+		goto exit;
 	}
 
 	msg.status = osi_memcpy((void *)dbg_buf_config,
 				(void *)&msg.data.dbg_buf_config,
 				sizeof(struct osi_macsec_dbg_buf_config));
-
+exit:
 	return ret;
 }
 
@@ -252,13 +252,13 @@ static int ivc_macsec_dbg_buf_config(
 
 	ret = osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg));
 	if (ret != 0) {
-		return ret;
+		goto exit;
 	}
 
 	msg.status = osi_memcpy((void *)dbg_buf_config,
 				(void *) &msg.data.dbg_buf_config,
 				sizeof(struct osi_macsec_dbg_buf_config));
-
+exit:
 	return ret;
 }
 
@@ -360,10 +360,11 @@ static int ivc_macsec_config(struct osi_core_priv_data *const osi_core,
 
 	ret = osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg));
 	if (ret != 0) {
-		return ret;
+		goto exit;
 	}
 
 	*kt_idx = msg.data.macsec_cfg.kt_idx;
+exit:
 	return ret;
 }
 
@@ -525,12 +526,13 @@ static nve32_t ivc_macsec_lut_config(struct osi_core_priv_data *const osi_core,
 
 	ret = osi_core->osd_ops.ivc_send(osi_core, &msg, sizeof(msg));
 	if (ret != 0) {
-		return ret;
+		goto exit;
 	}
 
 	msg.status = osi_memcpy((void *)lut_config,
 				(void *)&msg.data.lut_config,
 				sizeof(struct osi_macsec_lut_config));
+exit:
 	return ret;
 }
 
diff --git a/osi/core/macsec.c b/osi/core/macsec.c
index 22aefba..c3dbf21 100644
--- a/osi/core/macsec.c
+++ b/osi/core/macsec.c
@@ -70,6 +70,7 @@ static nve32_t poll_for_dbg_buf_update(struct osi_core_priv_data *const osi_core
 	nveu32_t retry = RETRY_COUNT;
 	nveu32_t dbg_buf_config;
 	nve32_t cond = COND_NOT_MET;
+	nve32_t ret = 0;
 	nveu32_t count;
 
 	count = 0;
@@ -77,7 +78,8 @@ static nve32_t poll_for_dbg_buf_update(struct osi_core_priv_data *const osi_core
 		if (count > retry) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				      "timeout!\n", 0ULL);
-			return -1;
+			ret = -1;
+			goto err;
 		}
 
 		dbg_buf_config = osi_readla(osi_core,
@@ -91,8 +93,8 @@ static nve32_t poll_for_dbg_buf_update(struct osi_core_priv_data *const osi_core
 		/* wait on UPDATE bit to reset */
 		osi_core->osd_ops.udelay(RETRY_DELAY);
 	}
-
-	return 0;
+err:
+	return ret;
 
 }
 
@@ -194,7 +196,8 @@ static void write_tx_dbg_trigger_evts(
 
 	nveu8_t *base = (nveu8_t *)osi_core->macsec_base;
 	nveu32_t flags = 0;
-	nveu32_t tx_trigger_evts, debug_ctrl_reg;
+	nveu32_t tx_trigger_evts;
+	nveu32_t debug_ctrl_reg;
 
 	flags = dbg_buf_config->flags;
 	tx_trigger_evts = osi_readla(osi_core,
@@ -280,7 +283,7 @@ static void tx_dbg_trigger_evts(
 	nveu32_t flags = 0;
 	nveu32_t tx_trigger_evts;
 
-	if (dbg_buf_config->rw == OSI_DBG_TBL_WRITE) {
+	if (dbg_buf_config->rw == OSI_LUT_WRITE) {
 		write_tx_dbg_trigger_evts(osi_core, dbg_buf_config);
 	} else {
 		tx_trigger_evts = osi_readla(osi_core,
@@ -336,7 +339,8 @@ static void write_rx_dbg_trigger_evts(
 
 	nveu8_t *base = (nveu8_t *)osi_core->macsec_base;
 	nveu32_t flags = 0;
-	nveu32_t rx_trigger_evts = 0, debug_ctrl_reg;
+	nveu32_t rx_trigger_evts = 0;
+	nveu32_t debug_ctrl_reg;
 
 	flags = dbg_buf_config->flags;
 	rx_trigger_evts = osi_readla(osi_core,
@@ -421,7 +425,7 @@ static void rx_dbg_trigger_evts(
 	nveu32_t flags = 0;
 	nveu32_t rx_trigger_evts = 0;
 
-	if (dbg_buf_config->rw == OSI_DBG_TBL_WRITE) {
+	if (dbg_buf_config->rw == OSI_LUT_WRITE) {
 		write_rx_dbg_trigger_evts(osi_core, dbg_buf_config);
 	} else {
 		rx_trigger_evts = osi_readla(osi_core,
@@ -477,12 +481,15 @@ static nve32_t validate_inputs_macsec_dbg_buf_conf(
 		const struct osi_core_priv_data *const osi_core,
 		const struct osi_macsec_dbg_buf_config *const dbg_buf_config)
 {
+	nve32_t ret = 0;
+
 	/* Validate inputs */
 	if ((dbg_buf_config->rw > OSI_RW_MAX) ||
 		(dbg_buf_config->ctlr_sel > OSI_CTLR_SEL_MAX)) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			      "Params validation failed\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto err;
 	}
 
 	if (((dbg_buf_config->ctlr_sel == OSI_CTLR_SEL_TX) &&
@@ -491,9 +498,11 @@ static nve32_t validate_inputs_macsec_dbg_buf_conf(
 		(dbg_buf_config->index > OSI_RX_DBG_BUF_IDX_MAX))) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			      "Wrong index \n", dbg_buf_config->index);
-		return -1;
+		ret = -1;
+		goto err;
 	}
-	return 0;
+err:
+	return ret;
 }
 
 /**
@@ -532,7 +541,8 @@ static nve32_t macsec_dbg_buf_config(struct osi_core_priv_data *const osi_core,
 	nve32_t ret = 0;
 
 	if (validate_inputs_macsec_dbg_buf_conf(osi_core, dbg_buf_config) < 0) {
-		return -1;
+		ret = -1;
+		goto err;
 	}
 
 	dbg_config_reg = osi_readla(osi_core, base + MACSEC_DEBUG_BUF_CONFIG_0);
@@ -557,13 +567,14 @@ static nve32_t macsec_dbg_buf_config(struct osi_core_priv_data *const osi_core,
 	osi_writela(osi_core, dbg_config_reg, base + MACSEC_DEBUG_BUF_CONFIG_0);
 	ret = poll_for_dbg_buf_update(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto err;
 	}
 
-	if (dbg_buf_config->rw == OSI_NONE) {
+	if (dbg_buf_config->rw == OSI_LUT_READ) {
 		read_dbg_buf_data(osi_core, dbg_buf_config->dbg_buf);
 	}
-	return 0;
+err:
+	return ret;
 }
 
 /**
@@ -597,17 +608,19 @@ static nve32_t macsec_dbg_events_config(
 {
 	nveu64_t events = 0;
 	nveu32_t i, flags = dbg_buf_config->flags;
+	nve32_t ret = 0;
 
 	/* Validate inputs */
 	if ((dbg_buf_config->rw > OSI_RW_MAX) ||
 		(dbg_buf_config->ctlr_sel > OSI_CTLR_SEL_MAX)) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Params validation failed!\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto err;
 	}
 
 	/* Only one event allowed to configure at a time */
-	if ((flags != OSI_NONE) && (dbg_buf_config->rw == OSI_DBG_TBL_WRITE)) {
+	if ((flags != OSI_NONE) && (dbg_buf_config->rw == OSI_LUT_WRITE)) {
 		for (i = 0; i < 32U; i++) {
 			if ((flags & ((nveu32_t)(1U) << i)) != OSI_NONE) {
 				CERT_C__POST_INC__U64(events);
@@ -616,7 +629,8 @@ static nve32_t macsec_dbg_events_config(
 		if (events > 1U) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Don't allow more than one debug events set\n", flags);
-			return -1;
+			ret = -1;
+			goto err;
 		}
 	}
 
@@ -632,8 +646,8 @@ static nve32_t macsec_dbg_events_config(
 			     "Unknown controller select\n", 0ULL);
 		break;
 	}
-
-	return 0;
+err:
+	return ret;
 }
 
 /**
@@ -662,7 +676,8 @@ static inline nveul64_t update_macsec_mmc_val(
 			struct osi_core_priv_data *osi_core,
 			nveu64_t offset)
 {
-	nveul64_t value_lo, value_hi;
+	nveul64_t value_lo;
+	nveul64_t value_hi;
 
 	value_lo = osi_readla(osi_core,
 			      (nveu8_t *)osi_core->macsec_base + offset);
@@ -943,13 +958,17 @@ static nve32_t kt_key_write(struct osi_core_priv_data *const osi_core,
 
 static nve32_t validate_kt_config(const struct osi_macsec_kt_config *const kt_config)
 {
+	nve32_t ret = 0;
+
 	/* Validate KT config */
 	if ((kt_config->table_config.ctlr_sel > OSI_CTLR_SEL_MAX) ||
 	    (kt_config->table_config.rw > OSI_RW_MAX) ||
 	    (kt_config->table_config.index > OSI_TABLE_INDEX_MAX)) {
-		return -1;
+		ret = -1;
+		goto err;
 	}
-	return 0;
+err:
+	return ret;
 
 }
 
@@ -962,7 +981,7 @@ static nve32_t macsec_kt_config(struct osi_core_priv_data *const osi_core,
 
 	ret = validate_kt_config(kt_config);
 	if (ret < 0) {
-		return ret;
+		goto err;
 	}
 
 	kt_config_reg = osi_readla(osi_core, base + MACSEC_GCM_KEYTABLE_CONFIG);
@@ -977,7 +996,7 @@ static nve32_t macsec_kt_config(struct osi_core_priv_data *const osi_core,
 		/* For write operation, load the lut_data registers */
 		ret = kt_key_write(osi_core, kt_config);
 		if (ret < 0) {
-			return ret;
+			goto err;
 		}
 	} else {
 		kt_config_reg &= ~MACSEC_KT_CONFIG_RW;
@@ -992,15 +1011,16 @@ static nve32_t macsec_kt_config(struct osi_core_priv_data *const osi_core,
 	/* Wait for this KT update to finish */
 	ret = poll_for_kt_update(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto err;
 	}
 
 	if (kt_config->table_config.rw == OSI_NONE) {
 		ret = kt_key_read(osi_core, kt_config);
 		if (ret < 0) {
-			return ret;
+			goto err;
 		}
 	}
+err:
 	return ret;
 }
 #endif /* MACSEC_KEY_PROGRAM */
@@ -1036,6 +1056,7 @@ static inline nve32_t poll_for_lut_update(struct osi_core_priv_data *osi_core)
 	nveu32_t lut_config;
 	nveu32_t count;
 	nve32_t cond = 1;
+	nve32_t ret = 0;
 
 	count = 0;
 	while (cond == 1) {
@@ -1044,7 +1065,8 @@ static inline nve32_t poll_for_lut_update(struct osi_core_priv_data *osi_core)
 				OSI_LOG_ARG_HW_FAIL,
 				"LUT update timed out\n",
 				0ULL);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 
 		count++;
@@ -1060,8 +1082,8 @@ static inline nve32_t poll_for_lut_update(struct osi_core_priv_data *osi_core)
 			osi_core->osd_ops.udelay(RETRY_DELAY);
 		}
 	}
-
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -1295,7 +1317,7 @@ static void lut_read_inputs_vlan(const nveu32_t *const lut_data,
  * @retval -1 for failure
  */
 static nve32_t lut_read_inputs(struct osi_macsec_lut_config *const lut_config,
-			   nveu32_t *const lut_data)
+			       const nveu32_t *const lut_data)
 {
 	struct osi_lut_inputs entry = {0};
 	nveu32_t flags = 0;
@@ -1387,7 +1409,8 @@ static nve32_t byp_lut_read(struct osi_core_priv_data *const osi_core,
 			struct osi_macsec_lut_config *const lut_config)
 {
 	nveu32_t lut_data[MACSEC_LUT_DATA_REG_CNT] = {0};
-	nveu32_t flags = 0, val = 0;
+	nveu32_t flags = 0;
+	nveu32_t val = 0;
 	nveu32_t index = lut_config->table_config.index;
 	nveu8_t *addr = (nveu8_t *)osi_core->macsec_base;
 	nveu8_t *paddr = OSI_NULL;
@@ -1398,7 +1421,8 @@ static nve32_t byp_lut_read(struct osi_core_priv_data *const osi_core,
 	if (lut_read_inputs(lut_config, lut_data) != 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "LUT inputs error\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto err;
 	}
 
 	/* Lookup output */
@@ -1437,6 +1461,7 @@ static nve32_t byp_lut_read(struct osi_core_priv_data *const osi_core,
 		}
 		lut_config->flags |= flags;
 	}
+err:
 	return ret;
 }
 
@@ -1540,7 +1565,8 @@ static nve32_t sci_lut_read(struct osi_core_priv_data *const osi_core,
 	nve32_t ret = 0;
 
 	if (index > OSI_SC_LUT_MAX_INDEX) {
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 	read_lut_data(osi_core, lut_data);
 
@@ -1549,7 +1575,8 @@ static nve32_t sci_lut_read(struct osi_core_priv_data *const osi_core,
 		if (lut_read_inputs(lut_config, lut_data) != 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "LUT inputs error\n", 0ULL);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 		tx_sci_lut_read(osi_core, lut_config, lut_data);
 		break;
@@ -1584,8 +1611,7 @@ static nve32_t sci_lut_read(struct osi_core_priv_data *const osi_core,
 		ret = -1;
 		break;
 	}
-
-	/* Lookup output */
+exit:
 	return ret;
 }
 
@@ -1654,7 +1680,6 @@ static nve32_t sc_param_lut_read(struct osi_core_priv_data *const osi_core,
 		break;
 	}
 
-	/* Lookup output */
 	return ret;
 }
 
@@ -1922,7 +1947,7 @@ static void tx_sa_state_lut_config(const struct osi_macsec_lut_config *const lut
  * @retval -1 on failure
  */
 static nve32_t sa_state_lut_config(struct osi_core_priv_data *const osi_core,
-			       struct osi_macsec_lut_config *const lut_config)
+				   const struct osi_macsec_lut_config *const lut_config)
 {
 	nveu32_t lut_data[MACSEC_LUT_DATA_REG_CNT] = {0};
 	struct osi_macsec_table_config table_config = lut_config->table_config;
@@ -2083,7 +2108,7 @@ static void tx_sc_param_lut_config(
  * @retval -1 on failure
  */
 static nve32_t sc_param_lut_config(struct osi_core_priv_data *const osi_core,
-			       struct osi_macsec_lut_config *const lut_config)
+				   const struct osi_macsec_lut_config *const lut_config)
 {
 	nveu32_t lut_data[MACSEC_LUT_DATA_REG_CNT] = {0};
 	struct osi_macsec_table_config table_config = lut_config->table_config;
@@ -2093,7 +2118,8 @@ static nve32_t sc_param_lut_config(struct osi_core_priv_data *const osi_core,
 	if (entry.key_index_start > OSI_KEY_INDEX_MAX) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Invalid Key Index\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	switch (table_config.ctlr_sel) {
@@ -2111,7 +2137,7 @@ static nve32_t sc_param_lut_config(struct osi_core_priv_data *const osi_core,
 	}
 
 	commit_lut_data(osi_core, lut_data);
-
+exit:
 	return ret;
 }
 
@@ -2491,18 +2517,20 @@ static void lut_config_preempt_mask(const struct osi_macsec_lut_config *const lu
  * @retval 0 on success
  * @retval -1 on failure
  */
-static nve32_t lut_config_inputs(struct osi_macsec_lut_config *const lut_config,
+static nve32_t lut_config_inputs(const struct osi_macsec_lut_config *const lut_config,
 			     nveu32_t *const lut_data)
 {
 	struct osi_lut_inputs entry = lut_config->lut_in;
 	nveu32_t flags = lut_config->flags;
 	nveu32_t i, j = OSI_LUT_FLAGS_BYTE0_PATTERN_VALID;
+	nve32_t ret = 0;
 
 	for (i = 0; i < OSI_LUT_BYTE_PATTERN_MAX; i++) {
 		if ((flags & j) == j) {
 			if (entry.byte_pattern_offset[i] >
 			    OSI_LUT_BYTE_PATTERN_MAX_OFFSET) {
-				return -1;
+				ret = -1;
+				goto exit;
 			}
 		}
 		j <<= 1;
@@ -2512,14 +2540,16 @@ static nve32_t lut_config_inputs(struct osi_macsec_lut_config *const lut_config,
 		    OSI_LUT_FLAGS_BYTE0_PATTERN_VALID) {
 		if (entry.byte_pattern_offset[0] >
 		    OSI_LUT_BYTE_PATTERN_MAX_OFFSET) {
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 	}
 
 	if ((flags & OSI_LUT_FLAGS_VLAN_VALID) == OSI_LUT_FLAGS_VLAN_VALID) {
 		if ((entry.vlan_pcp > OSI_VLAN_PCP_MAX) ||
 		    (entry.vlan_id > OSI_VLAN_ID_MAX)) {
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 	}
 
@@ -2529,8 +2559,8 @@ static nve32_t lut_config_inputs(struct osi_macsec_lut_config *const lut_config,
 	lut_config_vlan(lut_config, lut_data);
 	lut_config_byte_pattern(lut_config, lut_data);
 	lut_config_preempt_mask(lut_config, lut_data);
-
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -2563,9 +2593,11 @@ static nve32_t rx_sci_lut_config(
 {
 	nveu32_t flags = lut_config->flags;
 	struct osi_sci_lut_outputs entry = lut_config->sci_lut_out;
+	nve32_t ret = 0;
 
 	if (entry.sc_index > OSI_SC_INDEX_MAX) {
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	lut_data[0] |= ((nveu32_t)(entry.sci[0]) |
@@ -2591,12 +2623,12 @@ static nve32_t rx_sci_lut_config(
 	}
 
 	lut_data[2] |= entry.sc_index << 10;
-
-	return 0;
+exit:
+	return ret;
 }
 
 /**
- * @brief rx_sci_lut_config - update lut_data from lut_config for sci_lut
+ * @brief tx_sci_lut_config - update lut_data from lut_config for sci_lut
  *
  * @note
  * Algorithm:
@@ -2621,15 +2653,17 @@ static nve32_t rx_sci_lut_config(
  * @retval -1 on failure
  */
 static nve32_t tx_sci_lut_config(
-			struct osi_macsec_lut_config *const lut_config,
+			const struct osi_macsec_lut_config *const lut_config,
 			nveu32_t *const lut_data)
 {
 	nveu32_t flags = lut_config->flags;
 	struct osi_sci_lut_outputs entry = lut_config->sci_lut_out;
 	nveu32_t an_valid = entry.an_valid;
+	nve32_t ret = 0;
 
 	if (lut_config_inputs(lut_config, lut_data) != 0) {
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	/* Lookup result fields */
@@ -2656,7 +2690,8 @@ static nve32_t tx_sci_lut_config(
 		OSI_LUT_FLAGS_DVLAN_OUTER_INNER_TAG_SEL) {
 		lut_data[6] |= MACSEC_TX_SCI_LUT_DVLAN_OUTER_INNER_TAG_SEL;
 	}
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -2686,7 +2721,7 @@ static nve32_t tx_sci_lut_config(
  * @retval -1 on failure
  */
 static nve32_t sci_lut_config(struct osi_core_priv_data *const osi_core,
-			  struct osi_macsec_lut_config *const lut_config)
+			      const struct osi_macsec_lut_config *const lut_config)
 {
 	nveu32_t lut_data[MACSEC_LUT_DATA_REG_CNT] = {0};
 	struct osi_macsec_table_config table_config = lut_config->table_config;
@@ -2700,7 +2735,8 @@ static nve32_t sci_lut_config(struct osi_core_priv_data *const osi_core,
 		(lut_config->table_config.index > OSI_SC_LUT_MAX_INDEX)) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "SCI LUT config err - Invalid Index\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	switch (table_config.ctlr_sel) {
@@ -2708,7 +2744,8 @@ static nve32_t sci_lut_config(struct osi_core_priv_data *const osi_core,
 		if (tx_sci_lut_config(lut_config, lut_data) < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to config tx sci LUT\n", 0ULL);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 		commit_lut_data(osi_core, lut_data);
 
@@ -2732,7 +2769,8 @@ static nve32_t sci_lut_config(struct osi_core_priv_data *const osi_core,
 		if (rx_sci_lut_config(lut_config, lut_data) < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to config rx sci LUT\n", 0ULL);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 		commit_lut_data(osi_core, lut_data);
 
@@ -2758,6 +2796,7 @@ static nve32_t sci_lut_config(struct osi_core_priv_data *const osi_core,
 		ret = -1;
 		break;
 	}
+exit:
 	return ret;
 }
 
@@ -2787,7 +2826,7 @@ static nve32_t sci_lut_config(struct osi_core_priv_data *const osi_core,
  * @retval -1 on failure
  */
 static nve32_t byp_lut_config(struct osi_core_priv_data *const osi_core,
-			  struct osi_macsec_lut_config *const lut_config)
+			      const struct osi_macsec_lut_config *const lut_config)
 {
 	nveu32_t lut_data[MACSEC_LUT_DATA_REG_CNT] = {0};
 	nveu32_t flags = lut_config->flags;
@@ -2799,7 +2838,8 @@ static nve32_t byp_lut_config(struct osi_core_priv_data *const osi_core,
 	if (lut_config_inputs(lut_config, lut_data) != 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "LUT inputs error\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	/* Lookup output */
@@ -2860,7 +2900,7 @@ static nve32_t byp_lut_config(struct osi_core_priv_data *const osi_core,
 		ret = -1;
 		break;
 	}
-
+exit:
 	return ret;
 }
 
@@ -2888,7 +2928,7 @@ static nve32_t byp_lut_config(struct osi_core_priv_data *const osi_core,
  * @retval -1 on failure
  */
 static inline nve32_t lut_data_write(struct osi_core_priv_data *const osi_core,
-				struct osi_macsec_lut_config *const lut_config)
+				     const struct osi_macsec_lut_config *const lut_config)
 {
 	nve32_t ret = 0;
 
@@ -2942,6 +2982,8 @@ static inline nve32_t lut_data_write(struct osi_core_priv_data *const osi_core,
  */
 static nve32_t validate_lut_conf(const struct osi_macsec_lut_config *const lut_config)
 {
+	nve32_t ret = 0;
+
 	/* Validate LUT config */
 	if ((lut_config->table_config.ctlr_sel > OSI_CTLR_SEL_MAX) ||
 	    (lut_config->table_config.rw > OSI_RW_MAX) ||
@@ -2952,9 +2994,11 @@ static nve32_t validate_lut_conf(const struct osi_macsec_lut_config *const lut_c
 			lut_config->table_config.ctlr_sel,
 			lut_config->table_config.rw,
 			lut_config->table_config.index, lut_config->lut_sel);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -2994,13 +3038,14 @@ static nve32_t macsec_lut_config(struct osi_core_priv_data *const osi_core,
 	nveu8_t *base = (nveu8_t *)osi_core->macsec_base;
 
 	if (validate_lut_conf(lut_config) < 0) {
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	/* Wait for previous LUT update to finish */
 	ret = poll_for_lut_update(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 
 	lut_config_reg = osi_readla(osi_core, base + MACSEC_LUT_CONFIG);
@@ -3015,7 +3060,7 @@ static nve32_t macsec_lut_config(struct osi_core_priv_data *const osi_core,
 		/* For write operation, load the lut_data registers */
 		ret = lut_data_write(osi_core, lut_config);
 		if (ret < 0) {
-			return ret;
+			goto exit;
 		}
 	} else {
 		lut_config_reg &= ~MACSEC_LUT_CONFIG_RW;
@@ -3034,17 +3079,17 @@ static nve32_t macsec_lut_config(struct osi_core_priv_data *const osi_core,
 	/* Wait for this LUT update to finish */
 	ret = poll_for_lut_update(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 
 	if (lut_config->table_config.rw == OSI_NONE) {
 		ret = lut_data_read(osi_core, lut_config);
 		if (ret < 0) {
-			return ret;
+			goto exit;
 		}
 	}
-
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -3509,7 +3554,8 @@ static inline void handle_tx_irq(struct osi_core_priv_data *const osi_core)
  */
 static inline void handle_rx_irq(struct osi_core_priv_data *const osi_core)
 {
-	nveu32_t rx_isr, clear = 0;
+	nveu32_t rx_isr;
+	nveu32_t clear = 0;
 	nveu8_t *addr = (nveu8_t *)osi_core->macsec_base;
 #ifdef HSI_SUPPORT
 	nveu64_t rx_crc_err = 0;
@@ -3616,7 +3662,8 @@ static inline void handle_rx_irq(struct osi_core_priv_data *const osi_core)
  */
 static inline void handle_common_irq(struct osi_core_priv_data *const osi_core)
 {
-	nveu32_t common_isr, clear = 0;
+	nveu32_t common_isr;
+	nveu32_t clear = 0;
 	nveu8_t *addr = (nveu8_t *)osi_core->macsec_base;
 
 	common_isr = osi_readla(osi_core, addr + MACSEC_COMMON_ISR);
@@ -3764,6 +3811,7 @@ static nve32_t macsec_cipher_config(struct osi_core_priv_data *const osi_core,
 {
 	nveu8_t *base = (nveu8_t *)osi_core->macsec_base;
 	nveu32_t val;
+	nve32_t ret = 0;
 
 	val = osi_readla(osi_core, base + MACSEC_GCM_AES_CONTROL_0);
 
@@ -3776,11 +3824,13 @@ static nve32_t macsec_cipher_config(struct osi_core_priv_data *const osi_core,
 		val |= MACSEC_TX_AES_MODE_AES256;
 		val |= MACSEC_RX_AES_MODE_AES256;
 	} else {
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	osi_writela(osi_core, val, base + MACSEC_GCM_AES_CONTROL_0);
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -3812,6 +3862,7 @@ static nve32_t macsec_loopback_config(
 {
 	nveu8_t *base = (nveu8_t *)osi_core->macsec_base;
 	nveu32_t val;
+	nve32_t ret = 0;
 
 	val = osi_readla(osi_core, base + MACSEC_CONTROL1);
 
@@ -3820,11 +3871,13 @@ static nve32_t macsec_loopback_config(
 	} else if (enable == OSI_DISABLE) {
 		val &= ~MACSEC_LOOPBACK_MODE_EN;
 	} else {
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	osi_writela(osi_core, val, base + MACSEC_CONTROL1);
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -3867,11 +3920,11 @@ static nve32_t clear_byp_lut(struct osi_core_priv_data *const osi_core)
 			if (ret < 0) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "Error clearing CTLR:BYPASS LUT:INDEX: \n", j);
-				return ret;
+				goto exit;
 			}
 		}
 	}
-
+exit:
 	return ret;
 }
 
@@ -3915,10 +3968,11 @@ static nve32_t clear_sci_lut(struct osi_core_priv_data *const osi_core)
 			if (ret < 0) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "Error clearing CTLR:SCI LUT:INDEX: \n", j);
-				return ret;
+				goto exit;
 			}
 		}
 	}
+exit:
 	return ret;
 }
 
@@ -3962,10 +4016,11 @@ static nve32_t clear_sc_param_lut(struct osi_core_priv_data *const osi_core)
 			if (ret < 0) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "Error clearing CTLR:SC PARAM LUT:INDEX: \n", j);
-				return ret;
+				goto exit;
 			}
 		}
 	}
+exit:
 	return ret;
 
 }
@@ -4010,10 +4065,11 @@ static nve32_t clear_sc_state_lut(struct osi_core_priv_data *const osi_core)
 			if (ret < 0) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "Error clearing CTLR:SC STATE LUT:INDEX: \n", j);
-				return ret;
+				goto exit;
 			}
 		}
 	}
+exit:
 	return ret;
 
 }
@@ -4057,7 +4113,7 @@ static nve32_t clear_sa_state_lut(struct osi_core_priv_data *const osi_core)
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Error clearing TX CTLR:SA STATE LUT:INDEX: \n", j);
-			return ret;
+			goto exit;
 		}
 	}
 
@@ -4070,9 +4126,10 @@ static nve32_t clear_sa_state_lut(struct osi_core_priv_data *const osi_core)
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Error clearing RX CTLR:SA STATE LUT:INDEX: \n", j);
-			return ret;
+			goto exit;
 		}
 	}
+exit:
 	return ret;
 }
 
@@ -4117,23 +4174,23 @@ static nve32_t clear_lut(struct osi_core_priv_data *const osi_core)
 	/* Clear all the LUT's which have a dedicated LUT valid bit per entry */
 	ret = clear_byp_lut(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 	ret = clear_sci_lut(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 	ret = clear_sc_param_lut(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 	ret = clear_sc_state_lut(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 	ret = clear_sa_state_lut(osi_core);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 
 #ifdef MACSEC_KEY_PROGRAM
@@ -4148,12 +4205,12 @@ static nve32_t clear_lut(struct osi_core_priv_data *const osi_core)
 			if (ret < 0) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "Error clearing KT LUT:INDEX: \n", j);
-				return ret;
+				goto exit;
 			}
 		}
 	}
 #endif /* MACSEC_KEY_PROGRAM */
-
+exit:
 	return ret;
 }
 
@@ -4228,11 +4285,13 @@ static nve32_t macsec_update_mtu(struct osi_core_priv_data *const osi_core,
 {
 	nveu32_t val = 0;
 	nveu8_t *addr = (nveu8_t *)osi_core->macsec_base;
+	nve32_t ret = 0;
 
 	if (mtu > OSI_MAX_MTU_SIZE) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Invalid MTU received!!\n", mtu);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 	/* Set MTU */
 	val = osi_readla(osi_core, addr + MACSEC_TX_MTU_LEN);
@@ -4248,8 +4307,8 @@ static nve32_t macsec_update_mtu(struct osi_core_priv_data *const osi_core,
 	val |= (mtu & MTU_LENGTH_MASK);
 	LOG("Write MACSEC_RX_MTU_LEN: 0x%x\n", val);
 	osi_writela(osi_core, val, addr + MACSEC_RX_MTU_LEN);
-
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -4304,7 +4363,7 @@ static nve32_t set_byp_lut(struct osi_core_priv_data *const osi_core)
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				      "Failed to set BYP for BC addr\n", (nveul64_t)ret);
-			return ret;
+			goto exit;
 		} else {
 			osi_core->macsec_lut_status[i].next_byp_idx = (nveu16_t )
 				((osi_core->macsec_lut_status[i].next_byp_idx & 0xFFU) + 1U);
@@ -4324,13 +4383,14 @@ static nve32_t set_byp_lut(struct osi_core_priv_data *const osi_core)
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			   "Failed to set BYP for MKPDU multicast DA\n", (nveul64_t)ret);
 
-			return ret;
+			goto exit;
 		} else {
 			osi_core->macsec_lut_status[i].next_byp_idx = (nveu16_t )
 				((osi_core->macsec_lut_status[i].next_byp_idx & 0xFFU) + 1U);
 		}
 	}
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -4389,7 +4449,7 @@ static nve32_t macsec_init(struct osi_core_priv_data *const osi_core,
 	/* Set MTU */
 	ret = macsec_update_mtu(osi_core, mtu);
 	if (ret < 0) {
-		return ret;
+		goto exit;
 	}
 
 	/* set TX/RX SOT, as SOT value different for eqos.
@@ -4462,9 +4522,11 @@ static nve32_t macsec_init(struct osi_core_priv_data *const osi_core,
 	if (ret < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			      "Invalidating all LUT's failed\n", (nveul64_t)ret);
-		return ret;
+		goto exit;
 	}
-	return set_byp_lut(osi_core);
+	ret = set_byp_lut(osi_core);
+exit:
+	return ret;
 }
 
 /**
@@ -4498,16 +4560,17 @@ static struct osi_macsec_sc_info *find_existing_sc(
 {
 	struct osi_macsec_lut_status *lut_status_ptr =
 					&osi_core->macsec_lut_status[ctlr];
+	struct osi_macsec_sc_info *sc_found = OSI_NULL;
 	nveu32_t i;
 
 	for (i = 0; i < OSI_MAX_NUM_SC; i++) {
 		if (osi_memcmp(lut_status_ptr->sc_info[i].sci, sc->sci,
 			       (nve32_t)OSI_SCI_LEN) == OSI_NONE_SIGNED) {
-			return &lut_status_ptr->sc_info[i];
+			sc_found = &lut_status_ptr->sc_info[i];
 		}
 	}
 
-	return OSI_NULL;
+	return sc_found;
 }
 
 /**
@@ -4541,7 +4604,7 @@ static nveu32_t get_avail_sc_idx(const struct osi_core_priv_data *const osi_core
 
 	for (i = 0; i < OSI_MAX_NUM_SC; i++) {
 		if (lut_status_ptr->sc_info[i].an_valid == OSI_NONE) {
-			return i;
+			break;
 		}
 	}
 	return i;
@@ -4586,24 +4649,28 @@ static nve32_t macsec_get_key_index(struct osi_core_priv_data *const osi_core,
 	    (ctlr > OSI_CTLR_SEL_MAX)) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Params validation failed\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	ret = osi_memcpy(sc.sci, sci, OSI_SCI_LEN);
 	if (ret < OSI_NONE_SIGNED) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "memcpy failed\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 	sc_info = find_existing_sc(osi_core, &sc, ctlr);
 	if (sc_info == OSI_NULL) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "SCI Not found\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	*key_index = (sc_info->sc_idx_start * OSI_MAX_NUM_SA);
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -4647,7 +4714,7 @@ static nve32_t del_upd_sc(struct osi_core_priv_data *const osi_core,
 #endif /* MACSEC_KEY_PROGRAM */
 	struct osi_macsec_lut_config lut_config = {0};
 	struct osi_macsec_table_config *table_config;
-	nve32_t ret;
+	nve32_t ret = 0;
 
 	/* All input/output fields are already zero'd in declaration.
 	 * Write all 0's to LUT index to clear everything
@@ -4669,7 +4736,8 @@ static nve32_t del_upd_sc(struct osi_core_priv_data *const osi_core,
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to del SCI LUT idx\n",
 				     sc->sc_idx_start);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 
 		/* 2. SC Param LUT */
@@ -4678,7 +4746,8 @@ static nve32_t del_upd_sc(struct osi_core_priv_data *const osi_core,
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to del SC param\n", (nveul64_t)ret);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 
 		/* 3. SC state LUT */
@@ -4687,7 +4756,8 @@ static nve32_t del_upd_sc(struct osi_core_priv_data *const osi_core,
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to del SC state\n", (nveul64_t)ret);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 	}
 
@@ -4699,7 +4769,8 @@ static nve32_t del_upd_sc(struct osi_core_priv_data *const osi_core,
 	if (ret < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Failed to del SA state\n", (nveul64_t)ret);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	/* Store key table index returned to osd */
@@ -4716,13 +4787,14 @@ static nve32_t del_upd_sc(struct osi_core_priv_data *const osi_core,
 	if (ret < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Failed to del SAK\n", (nveul64_t)ret);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 #endif /* MACSEC_KEY_PROGRAM */
 
 	existing_sc->an_valid &= ~OSI_BIT(sc->curr_an);
-
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -4785,6 +4857,87 @@ static void copy_rev_order(nveu8_t *dst_buff, const nveu8_t *src_buff, nveu16_t
 	}
 }
 
+/**
+ * @brief add_upd_sc_err_cleanup - Helper function to handle error conditions in add_upd_sc
+ *
+ * @note
+ * Algorithm:
+ *  - Depending on the error_mask passed clear the LUTs
+ *  - Refer to MACSEC column of <<******, (sequence diagram)>> for API details.
+ *  - TraceID: ***********
+ *
+ * @param[in] osi_core: OSI core private data structure. used param macsec_base
+ * @param[in] error_mask: Error mask that indicate which LUTs need to be cleared
+ * @param[in] ctlr: Controller to be selected
+ * @param[in] sc: Pointer to the SC that was intended to be added
+ *
+ * @pre MACSEC needs to be out of reset and proper clock configured.
+ *
+ * @note
+ * API Group:
+ * - Initialization: No
+ * - Run time: Yes
+ * - De-initialization: No
+ */
+static void add_upd_sc_err_cleanup(struct osi_core_priv_data *const osi_core,
+				 nveu8_t mask, nveu16_t ctlr,
+				 const struct osi_macsec_sc_info *const sc)
+{
+	struct osi_macsec_lut_config lut_config = {0};
+	struct osi_macsec_table_config *table_config;
+	nve32_t ret_fail = 0;
+	nveu8_t error_mask = mask;
+
+	if ((error_mask & OSI_BIT(3)) != OSI_NONE) {
+		/* Cleanup SCI LUT */
+		error_mask &= ((~OSI_BIT(3)) & (0xFFU));
+		osi_memset(&lut_config, 0, sizeof(lut_config));
+		table_config = &lut_config.table_config;
+		table_config->ctlr_sel = ctlr;
+		table_config->rw = OSI_LUT_WRITE;
+		lut_config.lut_sel = OSI_LUT_SEL_SCI;
+		table_config->index = (nveu16_t)(sc->sc_idx_start);
+		ret_fail = macsec_lut_config(osi_core, &lut_config);
+		print_error(osi_core, ret_fail);
+	}
+	if ((error_mask & OSI_BIT(2)) != OSI_NONE) {
+		/* cleanup SC param */
+		error_mask &= ((~OSI_BIT(2)) & (0xFFU));
+		osi_memset(&lut_config, 0, sizeof(lut_config));
+		table_config = &lut_config.table_config;
+		table_config->ctlr_sel = ctlr;
+		lut_config.lut_sel = OSI_LUT_SEL_SC_PARAM;
+		table_config->index = (nveu16_t)(sc->sc_idx_start);
+		ret_fail = macsec_lut_config(osi_core, &lut_config);
+		print_error(osi_core, ret_fail);
+	}
+	if ((error_mask & OSI_BIT(1)) != OSI_NONE) {
+		/* Cleanup SA state LUT */
+		error_mask &= ((~OSI_BIT(1)) & (0xFFU));
+		osi_memset(&lut_config, 0, sizeof(lut_config));
+		table_config = &lut_config.table_config;
+		table_config->ctlr_sel = ctlr;
+		table_config->rw = OSI_LUT_WRITE;
+		lut_config.lut_sel = OSI_LUT_SEL_SA_STATE;
+		table_config->index = (nveu16_t)(((sc->sc_idx_start & 0xFU) *
+				       OSI_MAX_NUM_SA) + sc->curr_an);
+		ret_fail = macsec_lut_config(osi_core, &lut_config);
+		print_error(osi_core, ret_fail);
+	}
+#ifdef MACSEC_KEY_PROGRAM
+	if ((error_mask & OSI_BIT(0)) != OSI_NONE) {
+		error_mask &= ((~OSI_BIT(0)) & (0xFFU));
+		osi_memset(&kt_config, 0, sizeof(kt_config));
+		table_config = &kt_config.table_config;
+		table_config->ctlr_sel = ctlr;
+		table_config->rw = OSI_LUT_WRITE;
+		table_config->index = *kt_idx;
+		ret_fail = macsec_kt_config(osi_core, &kt_config);
+		print_error(osi_core, ret_fail);
+	}
+#endif /* MACSEC_KEY_PROGRAM */
+}
+
 /**
  * @brief add_upd_sc - add or update an SC
  *
@@ -4800,7 +4953,7 @@ static void copy_rev_order(nveu8_t *dst_buff, const nveu8_t *src_buff, nveu16_t
  *  - TraceID: ***********
  *
  * @param[in] osi_core: OSI core private data structure. used param macsec_base
- * @param[in] existing_sc: Pointer to the existing sc
+ * @param[in] sc: Pointer to the existing sc
  * @param[in] ctlr: Controller to be selected
  * @param[out] kt_idx: Key index to be passed to osd
  *
@@ -4816,13 +4969,14 @@ static void copy_rev_order(nveu8_t *dst_buff, const nveu8_t *src_buff, nveu16_t
  * @retval -1 on failure
  */
 static nve32_t add_upd_sc(struct osi_core_priv_data *const osi_core,
-		      struct osi_macsec_sc_info *const sc,
-		      nveu16_t ctlr, nveu16_t *kt_idx)
+			  const struct osi_macsec_sc_info *const sc,
+			  nveu16_t ctlr, nveu16_t *kt_idx)
 {
 	struct osi_macsec_lut_config lut_config = {0};
 	struct osi_macsec_table_config *table_config;
-	nve32_t ret;
+	nve32_t ret = 0;
 	nveu32_t i;
+	nveu8_t error_mask = 0;
 #ifdef MACSEC_KEY_PROGRAM
 	struct osi_macsec_kt_config kt_config = {0};
 #endif /* MACSEC_KEY_PROGRAM */
@@ -4847,7 +5001,8 @@ static nve32_t add_upd_sc(struct osi_core_priv_data *const osi_core,
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to set SAK\n", (nveul64_t)ret);
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 	}
 #endif /* MACSEC_KEY_PROGRAM */
@@ -4867,7 +5022,8 @@ static nve32_t add_upd_sc(struct osi_core_priv_data *const osi_core,
 	if (ret < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Failed to set SA state\n", (nveul64_t)ret);
-		goto err_sa_state;
+		error_mask |= OSI_BIT(0);
+		goto exit;
 	}
 
 	/* 3. SC param LUT */
@@ -4887,7 +5043,8 @@ static nve32_t add_upd_sc(struct osi_core_priv_data *const osi_core,
 	if (ret < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Failed to set SC param\n", (nveul64_t)ret);
-		goto err_sc_param;
+		error_mask |= OSI_BIT(1);
+		goto exit;
 	}
 
 	/* 4. SCI LUT */
@@ -4908,7 +5065,8 @@ static nve32_t add_upd_sc(struct osi_core_priv_data *const osi_core,
 	if (ret < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Failed to set SCI LUT\n", (nveul64_t)ret);
-		goto err_sci;
+		error_mask |= OSI_BIT(2);
+		goto exit;
 	}
 
 	if (sc->flags == OSI_ENABLE_SA) {
@@ -4921,56 +5079,13 @@ static nve32_t add_upd_sc(struct osi_core_priv_data *const osi_core,
 		if (ret < 0) {
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "Failed to set SC state\n", (nveul64_t)ret);
-			goto err_sc_state;
+			error_mask |= OSI_BIT(3);
+			goto exit;
 		}
 	}
-	return 0;
-
-err_sc_state:
-	/* Cleanup SCI LUT */
-	osi_memset(&lut_config, 0, sizeof(lut_config));
-	table_config = &lut_config.table_config;
-	table_config->ctlr_sel = ctlr;
-	table_config->rw = OSI_LUT_WRITE;
-	lut_config.lut_sel = OSI_LUT_SEL_SCI;
-	table_config->index = (nveu16_t)(sc->sc_idx_start);
-	ret = macsec_lut_config(osi_core, &lut_config);
-	print_error(osi_core, ret);
-
-err_sci:
-	/* cleanup SC param */
-	osi_memset(&lut_config, 0, sizeof(lut_config));
-	table_config = &lut_config.table_config;
-	table_config->ctlr_sel = ctlr;
-	lut_config.lut_sel = OSI_LUT_SEL_SC_PARAM;
-	table_config->index = (nveu16_t)(sc->sc_idx_start);
-	ret = macsec_lut_config(osi_core, &lut_config);
-	print_error(osi_core, ret);
-
-err_sc_param:
-	/* Cleanup SA state LUT */
-	osi_memset(&lut_config, 0, sizeof(lut_config));
-	table_config = &lut_config.table_config;
-	table_config->ctlr_sel = ctlr;
-	table_config->rw = OSI_LUT_WRITE;
-	lut_config.lut_sel = OSI_LUT_SEL_SA_STATE;
-	table_config->index = (nveu16_t)(((sc->sc_idx_start & 0xFU) *
-			       OSI_MAX_NUM_SA) + sc->curr_an);
-	ret = macsec_lut_config(osi_core, &lut_config);
-	print_error(osi_core, ret);
-
-err_sa_state:
-#ifdef MACSEC_KEY_PROGRAM
-	osi_memset(&kt_config, 0, sizeof(kt_config));
-	table_config = &kt_config.table_config;
-	table_config->ctlr_sel = ctlr;
-	table_config->rw = OSI_LUT_WRITE;
-	table_config->index = *kt_idx;
-	ret = macsec_kt_config(osi_core, &kt_config);
-	print_error(osi_core, ret);
-#endif /* MACSEC_KEY_PROGRAM */
-
-	return -1;
+exit:
+	add_upd_sc_err_cleanup(osi_core, error_mask, ctlr, sc);
+	return ret;
 }
 
 /**
@@ -5000,13 +5115,15 @@ err_sa_state:
 static nve32_t macsec_config_validate_inputs(nveu32_t enable, nveu16_t ctlr,
 					     const nveu16_t *kt_idx)
 {
+	nve32_t ret = 0;
+
 	/* Validate inputs */
 	if (((enable != OSI_ENABLE) && (enable != OSI_DISABLE)) ||
 	    ((ctlr != OSI_CTLR_SEL_TX) && (ctlr != OSI_CTLR_SEL_RX)) ||
 	    (kt_idx == OSI_NULL)) {
-		return -1;
+		ret = -1;
 	}
-	return 0;
+	return ret;
 }
 
 /**
@@ -5099,21 +5216,24 @@ static nve32_t add_new_sc(struct osi_core_priv_data *const osi_core,
 	if (lut_status_ptr->num_of_sc_used >= OSI_MAX_NUM_SC) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 		  "Err: Reached max SC LUT entries!\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	avail_sc_idx = get_avail_sc_idx(osi_core, ctlr);
 	if (avail_sc_idx == OSI_MAX_NUM_SC) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Err: NO free SC Index\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 	new_sc = &lut_status_ptr->sc_info[avail_sc_idx];
 	ret = memcpy_sci_sak_hkey(new_sc, sc);
 	if (ret < OSI_NONE_SIGNED) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "memcpy Failed\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 	new_sc->curr_an = sc->curr_an;
 	new_sc->next_pn = sc->next_pn;
@@ -5127,7 +5247,8 @@ static nve32_t add_new_sc(struct osi_core_priv_data *const osi_core,
 		       OSI_NONE_SIGNED) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "failed to add new SC\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	} else {
 		/* Update lut status */
 		lut_status_ptr->num_of_sc_used++;
@@ -5135,8 +5256,9 @@ static nve32_t add_new_sc(struct osi_core_priv_data *const osi_core,
 		       "Total active SCs: %u",
 		       __func__, ctlr,
 		       lut_status_ptr->num_of_sc_used);
-		return 0;
 	}
+exit:
+	return ret;
 }
 
 /**
@@ -5180,12 +5302,13 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 	struct osi_macsec_sc_info tmp_sc;
 	struct osi_macsec_sc_info *tmp_sc_p = &tmp_sc;
 	struct osi_macsec_lut_status *lut_status_ptr;
-	nve32_t ret;
+	nve32_t ret = 0;
 
 	if (macsec_config_validate_inputs(enable, ctlr, kt_idx) < 0) {
 		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 			     "Input validation failed\n", 0ULL);
-		return -1;
+		ret = -1;
+		goto exit;
 	}
 
 	lut_status_ptr = &osi_core->macsec_lut_status[ctlr];
@@ -5196,10 +5319,12 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 			OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 				     "trying to delete non-existing SC ?\n",
 				     0ULL);
-			return -1;
+			ret = -1;
+			goto exit;
 		} else {
 			LOG("%s: Adding new SC/SA: ctlr: %hu", __func__, ctlr);
-			return add_new_sc(osi_core, sc, ctlr, kt_idx);
+			ret = add_new_sc(osi_core, sc, ctlr, kt_idx);
+			goto exit;
 		}
 	} else {
 		LOG("%s: Updating existing SC", __func__);
@@ -5209,7 +5334,8 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 			    OSI_NONE_SIGNED) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "failed to del SA\n", 0ULL);
-				return -1;
+				ret = -1;
+				goto exit;
 			} else {
 				if ((existing_sc->an_valid == OSI_NONE) &&
 				    (lut_status_ptr->num_of_sc_used != OSI_NONE)) {
@@ -5218,7 +5344,7 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 						   sizeof(*existing_sc));
 				}
 
-				return 0;
+				goto exit;
 			}
 		} else {
 			/* Take backup copy.
@@ -5230,7 +5356,8 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 			if (ret < OSI_NONE_SIGNED) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "memcpy Failed\n", 0ULL);
-				return -1;
+				ret = -1;
+				goto exit;
 			}
 			tmp_sc_p->curr_an = sc->curr_an;
 			tmp_sc_p->next_pn = sc->next_pn;
@@ -5243,7 +5370,8 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 				       OSI_NONE_SIGNED) {
 				OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
 					     "failed to add new SA\n", 0ULL);
-				return -1;
+				ret = -1;
+				goto exit;
 			} else {
 				LOG("%s: Updated new SC ctlr: %u "
 				       "Total active SCs: %u",
@@ -5251,10 +5379,11 @@ static nve32_t config_macsec(struct osi_core_priv_data *const osi_core,
 				       lut_status_ptr->num_of_sc_used);
 				/* Now commit the changes */
 				*existing_sc = *tmp_sc_p;
-				return 0;
 			}
 		}
 	}
+exit:
+	return ret;
 }
 
 #ifdef OSI_DEBUG
@@ -5348,6 +5477,7 @@ static void macsec_debug_intr_config(struct osi_core_priv_data *const osi_core,
 nve32_t osi_init_macsec_ops(struct osi_core_priv_data *const osi_core)
 {
 	static struct osi_macsec_core_ops virt_macsec_ops;
+	nve32_t ret = 0;
 	static struct osi_macsec_core_ops macsec_ops = {
 		.init = macsec_init,
 		.deinit = macsec_deinit,
@@ -5376,11 +5506,13 @@ nve32_t osi_init_macsec_ops(struct osi_core_priv_data *const osi_core)
 		ivc_init_macsec_ops(osi_core->macsec_ops);
 	} else {
 		if (osi_core->macsec_base == OSI_NULL) {
-			return -1;
+			ret = -1;
+			goto exit;
 		}
 		osi_core->macsec_ops = &macsec_ops;
 	}
-	return 0;
+exit:
+	return ret;
 }
 
 /**
@@ -5411,12 +5543,14 @@ nve32_t osi_init_macsec_ops(struct osi_core_priv_data *const osi_core)
 nve32_t osi_macsec_init(struct osi_core_priv_data *const osi_core,
 			nveu32_t mtu)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->init != OSI_NULL)) {
-		return osi_core->macsec_ops->init(osi_core, mtu);
+		ret = osi_core->macsec_ops->init(osi_core, mtu);
 	}
 
-	return -1;
+	return ret;
 }
 
 /**
@@ -5444,11 +5578,13 @@ nve32_t osi_macsec_init(struct osi_core_priv_data *const osi_core,
  */
 nve32_t osi_macsec_deinit(struct osi_core_priv_data *const osi_core)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->deinit != OSI_NULL)) {
-		return osi_core->macsec_ops->deinit(osi_core);
+		ret = osi_core->macsec_ops->deinit(osi_core);
 	}
-	return -1;
+	return ret;
 }
 
 /**
@@ -5534,12 +5670,14 @@ void osi_macsec_s_isr(struct osi_core_priv_data *const osi_core)
 nve32_t osi_macsec_config_lut(struct osi_core_priv_data *const osi_core,
 			  struct osi_macsec_lut_config *const lut_config)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->lut_config != OSI_NULL)) {
-		return osi_core->macsec_ops->lut_config(osi_core, lut_config);
+		ret = osi_core->macsec_ops->lut_config(osi_core, lut_config);
 	}
 
-	return -1;
+	return ret;
 }
 
 /**
@@ -5572,13 +5710,15 @@ nve32_t osi_macsec_get_sc_lut_key_index(struct osi_core_priv_data *const osi_cor
 					nveu8_t *sci, nveu32_t *key_index,
 					nveu16_t ctlr)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->get_sc_lut_key_index != OSI_NULL)) {
-		return osi_core->macsec_ops->get_sc_lut_key_index(osi_core, sci, key_index,
+		ret = osi_core->macsec_ops->get_sc_lut_key_index(osi_core, sci, key_index,
 								  ctlr);
 	}
 
-	return -1;
+	return ret;
 }
 
 /**
@@ -5608,12 +5748,14 @@ nve32_t osi_macsec_get_sc_lut_key_index(struct osi_core_priv_data *const osi_cor
 nve32_t osi_macsec_update_mtu(struct osi_core_priv_data *const osi_core,
 			      nveu32_t mtu)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->update_mtu != OSI_NULL)) {
-		return osi_core->macsec_ops->update_mtu(osi_core, mtu);
+		ret = osi_core->macsec_ops->update_mtu(osi_core, mtu);
 	}
 
-	return -1;
+	return ret;
 }
 
 #ifdef MACSEC_KEY_PROGRAM
@@ -5644,13 +5786,15 @@ nve32_t osi_macsec_update_mtu(struct osi_core_priv_data *const osi_core,
 nve32_t osi_macsec_config_kt(struct osi_core_priv_data *const osi_core,
 			 struct osi_macsec_kt_config *const kt_config)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->kt_config != OSI_NULL) &&
 	    (kt_config != OSI_NULL)) {
-		return osi_core->macsec_ops->kt_config(osi_core, kt_config);
+		ret = osi_core->macsec_ops->kt_config(osi_core, kt_config);
 	}
 
-	return -1;
+	return ret;
 }
 #endif /* MACSEC_KEY_PROGRAM */
 
@@ -5681,12 +5825,14 @@ nve32_t osi_macsec_config_kt(struct osi_core_priv_data *const osi_core,
 nve32_t osi_macsec_cipher_config(struct osi_core_priv_data *const osi_core,
 			      nveu32_t cipher)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->cipher_config != OSI_NULL)) {
-		return osi_core->macsec_ops->cipher_config(osi_core, cipher);
+		ret = osi_core->macsec_ops->cipher_config(osi_core, cipher);
 	}
 
-	return -1;
+	return ret;
 }
 
 /**
@@ -5716,13 +5862,14 @@ nve32_t osi_macsec_cipher_config(struct osi_core_priv_data *const osi_core,
 nve32_t osi_macsec_loopback(struct osi_core_priv_data *const osi_core,
 			nveu32_t enable)
 {
+	nve32_t ret = -1;
 
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->loopback_config != OSI_NULL)) {
-		return osi_core->macsec_ops->loopback_config(osi_core, enable);
+		ret = osi_core->macsec_ops->loopback_config(osi_core, enable);
 	}
 
-	return -1;
+	return ret;
 }
 
 /**
@@ -5753,18 +5900,20 @@ nve32_t osi_macsec_loopback(struct osi_core_priv_data *const osi_core,
 nve32_t osi_macsec_en(struct osi_core_priv_data *const osi_core,
 		  nveu32_t enable)
 {
+	nve32_t ret = -1;
+
 	if (((enable & OSI_MACSEC_TX_EN) != OSI_MACSEC_TX_EN) &&
 	    ((enable & OSI_MACSEC_RX_EN) != OSI_MACSEC_RX_EN) &&
 	    (enable != OSI_DISABLE)) {
-		return -1;
+		goto exit;
 	}
 
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->macsec_en != OSI_NULL)) {
-		return osi_core->macsec_ops->macsec_en(osi_core, enable);
+		ret = osi_core->macsec_ops->macsec_en(osi_core, enable);
 	}
-
-	return -1;
+exit:
+	return ret;
 }
 
 /**
@@ -5799,18 +5948,20 @@ nve32_t osi_macsec_config(struct osi_core_priv_data *const osi_core,
 		      nveu32_t enable, nveu16_t ctlr,
 		      nveu16_t *kt_idx)
 {
+	nve32_t ret = -1;
+
 	if (((enable != OSI_ENABLE) && (enable != OSI_DISABLE)) ||
 	    (ctlr > OSI_CTLR_SEL_MAX) || (kt_idx == OSI_NULL)) {
-		return -1;
+		goto exit;
 	}
 
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->config != OSI_NULL) && (sc != OSI_NULL)) {
-		return osi_core->macsec_ops->config(osi_core, sc,
+		ret = osi_core->macsec_ops->config(osi_core, sc,
 						    enable, ctlr, kt_idx);
 	}
-
-	return -1;
+exit:
+	return ret;
 }
 
 /**
@@ -5838,13 +5989,14 @@ nve32_t osi_macsec_config(struct osi_core_priv_data *const osi_core,
  */
 nve32_t osi_macsec_read_mmc(struct osi_core_priv_data *const osi_core)
 {
+	nve32_t ret = -1;
+
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->read_mmc != OSI_NULL)) {
 		osi_core->macsec_ops->read_mmc(osi_core);
-		return 0;
+		ret = 0;
 	}
-
-	return -1;
+	return ret;
 }
 
 /**
@@ -5875,14 +6027,15 @@ nve32_t osi_macsec_config_dbg_buf(
 		struct osi_core_priv_data *const osi_core,
 		struct osi_macsec_dbg_buf_config *const dbg_buf_config)
 {
+	nve32_t ret = -1;
 
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->dbg_buf_config != OSI_NULL)) {
-		return osi_core->macsec_ops->dbg_buf_config(osi_core,
+		ret = osi_core->macsec_ops->dbg_buf_config(osi_core,
 							dbg_buf_config);
 	}
 
-	return -1;
+	return ret;
 }
 
 /**
@@ -5913,14 +6066,15 @@ nve32_t osi_macsec_dbg_events_config(
 		struct osi_core_priv_data *const osi_core,
 		struct osi_macsec_dbg_buf_config *const dbg_buf_config)
 {
+	nve32_t ret = -1;
 
 	if ((osi_core != OSI_NULL) && (osi_core->macsec_ops != OSI_NULL) &&
 	    (osi_core->macsec_ops->dbg_events_config != OSI_NULL)) {
-		return osi_core->macsec_ops->dbg_events_config(osi_core,
+		ret = osi_core->macsec_ops->dbg_events_config(osi_core,
 							dbg_buf_config);
 	}
 
-	return -1;
+	return ret;
 }
 
 #endif /* MACSEC_SUPPORT */
diff --git a/osi/core/macsec.h b/osi/core/macsec.h
index 7d027d0..6a2c132 100644
--- a/osi/core/macsec.h
+++ b/osi/core/macsec.h
@@ -48,8 +48,10 @@
  * @brief MACsec controller register offsets
  * @{
  */
+#ifdef MACSEC_KEY_PROGRAM
 #define MACSEC_GCM_KEYTABLE_CONFIG		0x0000
 #define MACSEC_GCM_KEYTABLE_DATA(x)		((0x0004U) + ((x) * 4U))
+#endif /* MACSEC_KEY_PROGRAM */
 #define MACSEC_RX_ICV_ERR_CNTRL			0x4000
 #define MACSEC_INTERRUPT_COMMON_SR		0x4004
 #define MACSEC_TX_IMR				0x4008
@@ -89,8 +91,9 @@
 #define MACSEC_TX_SCI_LUT_VALID 	0xD028
 #define MACSEC_RX_BYP_LUT_VALID 	0xD02C
 #define MACSEC_RX_SCI_LUT_VALID 	0xD030
-
+#ifdef OSI_DEBUG
 #define MACSEC_COMMON_IMR		0xD054
+#endif /* OSI_DEBUG */
 #define MACSEC_COMMON_ISR		0xD058
 #define MACSEC_TX_SC_KEY_INVALID_STS0_0	0xD064
 #define MACSEC_TX_SC_KEY_INVALID_STS1_0	0xD068
@@ -114,6 +117,7 @@
 #define MACSEC_RX_SOT_DELAY		0xE01C
 /** @} */
 
+#ifdef MACSEC_KEY_PROGRAM
 /**
  * @addtogroup MACSEC_GCM_KEYTABLE_CONFIG register
  *
@@ -138,6 +142,7 @@
 #define MACSEC_KT_DATA_REG_SAK_CNT	8U
 #define MACSEC_KT_DATA_REG_H_CNT	4U
 /** @} */
+#endif /* MACSEC_KEY_PROGRAM */
 
 /**
  * @addtogroup MACSEC_LUT_CONFIG register
@@ -208,6 +213,7 @@
 #define MACSEC_TX_AES_MODE_AES256	OSI_BIT(1)
 /** @} */
 
+#ifdef OSI_DEBUG
 /**
  * @addtogroup MACSEC_COMMON_IMR register
  *
@@ -220,6 +226,7 @@
 #define MACSEC_TX_UNINIT_KEY_SLOT_INT_EN	OSI_BIT(1)
 #define MACSEC_TX_LKUP_MISS_INT_EN		OSI_BIT(0)
 /** @} */
+#endif /* OSI_DEBUG */
 
 /**
  * @addtogroup MACSEC_TX_IMR register
@@ -227,11 +234,12 @@
  * @brief Bit definitions of TX_INTERRUPT_MASK register
  * @{
  */
+#define MACSEC_TX_MAC_CRC_ERROR_INT_EN		OSI_BIT(16)
+#ifdef OSI_DEBUG
 #define MACSEC_TX_DBG_BUF_CAPTURE_DONE_INT_EN	OSI_BIT(22)
 #define MACSEC_TX_MTU_CHECK_FAIL_INT_EN 	OSI_BIT(19)
 #define MACSEC_TX_AES_GCM_BUF_OVF_INT_EN	OSI_BIT(18)
 #define MACSEC_TX_SC_AN_NOT_VALID_INT_EN	OSI_BIT(17)
-#define MACSEC_TX_MAC_CRC_ERROR_INT_EN		OSI_BIT(16)
 #define MACSEC_TX_PN_EXHAUSTED_INT_EN		OSI_BIT(1)
 #define MACSEC_TX_PN_THRSHLD_RCHD_INT_EN	OSI_BIT(0)
 /** @} */
@@ -243,12 +251,13 @@
  * @{
  */
 #define MACSEC_RX_DBG_BUF_CAPTURE_DONE_INT_EN	OSI_BIT(22)
-#define MACSEC_RX_ICV_ERROR_INT_EN		OSI_BIT(21)
 #define RX_REPLAY_ERROR_INT_EN  		OSI_BIT(20)
 #define MACSEC_RX_MTU_CHECK_FAIL_INT_EN 	OSI_BIT(19)
 #define MACSEC_RX_AES_GCM_BUF_OVF_INT_EN	OSI_BIT(18)
-#define MACSEC_RX_MAC_CRC_ERROR_INT_EN		OSI_BIT(16)
 #define MACSEC_RX_PN_EXHAUSTED_INT_EN		OSI_BIT(1)
+#endif /* OSI_DEBUG */
+#define MACSEC_RX_ICV_ERROR_INT_EN		OSI_BIT(21)
+#define MACSEC_RX_MAC_CRC_ERROR_INT_EN		OSI_BIT(16)
 /** @} */
 
 /**
@@ -441,6 +450,8 @@
 
 /* debug buffer data read/write length */
 #define DBG_BUF_LEN		4U
+#ifdef MACSEC_KEY_PROGRAM
 #define INTEGER_LEN		4U
+#endif /* MACSEC_KEY_PROGRAM */
 
 #endif /* INCLUDED_MACSEC_H */
diff --git a/osi/core/mgbe_core.c b/osi/core/mgbe_core.c
index b414821..a603e4d 100644
--- a/osi/core/mgbe_core.c
+++ b/osi/core/mgbe_core.c
@@ -6133,7 +6133,7 @@ static void mgbe_config_for_macsec(struct osi_core_priv_data *const osi_core,
 	if ((enable != OSI_ENABLE) && (enable != OSI_DISABLE)) {
 		OSI_CORE_ERR(OSI_NULL, OSI_LOG_ARG_INVALID,
 			     "Failed to config MGBE per MACSEC\n", 0ULL);
-		return;
+		goto exit;
 	}
 	/* stop MAC Tx */
 	mgbe_config_mac_tx(osi_core, OSI_DISABLE);
@@ -6195,6 +6195,8 @@ static void mgbe_config_for_macsec(struct osi_core_priv_data *const osi_core,
 				0ULL);
 		}
 	}
+exit:
+	return;
 }
 #endif /*  MACSEC_SUPPORT */