nvethernetrm: add support for MGBE initialization

Adds MAC CORE and DMA initialization support for
MGBE MAC Controller.

Bug 200548572

Change-Id: I6796229852b47ff0748a848a6dbe9addab6ab74f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2250401
This commit is contained in:
Bhadram Varka
2019-09-16 13:53:44 +05:30
parent 1917175428
commit c0091a34ef
17 changed files with 1803 additions and 58 deletions

View File

@@ -534,25 +534,25 @@ struct osi_mmc_counters {
*/
struct osi_xtra_stat_counters {
/** RX buffer unavailable irq count */
nveu64_t rx_buf_unavail_irq_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t rx_buf_unavail_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
/** Transmit Process Stopped irq count */
nveu64_t tx_proc_stopped_irq_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t tx_proc_stopped_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
/** Transmit Buffer Unavailable irq count */
nveu64_t tx_buf_unavail_irq_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t tx_buf_unavail_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
/** Receive Process Stopped irq count */
nveu64_t rx_proc_stopped_irq_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t rx_proc_stopped_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
/** Receive Watchdog Timeout irq count */
nveu64_t rx_watchdog_irq_n;
/** Fatal Bus Error irq count */
nveu64_t fatal_bus_error_irq_n;
/** rx skb allocation failure count */
nveu64_t re_alloc_rxbuf_failed[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t re_alloc_rxbuf_failed[OSI_MGBE_MAX_NUM_QUEUES];
/** TX per channel interrupt count */
nveu64_t tx_normal_irq_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t tx_normal_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
/** TX per channel SW timer callback count */
nveu64_t tx_usecs_swtimer_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t tx_usecs_swtimer_n[OSI_MGBE_MAX_NUM_QUEUES];
/** RX per channel interrupt count */
nveu64_t rx_normal_irq_n[OSI_EQOS_MAX_NUM_QUEUES];
nveu64_t rx_normal_irq_n[OSI_MGBE_MAX_NUM_QUEUES];
/** link connect count */
nveu64_t link_connect_count;
/** link disconnect count */