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osi: core: add skip AN support for USXGMII mode

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provide an option to skip/allow AN in USXGMII
mode

Bug 4932519

Change-Id: I917a091dde498e7edcb7f504550437e39e3e0146
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3303212
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Narayan Reddy
2025-03-03 18:18:59 +00:00
committed by mobile promotions
parent 57ebd08cbc
commit cc7a258b43
2 changed files with 41 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
include/osi_core.h
View File

@@ -1865,6 +1865,9 @@ struct osi_core_priv_data {
nve32_t speed; nve32_t speed;
/** PCS BASE-R FEC enable */ /** PCS BASE-R FEC enable */
nveu32_t pcs_base_r_fec_en; nveu32_t pcs_base_r_fec_en;
/** skip auto neg for usxgmii mode.
* 0(enable AN) and 1(disable AN) are the valid values */
nveu32_t skip_usxgmii_an;
}; };
/** /**

29
osi/core/xpcs.c
View File

@@ -245,6 +245,30 @@ static inline nve32_t eqos_xpcs_set_speed(struct osi_core_priv_data *osi_core,
} }
#endif #endif
/**
* @brief update_an_status - update AN status.
*
* Algorithm: This routine initialize AN status based on
* the USXGMII mode selected. Later this value
* will be overwritten if AN is enabled.
*
* @param[in] osi_core: OSI core data structure.
* @param[out] an_status: Predefined AN status
*
*/
static inline void update_an_status(const struct osi_core_priv_data *const osi_core,
nveu32_t *an_status)
{
/* initialize an_status based on DT, later overwite if AN is enabled */
if (osi_core->phy_iface_mode == OSI_USXGMII_MODE_10G) {
*an_status = XPCS_USXG_AN_STS_SPEED_10000;
} else if (osi_core->phy_iface_mode == OSI_USXGMII_MODE_5G) {
*an_status = XPCS_USXG_AN_STS_SPEED_5000;
} else {
/* do nothing */
}
}
/** /**
* @brief xpcs_start - Start XPCS * @brief xpcs_start - Start XPCS
* *
@@ -267,6 +291,10 @@ nve32_t xpcs_start(struct osi_core_priv_data *osi_core)
if ((osi_core->phy_iface_mode == OSI_USXGMII_MODE_10G) || if ((osi_core->phy_iface_mode == OSI_USXGMII_MODE_10G) ||
(osi_core->phy_iface_mode == OSI_USXGMII_MODE_5G)) { (osi_core->phy_iface_mode == OSI_USXGMII_MODE_5G)) {
/* initialize an_status based on DT, later overwite if AN is enabled */
update_an_status(osi_core, &an_status);
/* Skip AN in USXGMII mode if skip_usxgmii_an is configured in DT */
if (osi_core->skip_usxgmii_an == OSI_DISABLE) {
ctrl = xpcs_read(xpcs_base, XPCS_SR_MII_CTRL); ctrl = xpcs_read(xpcs_base, XPCS_SR_MII_CTRL);
ctrl |= XPCS_SR_MII_CTRL_AN_ENABLE; ctrl |= XPCS_SR_MII_CTRL_AN_ENABLE;
ret = xpcs_write_safety(osi_core, XPCS_SR_MII_CTRL, ctrl); ret = xpcs_write_safety(osi_core, XPCS_SR_MII_CTRL, ctrl);
@@ -277,6 +305,7 @@ nve32_t xpcs_start(struct osi_core_priv_data *osi_core)
if (ret < 0) { if (ret < 0) {
goto fail; goto fail;
} }
}
ret = xpcs_set_speed(osi_core, an_status); ret = xpcs_set_speed(osi_core, an_status);
if (ret != 0) { if (ret != 0) {