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nvethernetrm: Add mgbe MMC stats support

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Bug 200565915

Change-Id: I8e14f47c050d8f1db196ddbaaab8a7e99f6eeb27
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2258485
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
This commit is contained in:
Bhadram Varka
2020-02-10 10:29:01 +05:30
parent fea2d5c4af
commit e38528fc23
3 changed files with 768 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
osi/core/mgbe_core.c
View File

@@ -27,6 +27,7 @@
#include "mgbe_core.h"
#include "core_local.h"
#include "xpcs.h"
#include "mgbe_mmc.h"
/**
* @brief mgbe_poll_for_swr - Poll for software reset (SWR bit in DMA Mode)
@@ -1077,8 +1078,8 @@ void mgbe_init_core_ops(struct core_ops *ops)
ops->adjust_mactime = OSI_NULL,
ops->config_tscr = OSI_NULL;
ops->config_ssir = OSI_NULL;
ops->read_mmc = OSI_NULL;
ops->reset_mmc = OSI_NULL;
ops->write_phy_reg = mgbe_write_phy_reg;
ops->read_phy_reg = mgbe_read_phy_reg;
ops->read_mmc = mgbe_read_mmc;
ops->reset_mmc = mgbe_reset_mmc;
};

529
osi/core/mgbe_mmc.c Normal file
View File

@@ -0,0 +1,529 @@
/*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "../osi/common/common.h"
#include <osi_common.h>
#include <osi_core.h>
#include "mgbe_mmc.h"
#include "mgbe_core.h"
/**
* @brief update_mmc_val - function to read register and return value to callee
*
* Algorithm: Read the registers, check for boundary, if more, reset
* counters else return same to caller.
*
* @param[in] osi_core: OSI core private data structure.
* @param[in] last_value: previous value of stats variable.
* @param[in] offset: HW register offset
*
* @note
* 1) MAC should be init and started. see osi_start_mac()
* 2) osi_core->osd should be populated
*
* @retval 0 on MMC counters overflow
* @retval value on current MMC counter value.
*/
static inline unsigned long update_mmc_val(struct osi_core_priv_data *osi_core,
unsigned long last_value,
unsigned long offset)
{
unsigned long temp;
unsigned int value = osi_readl((unsigned char *)osi_core->base +
offset);
temp = last_value + value;
if (temp < last_value) {
OSI_CORE_ERR(osi_core->osd,
OSI_LOG_ARG_OUTOFBOUND,
"Value overflow resetting all counters\n",
(unsigned long long)offset);
mgbe_reset_mmc(osi_core);
} else {
return temp;
}
return 0;
}
/**
* @brief mgbe_reset_mmc - To reset MMC registers and ether_mmc_counter
* structure variable
*
* @param[in] osi_core: OSI core private data structure.
*
* @note
* 1) MAC should be init and started. see osi_start_mac()
* 2) osi_core->osd should be populated
*/
void mgbe_reset_mmc(struct osi_core_priv_data *osi_core)
{
unsigned int value;
value = osi_readl((unsigned char *)osi_core->base + MGBE_MMC_CNTRL);
/* self-clear bit in one clock cycle */
value |= MGBE_MMC_CNTRL_CNTRST;
osi_writel(value, (unsigned char *)osi_core->base + MGBE_MMC_CNTRL);
osi_memset(&osi_core->mmc, 0U, sizeof(struct osi_mmc_counters));
}
/**
* @brief mgbe_read_mmc - To read MMC registers and ether_mmc_counter structure
* variable
*
* Algorithm: Pass register offset and old value to helper function and
* update structure.
*
* @param[in] osi_core: OSI core private data structure.
*
* @note
* 1) MAC should be init and started. see osi_start_mac()
* 2) osi_core->osd should be populated
*/
void mgbe_read_mmc(struct osi_core_priv_data *osi_core)
{
struct osi_mmc_counters *mmc = &osi_core->mmc;
mmc->mmc_tx_octetcount_gb =
update_mmc_val(osi_core, mmc->mmc_tx_octetcount_gb,
MMC_TXOCTETCOUNT_GB_L);
mmc->mmc_tx_octetcount_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_octetcount_gb_h,
MMC_TXOCTETCOUNT_GB_H);
mmc->mmc_tx_framecount_gb =
update_mmc_val(osi_core, mmc->mmc_tx_framecount_gb,
MMC_TXPACKETCOUNT_GB_L);
mmc->mmc_tx_framecount_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_framecount_gb_h,
MMC_TXPACKETCOUNT_GB_H);
mmc->mmc_tx_broadcastframe_g =
update_mmc_val(osi_core, mmc->mmc_tx_broadcastframe_g,
MMC_TXBROADCASTPACKETS_G_L);
mmc->mmc_tx_broadcastframe_g_h =
update_mmc_val(osi_core, mmc->mmc_tx_broadcastframe_g_h,
MMC_TXBROADCASTPACKETS_G_H);
mmc->mmc_tx_multicastframe_g =
update_mmc_val(osi_core, mmc->mmc_tx_multicastframe_g,
MMC_TXMULTICASTPACKETS_G_L);
mmc->mmc_tx_multicastframe_g_h =
update_mmc_val(osi_core, mmc->mmc_tx_multicastframe_g_h,
MMC_TXMULTICASTPACKETS_G_H);
mmc->mmc_tx_64_octets_gb =
update_mmc_val(osi_core, mmc->mmc_tx_64_octets_gb,
MMC_TX64OCTETS_GB_L);
mmc->mmc_tx_64_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_64_octets_gb_h,
MMC_TX64OCTETS_GB_H);
mmc->mmc_tx_65_to_127_octets_gb =
update_mmc_val(osi_core, mmc->mmc_tx_65_to_127_octets_gb,
MMC_TX65TO127OCTETS_GB_L);
mmc->mmc_tx_65_to_127_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_65_to_127_octets_gb_h,
MMC_TX65TO127OCTETS_GB_H);
mmc->mmc_tx_128_to_255_octets_gb =
update_mmc_val(osi_core, mmc->mmc_tx_128_to_255_octets_gb,
MMC_TX128TO255OCTETS_GB_L);
mmc->mmc_tx_128_to_255_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_128_to_255_octets_gb_h,
MMC_TX128TO255OCTETS_GB_H);
mmc->mmc_tx_256_to_511_octets_gb =
update_mmc_val(osi_core, mmc->mmc_tx_256_to_511_octets_gb,
MMC_TX256TO511OCTETS_GB_L);
mmc->mmc_tx_256_to_511_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_256_to_511_octets_gb_h,
MMC_TX256TO511OCTETS_GB_H);
mmc->mmc_tx_512_to_1023_octets_gb =
update_mmc_val(osi_core, mmc->mmc_tx_512_to_1023_octets_gb,
MMC_TX512TO1023OCTETS_GB_L);
mmc->mmc_tx_512_to_1023_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_512_to_1023_octets_gb_h,
MMC_TX512TO1023OCTETS_GB_H);
mmc->mmc_tx_1024_to_max_octets_gb =
update_mmc_val(osi_core, mmc->mmc_tx_1024_to_max_octets_gb,
MMC_TX1024TOMAXOCTETS_GB_L);
mmc->mmc_tx_1024_to_max_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_1024_to_max_octets_gb_h,
MMC_TX1024TOMAXOCTETS_GB_H);
mmc->mmc_tx_unicast_gb =
update_mmc_val(osi_core, mmc->mmc_tx_unicast_gb,
MMC_TXUNICASTPACKETS_GB_L);
mmc->mmc_tx_unicast_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_unicast_gb_h,
MMC_TXUNICASTPACKETS_GB_H);
mmc->mmc_tx_multicast_gb =
update_mmc_val(osi_core, mmc->mmc_tx_multicast_gb,
MMC_TXMULTICASTPACKETS_GB_L);
mmc->mmc_tx_multicast_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_multicast_gb_h,
MMC_TXMULTICASTPACKETS_GB_H);
mmc->mmc_tx_broadcast_gb =
update_mmc_val(osi_core, mmc->mmc_tx_broadcast_gb,
MMC_TXBROADCASTPACKETS_GB_L);
mmc->mmc_tx_broadcast_gb_h =
update_mmc_val(osi_core, mmc->mmc_tx_broadcast_gb_h,
MMC_TXBROADCASTPACKETS_GB_H);
mmc->mmc_tx_underflow_error =
update_mmc_val(osi_core, mmc->mmc_tx_underflow_error,
MMC_TXUNDERFLOWERROR_L);
mmc->mmc_tx_underflow_error_h =
update_mmc_val(osi_core, mmc->mmc_tx_underflow_error_h,
MMC_TXUNDERFLOWERROR_H);
mmc->mmc_tx_singlecol_g =
update_mmc_val(osi_core, mmc->mmc_tx_singlecol_g,
MMC_TXSINGLECOL_G);
mmc->mmc_tx_multicol_g =
update_mmc_val(osi_core, mmc->mmc_tx_multicol_g,
MMC_TXMULTICOL_G);
mmc->mmc_tx_deferred =
update_mmc_val(osi_core, mmc->mmc_tx_deferred,
MMC_TXDEFERRED);
mmc->mmc_tx_latecol =
update_mmc_val(osi_core, mmc->mmc_tx_latecol,
MMC_TXLATECOL);
mmc->mmc_tx_exesscol =
update_mmc_val(osi_core, mmc->mmc_tx_exesscol,
MMC_TXEXESSCOL);
mmc->mmc_tx_carrier_error =
update_mmc_val(osi_core, mmc->mmc_tx_carrier_error,
MMC_TXCARRIERERROR);
mmc->mmc_tx_octetcount_g =
update_mmc_val(osi_core, mmc->mmc_tx_octetcount_g,
MMC_TXOCTETCOUNT_G_L);
mmc->mmc_tx_octetcount_g_h =
update_mmc_val(osi_core, mmc->mmc_tx_octetcount_g_h,
MMC_TXOCTETCOUNT_G_H);
mmc->mmc_tx_framecount_g =
update_mmc_val(osi_core, mmc->mmc_tx_framecount_g,
MMC_TXPACKETSCOUNT_G_L);
mmc->mmc_tx_framecount_g_h =
update_mmc_val(osi_core, mmc->mmc_tx_framecount_g_h,
MMC_TXPACKETSCOUNT_G_H);
mmc->mmc_tx_excessdef =
update_mmc_val(osi_core, mmc->mmc_tx_excessdef,
MMC_TXEXECESS_DEFERRED);
mmc->mmc_tx_pause_frame =
update_mmc_val(osi_core, mmc->mmc_tx_pause_frame,
MMC_TXPAUSEPACKETS_L);
mmc->mmc_tx_pause_frame_h =
update_mmc_val(osi_core, mmc->mmc_tx_pause_frame_h,
MMC_TXPAUSEPACKETS_H);
mmc->mmc_tx_vlan_frame_g =
update_mmc_val(osi_core, mmc->mmc_tx_vlan_frame_g,
MMC_TXVLANPACKETS_G_L);
mmc->mmc_tx_vlan_frame_g_h =
update_mmc_val(osi_core, mmc->mmc_tx_vlan_frame_g_h,
MMC_TXVLANPACKETS_G_H);
mmc->mmc_rx_framecount_gb =
update_mmc_val(osi_core, mmc->mmc_rx_framecount_gb,
MMC_RXPACKETCOUNT_GB_L);
mmc->mmc_rx_framecount_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_framecount_gb_h,
MMC_RXPACKETCOUNT_GB_H);
mmc->mmc_rx_octetcount_gb =
update_mmc_val(osi_core, mmc->mmc_rx_octetcount_gb,
MMC_RXOCTETCOUNT_GB_L);
mmc->mmc_rx_octetcount_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_octetcount_gb_h,
MMC_RXOCTETCOUNT_GB_H);
mmc->mmc_rx_octetcount_g =
update_mmc_val(osi_core, mmc->mmc_rx_octetcount_g,
MMC_RXOCTETCOUNT_G_L);
mmc->mmc_rx_octetcount_g_h =
update_mmc_val(osi_core, mmc->mmc_rx_octetcount_g_h,
MMC_RXOCTETCOUNT_G_H);
mmc->mmc_rx_broadcastframe_g =
update_mmc_val(osi_core, mmc->mmc_rx_broadcastframe_g,
MMC_RXBROADCASTPACKETS_G_L);
mmc->mmc_rx_broadcastframe_g_h =
update_mmc_val(osi_core, mmc->mmc_rx_broadcastframe_g_h,
MMC_RXBROADCASTPACKETS_G_H);
mmc->mmc_rx_multicastframe_g =
update_mmc_val(osi_core, mmc->mmc_rx_multicastframe_g,
MMC_RXMULTICASTPACKETS_G_L);
mmc->mmc_rx_multicastframe_g_h =
update_mmc_val(osi_core, mmc->mmc_rx_multicastframe_g_h,
MMC_RXMULTICASTPACKETS_G_H);
mmc->mmc_rx_crc_error =
update_mmc_val(osi_core, mmc->mmc_rx_crc_error,
MMC_RXCRCERROR_L);
mmc->mmc_rx_crc_error_h =
update_mmc_val(osi_core, mmc->mmc_rx_crc_error_h,
MMC_RXCRCERROR_H);
mmc->mmc_rx_align_error =
update_mmc_val(osi_core, mmc->mmc_rx_align_error,
MMC_RXALIGNMENTERROR);
mmc->mmc_rx_runt_error =
update_mmc_val(osi_core, mmc->mmc_rx_runt_error,
MMC_RXRUNTERROR);
mmc->mmc_rx_jabber_error =
update_mmc_val(osi_core, mmc->mmc_rx_jabber_error,
MMC_RXJABBERERROR);
mmc->mmc_rx_undersize_g =
update_mmc_val(osi_core, mmc->mmc_rx_undersize_g,
MMC_RXUNDERSIZE_G);
mmc->mmc_rx_oversize_g =
update_mmc_val(osi_core, mmc->mmc_rx_oversize_g,
MMC_RXOVERSIZE_G);
mmc->mmc_rx_64_octets_gb =
update_mmc_val(osi_core, mmc->mmc_rx_64_octets_gb,
MMC_RX64OCTETS_GB_L);
mmc->mmc_rx_64_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_64_octets_gb_h,
MMC_RX64OCTETS_GB_H);
mmc->mmc_rx_65_to_127_octets_gb =
update_mmc_val(osi_core, mmc->mmc_rx_65_to_127_octets_gb,
MMC_RX65TO127OCTETS_GB_L);
mmc->mmc_rx_65_to_127_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_65_to_127_octets_gb_h,
MMC_RX65TO127OCTETS_GB_H);
mmc->mmc_rx_128_to_255_octets_gb =
update_mmc_val(osi_core, mmc->mmc_rx_128_to_255_octets_gb,
MMC_RX128TO255OCTETS_GB_L);
mmc->mmc_rx_128_to_255_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_128_to_255_octets_gb_h,
MMC_RX128TO255OCTETS_GB_H);
mmc->mmc_rx_256_to_511_octets_gb =
update_mmc_val(osi_core, mmc->mmc_rx_256_to_511_octets_gb,
MMC_RX256TO511OCTETS_GB_L);
mmc->mmc_rx_256_to_511_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_256_to_511_octets_gb_h,
MMC_RX256TO511OCTETS_GB_H);
mmc->mmc_rx_512_to_1023_octets_gb =
update_mmc_val(osi_core, mmc->mmc_rx_512_to_1023_octets_gb,
MMC_RX512TO1023OCTETS_GB_L);
mmc->mmc_rx_512_to_1023_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_512_to_1023_octets_gb_h,
MMC_RX512TO1023OCTETS_GB_H);
mmc->mmc_rx_1024_to_max_octets_gb =
update_mmc_val(osi_core, mmc->mmc_rx_1024_to_max_octets_gb,
MMC_RX1024TOMAXOCTETS_GB_L);
mmc->mmc_rx_1024_to_max_octets_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_1024_to_max_octets_gb_h,
MMC_RX1024TOMAXOCTETS_GB_H);
mmc->mmc_rx_unicast_g =
update_mmc_val(osi_core, mmc->mmc_rx_unicast_g,
MMC_RXUNICASTPACKETS_G_L);
mmc->mmc_rx_unicast_g_h =
update_mmc_val(osi_core, mmc->mmc_rx_unicast_g_h,
MMC_RXUNICASTPACKETS_G_H);
mmc->mmc_rx_length_error =
update_mmc_val(osi_core, mmc->mmc_rx_length_error,
MMC_RXLENGTHERROR_L);
mmc->mmc_rx_length_error_h =
update_mmc_val(osi_core, mmc->mmc_rx_length_error_h,
MMC_RXLENGTHERROR_H);
mmc->mmc_rx_outofrangetype =
update_mmc_val(osi_core, mmc->mmc_rx_outofrangetype,
MMC_RXOUTOFRANGETYPE_L);
mmc->mmc_rx_outofrangetype_h =
update_mmc_val(osi_core, mmc->mmc_rx_outofrangetype_h,
MMC_RXOUTOFRANGETYPE_H);
mmc->mmc_rx_pause_frames =
update_mmc_val(osi_core, mmc->mmc_rx_pause_frames,
MMC_RXPAUSEPACKETS_L);
mmc->mmc_rx_pause_frames_h =
update_mmc_val(osi_core, mmc->mmc_rx_pause_frames_h,
MMC_RXPAUSEPACKETS_H);
mmc->mmc_rx_fifo_overflow =
update_mmc_val(osi_core, mmc->mmc_rx_fifo_overflow,
MMC_RXFIFOOVERFLOW_L);
mmc->mmc_rx_fifo_overflow_h =
update_mmc_val(osi_core, mmc->mmc_rx_fifo_overflow_h,
MMC_RXFIFOOVERFLOW_H);
mmc->mmc_rx_vlan_frames_gb =
update_mmc_val(osi_core, mmc->mmc_rx_vlan_frames_gb,
MMC_RXVLANPACKETS_GB_L);
mmc->mmc_rx_vlan_frames_gb_h =
update_mmc_val(osi_core, mmc->mmc_rx_vlan_frames_gb_h,
MMC_RXVLANPACKETS_GB_H);
mmc->mmc_rx_watchdog_error =
update_mmc_val(osi_core, mmc->mmc_rx_watchdog_error,
MMC_RXWATCHDOGERROR);
mmc->mmc_rx_ipv4_gd =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_gd,
MMC_RXIPV4_GD_PKTS_L);
mmc->mmc_rx_ipv4_gd_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_gd_h,
MMC_RXIPV4_GD_PKTS_H);
mmc->mmc_rx_ipv4_hderr =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_hderr,
MMC_RXIPV4_HDRERR_PKTS_L);
mmc->mmc_rx_ipv4_hderr_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_hderr_h,
MMC_RXIPV4_HDRERR_PKTS_H);
mmc->mmc_rx_ipv4_nopay =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_nopay,
MMC_RXIPV4_NOPAY_PKTS_L);
mmc->mmc_rx_ipv4_nopay_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_nopay_h,
MMC_RXIPV4_NOPAY_PKTS_H);
mmc->mmc_rx_ipv4_frag =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_frag,
MMC_RXIPV4_FRAG_PKTS_L);
mmc->mmc_rx_ipv4_frag_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_frag_h,
MMC_RXIPV4_FRAG_PKTS_H);
mmc->mmc_rx_ipv4_udsbl =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_udsbl,
MMC_RXIPV4_UBSBL_PKTS_L);
mmc->mmc_rx_ipv4_udsbl_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_udsbl_h,
MMC_RXIPV4_UBSBL_PKTS_H);
mmc->mmc_rx_ipv6_gd =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_gd,
MMC_RXIPV6_GD_PKTS_L);
mmc->mmc_rx_ipv6_gd_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_gd_h,
MMC_RXIPV6_GD_PKTS_H);
mmc->mmc_rx_ipv6_hderr =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_hderr,
MMC_RXIPV6_HDRERR_PKTS_L);
mmc->mmc_rx_ipv6_hderr_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_hderr_h,
MMC_RXIPV6_HDRERR_PKTS_H);
mmc->mmc_rx_ipv6_nopay =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_nopay,
MMC_RXIPV6_NOPAY_PKTS_L);
mmc->mmc_rx_ipv6_nopay_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_nopay_h,
MMC_RXIPV6_NOPAY_PKTS_H);
mmc->mmc_rx_udp_gd =
update_mmc_val(osi_core, mmc->mmc_rx_udp_gd,
MMC_RXUDP_GD_PKTS_L);
mmc->mmc_rx_udp_gd_h =
update_mmc_val(osi_core, mmc->mmc_rx_udp_gd_h,
MMC_RXUDP_GD_PKTS_H);
mmc->mmc_rx_udp_err =
update_mmc_val(osi_core, mmc->mmc_rx_udp_err,
MMC_RXUDP_ERR_PKTS_L);
mmc->mmc_rx_udp_err_h =
update_mmc_val(osi_core, mmc->mmc_rx_udp_err_h,
MMC_RXUDP_ERR_PKTS_H);
mmc->mmc_rx_tcp_gd =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_gd,
MMC_RXTCP_GD_PKTS_L);
mmc->mmc_rx_tcp_gd_h =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_gd_h,
MMC_RXTCP_GD_PKTS_H);
mmc->mmc_rx_tcp_err =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_err,
MMC_RXTCP_ERR_PKTS_L);
mmc->mmc_rx_tcp_err_h =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_err_h,
MMC_RXTCP_ERR_PKTS_H);
mmc->mmc_rx_icmp_gd =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_gd,
MMC_RXICMP_GD_PKTS_L);
mmc->mmc_rx_icmp_gd_h =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_gd_h,
MMC_RXICMP_GD_PKTS_H);
mmc->mmc_rx_icmp_err =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_err,
MMC_RXICMP_ERR_PKTS_L);
mmc->mmc_rx_icmp_err_h =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_err_h,
MMC_RXICMP_ERR_PKTS_H);
mmc->mmc_rx_ipv4_gd_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_gd_octets,
MMC_RXIPV4_GD_OCTETS_L);
mmc->mmc_rx_ipv4_gd_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_gd_octets_h,
MMC_RXIPV4_GD_OCTETS_H);
mmc->mmc_rx_ipv4_hderr_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_hderr_octets,
MMC_RXIPV4_HDRERR_OCTETS_L);
mmc->mmc_rx_ipv4_hderr_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_hderr_octets_h,
MMC_RXIPV4_HDRERR_OCTETS_H);
mmc->mmc_rx_ipv4_nopay_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_nopay_octets,
MMC_RXIPV4_NOPAY_OCTETS_L);
mmc->mmc_rx_ipv4_nopay_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_nopay_octets_h,
MMC_RXIPV4_NOPAY_OCTETS_H);
mmc->mmc_rx_ipv4_frag_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_frag_octets,
MMC_RXIPV4_FRAG_OCTETS_L);
mmc->mmc_rx_ipv4_frag_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_frag_octets_h,
MMC_RXIPV4_FRAG_OCTETS_H);
mmc->mmc_rx_ipv4_udsbl_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_udsbl_octets,
MMC_RXIPV4_UDP_CHKSM_DIS_OCT_L);
mmc->mmc_rx_ipv4_udsbl_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv4_udsbl_octets_h,
MMC_RXIPV4_UDP_CHKSM_DIS_OCT_H);
mmc->mmc_rx_udp_gd_octets =
update_mmc_val(osi_core, mmc->mmc_rx_udp_gd_octets,
MMC_RXUDP_GD_OCTETS_L);
mmc->mmc_rx_udp_gd_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_udp_gd_octets_h,
MMC_RXUDP_GD_OCTETS_H);
mmc->mmc_rx_ipv6_gd_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_gd_octets,
MMC_RXIPV6_GD_OCTETS_L);
mmc->mmc_rx_ipv6_gd_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_gd_octets_h,
MMC_RXIPV6_GD_OCTETS_H);
mmc->mmc_rx_ipv6_hderr_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_hderr_octets,
MMC_RXIPV6_HDRERR_OCTETS_L);
mmc->mmc_rx_ipv6_hderr_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_hderr_octets_h,
MMC_RXIPV6_HDRERR_OCTETS_H);
mmc->mmc_rx_ipv6_nopay_octets =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_nopay_octets,
MMC_RXIPV6_NOPAY_OCTETS_L);
mmc->mmc_rx_ipv6_nopay_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_ipv6_nopay_octets_h,
MMC_RXIPV6_NOPAY_OCTETS_H);
mmc->mmc_rx_udp_err_octets =
update_mmc_val(osi_core, mmc->mmc_rx_udp_err_octets,
MMC_RXUDP_ERR_OCTETS_L);
mmc->mmc_rx_udp_err_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_udp_err_octets_h,
MMC_RXUDP_ERR_OCTETS_H);
mmc->mmc_rx_tcp_gd_octets =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_gd_octets,
MMC_RXTCP_GD_OCTETS_L);
mmc->mmc_rx_tcp_gd_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_gd_octets_h,
MMC_RXTCP_GD_OCTETS_H);
mmc->mmc_rx_tcp_err_octets =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_err_octets,
MMC_RXTCP_ERR_OCTETS_L);
mmc->mmc_rx_tcp_err_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_tcp_err_octets_h,
MMC_RXTCP_ERR_OCTETS_H);
mmc->mmc_rx_icmp_gd_octets =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_gd_octets,
MMC_RXICMP_GD_OCTETS_L);
mmc->mmc_rx_icmp_gd_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_gd_octets_h,
MMC_RXICMP_GD_OCTETS_H);
mmc->mmc_rx_icmp_err_octets =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_err_octets,
MMC_RXICMP_ERR_OCTETS_L);
mmc->mmc_rx_icmp_err_octets_h =
update_mmc_val(osi_core, mmc->mmc_rx_icmp_err_octets_h,
MMC_RXICMP_ERR_OCTETS_H);
}

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osi/core/mgbe_mmc.h Normal file
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/*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef MGBE_MMC_H_
#define MGBE_MMC_H_
/**
* @addtogroup MGBE-MMC MMC HW register offsets
*
* @brief MMC HW register offsets
* @{
*/
#define MMC_TXOCTETCOUNT_GB_L 0x00814
#define MMC_TXOCTETCOUNT_GB_H 0x00818
#define MMC_TXPACKETCOUNT_GB_L 0x0081C
#define MMC_TXPACKETCOUNT_GB_H 0x00820
#define MMC_TXBROADCASTPACKETS_G_L 0x00824
#define MMC_TXBROADCASTPACKETS_G_H 0x00828
#define MMC_TXMULTICASTPACKETS_G_L 0x0082C
#define MMC_TXMULTICASTPACKETS_G_H 0x00830
#define MMC_TX64OCTETS_GB_L 0x00834
#define MMC_TX64OCTETS_GB_H 0x00838
#define MMC_TX65TO127OCTETS_GB_L 0x0083C
#define MMC_TX65TO127OCTETS_GB_H 0x00840
#define MMC_TX128TO255OCTETS_GB_L 0x00844
#define MMC_TX128TO255OCTETS_GB_H 0x00848
#define MMC_TX256TO511OCTETS_GB_L 0x0084C
#define MMC_TX256TO511OCTETS_GB_H 0x00850
#define MMC_TX512TO1023OCTETS_GB_L 0x00854
#define MMC_TX512TO1023OCTETS_GB_H 0x00858
#define MMC_TX1024TOMAXOCTETS_GB_L 0x0085C
#define MMC_TX1024TOMAXOCTETS_GB_H 0x00860
#define MMC_TXUNICASTPACKETS_GB_L 0x00864
#define MMC_TXUNICASTPACKETS_GB_H 0x00868
#define MMC_TXMULTICASTPACKETS_GB_L 0x0086C
#define MMC_TXMULTICASTPACKETS_GB_H 0x00870
#define MMC_TXBROADCASTPACKETS_GB_L 0x00874
#define MMC_TXBROADCASTPACKETS_GB_H 0x00878
#define MMC_TXUNDERFLOWERROR_L 0x0087C
#define MMC_TXUNDERFLOWERROR_H 0x00880
#define MMC_TXOCTETCOUNT_G_L 0x00884
#define MMC_TXOCTETCOUNT_G_H 0x00888
#define MMC_TXPACKETSCOUNT_G_L 0x0088C
#define MMC_TXPACKETSCOUNT_G_H 0x00890
#define MMC_TXPAUSEPACKETS_L 0x00894
#define MMC_TXPAUSEPACKETS_H 0x00898
#define MMC_TXVLANPACKETS_G_L 0x0089C
#define MMC_TXVLANPACKETS_G_H 0x008A0
#define MMC_TXLPIUSECCNTR 0x008A4
#define MMC_TXLPITRANCNTR 0x008A8
#define MMC_PRIO_INT_STATUS 0x008CC
#define MMC_TX_PER_PRIO_STATUS 0x008D0
#define MMC_TX_PER_PRIO_PKT_GB 0x008D4
#define MMC_TX_PER_PRIO_PFC_PKT_GB 0x008D8
#define MMC_TX_PER_PRIO_GPFC_PKT_GB 0x008DC
#define MMC_TX_PER_PRIO_OCTET_GB_L 0x008E0
#define MMC_TX_PER_PRIO_OCTET_GB_H 0x008E4
#define MMC_RXPACKETCOUNT_GB_L 0x00900
#define MMC_RXPACKETCOUNT_GB_H 0x00904
#define MMC_RXOCTETCOUNT_GB_L 0x00908
#define MMC_RXOCTETCOUNT_GB_H 0x0090C
#define MMC_RXOCTETCOUNT_G_L 0x00910
#define MMC_RXOCTETCOUNT_G_H 0x00914
#define MMC_RXBROADCASTPACKETS_G_L 0x00918
#define MMC_RXBROADCASTPACKETS_G_H 0x0091C
#define MMC_RXMULTICASTPACKETS_G_L 0x00920
#define MMC_RXMULTICASTPACKETS_G_H 0x00924
#define MMC_RXCRCERROR_L 0x00928
#define MMC_RXCRCERROR_H 0x0092C
#define MMC_RXRUNTERROR 0x00930
#define MMC_RXJABBERERROR 0x00934
#define MMC_RXUNDERSIZE_G 0x00938
#define MMC_RXOVERSIZE_G 0x0093C
#define MMC_RX64OCTETS_GB_L 0x00940
#define MMC_RX64OCTETS_GB_H 0x00944
#define MMC_RX65TO127OCTETS_GB_L 0x00948
#define MMC_RX65TO127OCTETS_GB_H 0x0094C
#define MMC_RX128TO255OCTETS_GB_L 0x00950
#define MMC_RX128TO255OCTETS_GB_H 0x00954
#define MMC_RX256TO511OCTETS_GB_L 0x00958
#define MMC_RX256TO511OCTETS_GB_H 0x0095C
#define MMC_RX512TO1023OCTETS_GB_L 0x00960
#define MMC_RX512TO1023OCTETS_GB_H 0x00964
#define MMC_RX1024TOMAXOCTETS_GB_L 0x00968
#define MMC_RX1024TOMAXOCTETS_GB_H 0x0096C
#define MMC_RXUNICASTPACKETS_G_L 0x00970
#define MMC_RXUNICASTPACKETS_G_H 0x00974
#define MMC_RXLENGTHERROR_L 0x00978
#define MMC_RXLENGTHERROR_H 0x0097C
#define MMC_RXOUTOFRANGETYPE_L 0x00980
#define MMC_RXOUTOFRANGETYPE_H 0x00984
#define MMC_RXPAUSEPACKETS_L 0x00988
#define MMC_RXPAUSEPACKETS_H 0x0098C
#define MMC_RXFIFOOVERFLOW_L 0x00990
#define MMC_RXFIFOOVERFLOW_H 0x00994
#define MMC_RXVLANPACKETS_GB_L 0x00998
#define MMC_RXVLANPACKETS_GB_H 0x0099C
#define MMC_RXWATCHDOGERROR 0x009A0
#define MMC_RXLPIUSECCNTR 0x009A4
#define MMC_RXLPITRANCNTR 0x009A8
#define MMC_RX_DISCARD_PKTS_GB_L 0x009AC
#define MMC_RX_DISCARD_PKTS_GB_H 0x009B0
#define MMC_RX_DISCARD_OCTET_GB_L 0x009B4
#define MMC_RX_DISCARD_OCTET_GB_H 0x009B8
#define MMC_RXALIGNMENTERROR 0x009BC
#define MMC_RX_PER_PRIO_STATUS 0x009D0
#define MMC_RX_PER_PRIO_PKT_GB 0x009D4
#define MMC_RX_PER_PRIO_PKT_B 0x009D8
#define MMC_RX_PER_PRIO_PFC_PKT_GB 0x009DC
#define MMC_RX_PER_PRIO_OCTET_GB_L 0x009E0
#define MMC_RX_PER_PRIO_OCTET_GB_H 0x009E4
#define MMC_RX_PER_PRIO_DISCARD_GB 0x009E8
#define MMC_FPE_TX_INT 0x00A00
#define MMC_FPE_TX_INT_MASK 0x00A04
#define MMC_TX_FPE_FRAG_COUNTER 0x00A08
#define MMC_TX_HOLD_REQ_COUNTER 0x00A0C
#define MMC_FPE_RX_INT 0x00A20
#define MMC_FPE_RX_INT_MASK 0x00A24
#define MMC_RX_PKT_ASSEMBLY_ERR_CNTR 0x00A28
#define MMC_RX_PKT_SMD_ERR_CNTR 0x00A2C
#define MMC_RX_PKT_ASSEMBLY_OK_CNTR 0x00A30
#define MMC_RX_FPE_FRAG_CNTR 0x00A34
#define MMC_TXSINGLECOL_G 0x00A40
#define MMC_TXMULTICOL_G 0x00A44
#define MMC_TXDEFERRED 0x00A48
#define MMC_TXLATECOL 0x00A4C
#define MMC_TXEXESSCOL 0x00A50
#define MMC_TXCARRIERERROR 0x00A54
#define MMC_TXEXECESS_DEFERRED 0x00A58
#define MMC_IPC_RX_INT_MASK 0x00A5C
#define MMC_IPC_RX_INT 0x00A60
#define MMC_RXIPV4_GD_PKTS_L 0x00A64
#define MMC_RXIPV4_GD_PKTS_H 0x00A68
#define MMC_RXIPV4_HDRERR_PKTS_L 0x00A6C
#define MMC_RXIPV4_HDRERR_PKTS_H 0x00A70
#define MMC_RXIPV4_NOPAY_PKTS_L 0x00A74
#define MMC_RXIPV4_NOPAY_PKTS_H 0x00A78
#define MMC_RXIPV4_FRAG_PKTS_L 0x00A7C
#define MMC_RXIPV4_FRAG_PKTS_H 0x00A80
#define MMC_RXIPV4_UBSBL_PKTS_L 0x00A84
#define MMC_RXIPV4_UBSBL_PKTS_H 0x00A88
#define MMC_RXIPV6_GD_PKTS_L 0x00A8C
#define MMC_RXIPV6_GD_PKTS_H 0x00A90
#define MMC_RXIPV6_HDRERR_PKTS_L 0x00A94
#define MMC_RXIPV6_HDRERR_PKTS_H 0x00A98
#define MMC_RXIPV6_NOPAY_PKTS_L 0x00A9C
#define MMC_RXIPV6_NOPAY_PKTS_H 0x00AA0
#define MMC_RXUDP_GD_PKTS_L 0x00AA4
#define MMC_RXUDP_GD_PKTS_H 0x00AA8
#define MMC_RXUDP_ERR_PKTS_L 0x00AAC
#define MMC_RXUDP_ERR_PKTS_H 0x00AB0
#define MMC_RXTCP_GD_PKTS_L 0x00AB4
#define MMC_RXTCP_GD_PKTS_H 0x00AB8
#define MMC_RXTCP_ERR_PKTS_L 0x00ABC
#define MMC_RXTCP_ERR_PKTS_H 0x00AC0
#define MMC_RXICMP_GD_PKTS_L 0x00AC4
#define MMC_RXICMP_GD_PKTS_H 0x00AC8
#define MMC_RXICMP_ERR_PKTS_L 0x00ACC
#define MMC_RXICMP_ERR_PKTS_H 0x00AD0
#define MMC_RXIPV4_GD_OCTETS_L 0x00AD4
#define MMC_RXIPV4_GD_OCTETS_H 0x00AD8
#define MMC_RXIPV4_HDRERR_OCTETS_L 0x00ADC
#define MMC_RXIPV4_HDRERR_OCTETS_H 0x00AE0
#define MMC_RXIPV4_NOPAY_OCTETS_L 0x00AE4
#define MMC_RXIPV4_NOPAY_OCTETS_H 0x00AE8
#define MMC_RXIPV4_FRAG_OCTETS_L 0x00AEC
#define MMC_RXIPV4_FRAG_OCTETS_H 0x00AF0
#define MMC_RXIPV4_UDP_CHKSM_DIS_OCT_L 0x00AF4
#define MMC_RXIPV4_UDP_CHKSM_DIS_OCT_H 0x00AF8
#define MMC_RXIPV6_GD_OCTETS_L 0x00AFC
#define MMC_RXIPV6_GD_OCTETS_H 0x00B00
#define MMC_RXIPV6_HDRERR_OCTETS_L 0x00B04
#define MMC_RXIPV6_HDRERR_OCTETS_H 0x00B08
#define MMC_RXIPV6_NOPAY_OCTETS_L 0x00B0C
#define MMC_RXIPV6_NOPAY_OCTETS_H 0x00B10
#define MMC_RXUDP_GD_OCTETS_L 0x00B14
#define MMC_RXUDP_GD_OCTETS_H 0x00B18
#define MMC_RXUDP_ERR_OCTETS_L 0x00B1C
#define MMC_RXUDP_ERR_OCTETS_H 0x00B20
#define MMC_RXTCP_GD_OCTETS_L 0x00B24
#define MMC_RXTCP_GD_OCTETS_H 0x00B28
#define MMC_RXTCP_ERR_OCTETS_L 0x00B2C
#define MMC_RXTCP_ERR_OCTETS_H 0x00B30
#define MMC_RXICMP_GD_OCTETS_L 0x00B34
#define MMC_RXICMP_GD_OCTETS_H 0x00B38
#define MMC_RXICMP_ERR_OCTETS_L 0x00B3C
#define MMC_RXICMP_ERR_OCTETS_H 0x00B40
/** @} */
/**
* @brief mgbe_read_mmc - To read MMC registers and ether_mmc_counter structure
* variable
*
* Algorithm: Pass register offset and old value to helper function and
* update structure.
*
* @param[in] osi_core: OSI core private data structure.
*
* @note
* 1) MAC should be init and started. see osi_start_mac()
* 2) osi_core->osd should be populated
*/
void mgbe_read_mmc(struct osi_core_priv_data *osi_core);
/**
* @brief mgbe_reset_mmc - To reset MMC registers and ether_mmc_counter
* structure variable
*
* @param[in] osi_core: OSI core private data structure.
*
* @note
* 1) MAC should be init and started. see osi_start_mac()
* 2) osi_core->osd should be populated
*/
void mgbe_reset_mmc(struct osi_core_priv_data *osi_core);
#endif