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git://nv-tegra.nvidia.com/kernel/nvethernetrm.git
synced 2025-12-24 10:34:24 +03:00
nvethernetrm: add support for EQOS VM interrupts
Adds VM IRQ handling support at OSI layer and adds
corresponding support for EQOS as well.
Need to pass below parameters from DT -
o Number of VM IRQ's assigned per OS/VM.
o Number of VM channels assigned to a VM IRQ.
o List of DMA channels assigned to a VM IRQ.
Below is the sample DT representation -
vm_irq_config: vm-irq-config {
nvidia,num-vm-irqs = <4>;
vm_irq1 {
nvidia,num-vm-channels = <2>;
nvidia,vm-channels = <0 1>;
};
vm_irq2 {
nvidia,num-vm-channels = <2>;
nvidia,vm-channels = <2 3>;
};
vm_irq3 {
nvidia,num-vm-channels = <2>;
nvidia,vm-channels = <4 5>;
};
vm_irq4 {
nvidia,num-vm-channels = <2>;
nvidia,vm-channels = <6 7>;
};
};
ethernet@<base_addr> {
[...]
nvidia,vm-irq-config = <&vm_irq_config>;
[...]
}
Bug 200546379
Change-Id: Id20780d573aa70baf42b003728ba416ed61832d2
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2250403
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2198595
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
@@ -212,8 +212,8 @@
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#define EQOS_MAX_MAC_ADDRESS_FILTER 128U
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#define EQOS_MAX_L3_L4_FILTER 8U
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#define EQOS_MAX_HTR_REGS 8U
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#define OSI_EQOS_MAX_NUM_CHANS 4U
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#define OSI_EQOS_MAX_NUM_QUEUES 4U
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#define OSI_EQOS_MAX_NUM_CHANS 8U
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#define OSI_EQOS_MAX_NUM_QUEUES 8U
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#define OSI_L2_FILTER_INDEX_ANY 127U
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#define OSI_CHAN_ANY 0xFFU
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@@ -238,6 +238,7 @@
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#define OSI_MAC_HW_EQOS 0U
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#define OSI_ETH_ALEN 6U
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#define OSI_MAX_VM_IRQS 5U
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#define BOOLEAN_FALSE (0U != 0U)
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#define OSI_NULL ((void *)0)
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