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osi: core: add m2m sync error detection and reporting

Browse Source 
Issue: New safety requirement to detect
and report M2M eqos sync error.

Fix: add support for error detection and
reporting.

Bug 4033627

Change-Id: I377b8f11a6518841e21fe9e1ab3682447b31138b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2875581
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Rakesh Goyal
2023-03-23 13:26:43 +05:30
committed by mobile promotions
parent b49b61a253
commit f3a4320760
3 changed files with 107 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
include/osi_core.h
View File

@@ -376,6 +376,7 @@ typedef my_lint_64 nvel64_t;
#define AUTONEG_ERR_IDX 5U #define AUTONEG_ERR_IDX 5U
#define XPCS_WRITE_FAIL_IDX 6U #define XPCS_WRITE_FAIL_IDX 6U
#define PHY_WRITE_VERIFY_FAIL_IDX 7U #define PHY_WRITE_VERIFY_FAIL_IDX 7U
#define MAC2MAC_ERR_IDX 8U
#define MACSEC_RX_CRC_ERR_IDX 0U #define MACSEC_RX_CRC_ERR_IDX 0U
#define MACSEC_TX_CRC_ERR_IDX 1U #define MACSEC_TX_CRC_ERR_IDX 1U
#define MACSEC_RX_ICV_ERR_IDX 2U #define MACSEC_RX_ICV_ERR_IDX 2U
@@ -402,7 +403,7 @@ typedef my_lint_64 nvel64_t;
* @brief Maximum number of different mac error code * @brief Maximum number of different mac error code
* HSI_SW_ERR_CODE + Two (Corrected and Uncorrected error code) * HSI_SW_ERR_CODE + Two (Corrected and Uncorrected error code)
*/ */
#define OSI_HSI_MAX_MAC_ERROR_CODE 8U #define OSI_HSI_MAX_MAC_ERROR_CODE 9U
/** /**
* @brief Maximum number of different macsec error code * @brief Maximum number of different macsec error code
@@ -425,6 +426,12 @@ typedef my_lint_64 nvel64_t;
#define OSI_MACSEC_REG_VIOL_ERR 0x1008U #define OSI_MACSEC_REG_VIOL_ERR 0x1008U
#define OSI_XPCS_WRITE_FAIL_ERR 0x1009U #define OSI_XPCS_WRITE_FAIL_ERR 0x1009U
#define OSI_PHY_WRITE_VERIFY_ERR 0x100AU #define OSI_PHY_WRITE_VERIFY_ERR 0x100AU
#define OSI_M2M_TSC_READ_ERR 0x100BU
#define OSI_M2M_TIME_CAL_ERR 0x100CU
#define OSI_M2M_ADJ_FREQ_ERR 0x100DU
#define OSI_M2M_ADJ_TIME_ERR 0x100EU
#define OSI_M2M_SET_TIME_ERR 0x100FU
#define OSI_M2M_CONFIG_PTP_ERR 0x1010U
#define OSI_HSI_MGBE0_UE_CODE 0x2A00U #define OSI_HSI_MGBE0_UE_CODE 0x2A00U
#define OSI_HSI_MGBE1_UE_CODE 0x2A01U #define OSI_HSI_MGBE1_UE_CODE 0x2A01U

9
osi/core/core_common.c
View File

@@ -1548,6 +1548,15 @@ nve32_t hsi_common_error_inject(struct osi_core_priv_data *osi_core,
osi_core->hsi.report_err = OSI_ENABLE; osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.report_count_err[XPCS_WRITE_FAIL_IDX] = OSI_ENABLE; osi_core->hsi.report_count_err[XPCS_WRITE_FAIL_IDX] = OSI_ENABLE;
break; break;
case OSI_M2M_TSC_READ_ERR:
case OSI_M2M_TIME_CAL_ERR:
case OSI_M2M_ADJ_FREQ_ERR:
case OSI_M2M_ADJ_TIME_ERR:
case OSI_M2M_SET_TIME_ERR:
case OSI_M2M_CONFIG_PTP_ERR:
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = error_code;
break;
default: default:
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
"Invalid error code\n", (nveu32_t)error_code); "Invalid error code\n", (nveu32_t)error_code);

96
osi/core/osi_hal.c
View File

@@ -1850,13 +1850,15 @@ done:
* @param[in] sec_osi_core: OSI core data structure for seconday interface. * @param[in] sec_osi_core: OSI core data structure for seconday interface.
* @param[out] primary_time: primary interface time pointer * @param[out] primary_time: primary interface time pointer
* @param[out] secondary_time: Secondary interface time pointer * @param[out] secondary_time: Secondary interface time pointer
* @param[out] return_error: return error value pointer
* *
* @retval calculated drift value * @retval calculated drift value
*/ */
static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_core, static inline nvel64_t drift_calculation(struct osi_core_priv_data *const osi_core,
struct osi_core_priv_data *const sec_osi_core, struct osi_core_priv_data *const sec_osi_core,
nvel64_t *primary_time, nvel64_t *primary_time,
nvel64_t *secondary_time) nvel64_t *secondary_time,
nve32_t *return_error)
{ {
nve32_t ret; nve32_t ret;
nveu32_t sec = 0x0; nveu32_t sec = 0x0;
@@ -1874,6 +1876,10 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
if (ret != 0) { if (ret != 0) {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: TSC PTP capture failed for primary\n", 0ULL); "CORE: TSC PTP capture failed for primary\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TSC_READ_ERR;
#endif
goto fail; goto fail;
} }
@@ -1881,6 +1887,10 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
if (ret != 0) { if (ret != 0) {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: TSC PTP capture failed for secondary\n", 0ULL); "CORE: TSC PTP capture failed for secondary\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TSC_READ_ERR;
#endif
goto fail; goto fail;
} }
@@ -1893,6 +1903,11 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
} else { } else {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: Negative primary PTP time\n", 0ULL); "CORE: Negative primary PTP time\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TIME_CAL_ERR;
#endif
ret = -1;
goto fail; goto fail;
} }
@@ -1908,6 +1923,11 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
} else { } else {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: Negative secondary PTP time\n", 0ULL); "CORE: Negative secondary PTP time\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TIME_CAL_ERR;
#endif
ret = -1;
goto fail; goto fail;
} }
@@ -1918,6 +1938,11 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
} else { } else {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: sec time crossing limit\n", 0ULL); "CORE: sec time crossing limit\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TIME_CAL_ERR;
#endif
ret = -1;
goto fail; goto fail;
} }
} else if (time1 >= time2) { } else if (time1 >= time2) {
@@ -1927,11 +1952,17 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
} else { } else {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: sec time crossing limit\n", 0ULL); "CORE: sec time crossing limit\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TIME_CAL_ERR;
#endif
ret = -1;
goto fail; goto fail;
} }
} else { } else {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: wrong drift\n", 0ULL); "CORE: wrong drift\n", 0ULL);
ret = -1;
goto fail; goto fail;
} }
/* 0 is lowest possible valid time value which represent /* 0 is lowest possible valid time value which represent
@@ -1942,10 +1973,16 @@ static inline nvel64_t dirft_calculation(struct osi_core_priv_data *const osi_co
} else { } else {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: negative time\n", 0ULL); "CORE: negative time\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_TIME_CAL_ERR;
#endif
ret = -1;
goto fail; goto fail;
} }
fail: fail:
*return_error = ret;
return val; return val;
} }
@@ -2600,6 +2637,11 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
if (ret < 0) { if (ret < 0) {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: adjust freq failed\n", 0ULL); "CORE: adjust freq failed\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] =
OSI_M2M_ADJ_FREQ_ERR;
#endif
break; break;
} }
@@ -2617,9 +2659,15 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
} }
if (l_core->ether_m2m_role == OSI_PTP_M2M_PRIMARY) { if (l_core->ether_m2m_role == OSI_PTP_M2M_PRIMARY) {
drift_value = dirft_calculation(osi_core, sec_osi_core, drift_value = drift_calculation(osi_core, sec_osi_core,
&primary_time, &primary_time,
&secondary_time); &secondary_time,
&ret);
if (ret != 0) {
ret = 0;
break;
}
secondary_osi_lcore->serv.const_i = I_COMPONENT_BY_10; secondary_osi_lcore->serv.const_i = I_COMPONENT_BY_10;
secondary_osi_lcore->serv.const_p = P_COMPONENT_BY_10; secondary_osi_lcore->serv.const_p = P_COMPONENT_BY_10;
@@ -2634,6 +2682,11 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: adjust_time failed\n", "CORE: adjust_time failed\n",
0ULL); 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] =
OSI_M2M_ADJ_TIME_ERR;
#endif
} else { } else {
ret = osi_adjust_freq(sec_osi_core, 0); ret = osi_adjust_freq(sec_osi_core, 0);
} }
@@ -2647,6 +2700,10 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: adjust_freq for sec_controller failed\n", "CORE: adjust_freq for sec_controller failed\n",
0ULL); 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_ADJ_FREQ_ERR;
#endif
ret = 0; ret = 0;
} }
@@ -2658,6 +2715,10 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
if (ret < 0) { if (ret < 0) {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: adjust_time failed\n", 0ULL); "CORE: adjust_time failed\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_ADJ_TIME_ERR;
#endif
break; break;
} }
@@ -2676,9 +2737,16 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
if (l_core->ether_m2m_role == OSI_PTP_M2M_PRIMARY) { if (l_core->ether_m2m_role == OSI_PTP_M2M_PRIMARY) {
drift_value = 0x0; drift_value = 0x0;
drift_value = dirft_calculation(osi_core, sec_osi_core, drift_value = drift_calculation(osi_core, sec_osi_core,
&primary_time, &primary_time,
&secondary_time); &secondary_time,
&ret);
if (ret != 0) {
ret = 0;
break;
}
ret = osi_adjust_time(sec_osi_core, drift_value); ret = osi_adjust_time(sec_osi_core, drift_value);
if (ret == 0) { if (ret == 0) {
secondary_osi_lcore->serv.count = SERVO_STATS_0; secondary_osi_lcore->serv.count = SERVO_STATS_0;
@@ -2692,6 +2760,10 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: adjust_time for sec_controller failed\n", "CORE: adjust_time for sec_controller failed\n",
0ULL); 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_ADJ_TIME_ERR;
#endif
ret = 0; ret = 0;
} }
@@ -2707,6 +2779,10 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
if (ret < 0) { if (ret < 0) {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: configure_ptp failed\n", 0ULL); "CORE: configure_ptp failed\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_CONFIG_PTP_ERR;
#endif
break; break;
} }
@@ -2747,6 +2823,10 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
if (ret < 0) { if (ret < 0) {
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: set systohw time failed\n", 0ULL); "CORE: set systohw time failed\n", 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_SET_TIME_ERR;
#endif
break; break;
} }
@@ -2780,6 +2860,10 @@ static nve32_t osi_hal_handle_ioctl(struct osi_core_priv_data *osi_core,
OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID, OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_INVALID,
"CORE: set_time for sec_controller failed\n", "CORE: set_time for sec_controller failed\n",
0ULL); 0ULL);
#ifdef HSI_SUPPORT
osi_core->hsi.report_err = OSI_ENABLE;
osi_core->hsi.err_code[MAC2MAC_ERR_IDX] = OSI_M2M_SET_TIME_ERR;
#endif
ret = 0; ret = 0;
} }