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osi: core: fix misra 4.6 rule

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===== DIFF ======
Total misra violation count changed by -240
Rule: MISRA_C-2012_Directive_4.6 Diff: -240
Rule: Total Diff: -240

Bug 3695218

Change-Id: Ida2d3a775872637eda3058ea361a00346c86f7f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767895
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Narayan Reddy
2022-08-27 21:55:06 +00:00
committed by mobile promotions
parent d31916e761
commit f816ebf1e8
20 changed files with 792 additions and 793 deletions
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12
include/mmc.h
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@@ -530,25 +530,25 @@ struct osi_mmc_counters {
nveu64_t mmc_rx_icmp_err_octets_h;
/** This counter provides the number of additional mPackets
* transmitted due to preemption */
unsigned long mmc_tx_fpe_frag_cnt;
nveu64_t mmc_tx_fpe_frag_cnt;
/** This counter provides the count of number of times a hold
* request is given to MAC */
unsigned long mmc_tx_fpe_hold_req_cnt;
nveu64_t mmc_tx_fpe_hold_req_cnt;
/** This counter provides the number of MAC frames with reassembly
* errors on the Receiver, due to mismatch in the fragment
* count value */
unsigned long mmc_rx_packet_reass_err_cnt;
nveu64_t mmc_rx_packet_reass_err_cnt;
/** This counter the number of received MAC frames rejected
* due to unknown SMD value and MAC frame fragments rejected due
* to arriving with an SMD-C when there was no preceding preempted
* frame */
unsigned long mmc_rx_packet_smd_err_cnt;
nveu64_t mmc_rx_packet_smd_err_cnt;
/** This counter provides the number of MAC frames that were
* successfully reassembled and delivered to MAC */
unsigned long mmc_rx_packet_asm_ok_cnt;
nveu64_t mmc_rx_packet_asm_ok_cnt;
/** This counter provides the number of additional mPackets received
* due to preemption */
unsigned long mmc_rx_fpe_fragment_cnt;
nveu64_t mmc_rx_fpe_fragment_cnt;
};
/**