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Author SHA1 Message Date
Diptanshu Jamgade
8bb1b24f59 nvethernetrm: update OSI_PAUSE_FRAMES_ENABLE macro 
Update OSI_PAUSE_FRAMES_ENABLE as per the updated
DT-bindings.

Bug 3529804

Change-Id: Ice290ef85c370956cec2a7b29cc0b6f82ac39093
Signed-off-by: Diptanshu Jamgade <djamgade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2790122
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
1ea653fc42 osi: core: Handle common interrupts before de-init 
Issue: During resume common interrupt raised for XPCS
remote and local link faults for MGBE0_0 on FS.
It resulted raising scheduling lane bring up through
workqueue but by that time driver is not ready handle
the data transfers.

Fix: Disable the common interrupts and handle the same
if there are any pending interrupts.

Bug 3812764

Change-Id: Ia647e46ef66d8687e1173873af8d8b67f2d7cc4b
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2793960
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Hareesh Kesireddy
abfb746542 osi: dma: align total rx buf length to 16 bytes 
Bug 3820633

Change-Id: I85adcb3d9093b26811f8174a8b8712fc27d29a42
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2789959
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
22b2f9f552 osi: dma: mgbe: set rx checksum flags 
Check if the descriptor has any checksum validation errors.
If none, set a per packet context flag indicating no err in
Rx checksum so that OSD layer will mark the packet appropriately
to skip TCP/UDP checksum validation in case of QNX

Bug 3725941

Change-Id: Ifa5fff35cc776bf72b96943835dbd2c1b6d44df2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2691195
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
21bb04e8d6 osi: core: remove safety backup and save/restore code 
Bug 3701869

Change-Id: Ib2b139db7c8829d01f57581a18506ba6641cd4ab
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2787478
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
e2edfc285b osi: core: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -71
Rule: MISRA_C-2012_Directive_4.5 Diff: -3
Rule: MISRA_C-2012_Rule_11.1 Diff: -5
Rule: MISRA_C-2012_Rule_11.3 Diff: -1
Rule: MISRA_C-2012_Rule_11.5 Diff: 1
Rule: MISRA_C-2012_Rule_12.1 Diff: -6
Rule: MISRA_C-2012_Rule_12.2 Diff: -7
Rule: MISRA_C-2012_Rule_15.1 Diff: -1
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_16.1 Diff: -1
Rule: MISRA_C-2012_Rule_16.3 Diff: -1
Rule: MISRA_C-2012_Rule_17.7 Diff: -4
Rule: MISRA_C-2012_Rule_17.8 Diff: -5
Rule: MISRA_C-2012_Rule_2.4 Diff: -4
Rule: MISRA_C-2012_Rule_2.5 Diff: -18
Rule: MISRA_C-2012_Rule_20.5 Diff: -1
Rule: MISRA_C-2012_Rule_5.6 Diff: -1
Rule: MISRA_C-2012_Rule_5.8 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -4
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -5
Rule: MISRA_C-2012_Rule_9.5 Diff: -1
Rule: Total Diff: -71

Bug 3695218

Change-Id: I9bd904f8a77195ca34fb2d47639a214f0083ccf7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776281
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
9e69b99908 osi: mgbe: configure MTL RXFIFO and flow control 
MTL RXFIFO memory available for MGBE - 192KB
Below is the distribution -
1) Q0 - 160KB
2) Q1 to Q8 - 2KB
3) Q9 - 16KB

It also update flow control parameters for
the Rx queues
1) Q0 - FULL_MINUS_32K
2) Q1 to Q9 - FULL_MINUS_1_5K

Bug 3787316

Change-Id: I3049d742e784aa3273090191856482121a3e1d3e
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2779472
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
1e92b13064 osi: core: Fix CERT/CERT ADV/Coverity issues 
**CERT report**
===== DIFF ======
Total cert violation count changed by -34
Rule: CERT_INT30-C Diff: -22
Rule: CERT_INT31-C Diff: -2
Rule: CERT_INT32-C Diff: -10
Rule: Total Diff: -34
**CERT ADV report**
===== DIFF ======
Total cert_adv violation count changed by -13
Rule: CERT_DCL37-C Diff: 1
Rule: CERT_EXP39-C Diff: -13
Rule: CERT_INT34-C Diff: -1
Rule: Total Diff: -13
**Coverity report**
===== DIFF ======
Total coverity violation count changed by -1
Rule: UNUSED_VALUE Diff: -1
Rule: Total Diff: -1

undef DRIFT_CAL since no longer used

Bug 3695218

Change-Id: I6638e2954ec2a74a66a756713b389610534d207a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776244
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Rakesh Goyal
8395e26ba1 nvethernetrm: support L2 filter from ioctls 
Move L2 and L3 structure to osi_core as new structure
at OSD level created to user data.
Number of max L2 filter check based on mac version.

Bug 3659048

Change-Id: I9e1e7c015e8c3a0579a363ccd6bcfe9d84e67eea
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2777333
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
65559ee9bc osi: dma: Fix CERT issues 
Analysis summary report:
Defects/Coding rule violations found : 3 Total
        CERT_INT30-C     3 - (Deviation Not approved)
        Total    3
===== DIFF ======
Total cert violation count changed by -44
Rule: CERT_INT30-C Diff: -44
Rule: Total Diff: -44

Jira NET-224

Change-Id: I0cdbece05a61f4b22e4447d7cedc6ca401bd5736
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2772787
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
287f0799f7 osi: dma: increment rx_buf_len for alignment 
Issue: If the DMA buffer address is not aligned with
EQOS/MGBE system bus width then data will be lost.

Fix: Add 15bytes extra at head portion for alignment
and 15byte extra to cover tail portion of the buffer.

Bug 3572785

Change-Id: Ic0ce1e052cb6e952eba25fbc0cf696affca605cb
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2716666
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Rakesh Goyal
99647c64ea nvethernetrm: update filename and location 
Update file name to be added in SDK

Bug 3704251

Change-Id: Ibc6b53a6c152973f249d8af94a33cd537b1ea7ec
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2778302
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Sanath Kumar Gampa
56233beeb6 osi: macsec: Fix CERT INT31-C issues in macsec 
Bug 3745813

Change-Id: I36ea0483857d82bc60277be33f279057689ffef1
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2763014
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Rakesh Goyal
3c79e2127a nvethernetrm: take exported ioctl related header out 
Issue: SW needs to support IOCTL on safety builds and
these header should be exposed to user

Fix: Create new header file which is exposed externally
     Fix Coverity issues
     Enable TSN and FRP for safety build
     Optimize the code between eqos and mgbe

Bug 3704251

Change-Id: I2807f8283a296de1f96d3f902cb4ad5a4781be50
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2759333
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
 2023-02-13 19:43:30 +05:30
Hareesh Kesireddy
1802824994 osi: dma: provide choice for driver to skip dmb 
- Added a skip dmb flag in tx_ring to let driver
  decide whether barrier need to be performed or not.
- Using rsvd1 in tx swcx for storing nvsocket data index.

Bug 3672681
Jira NET-332

Change-Id: Ie35b7487c6ba2ae92acd46ec51ec4342b856e404
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2771038
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
e32a81bb75 osi: dma: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -162
Rule: MISRA_C-2012_Directive_4.6 Diff: -13
Rule: MISRA_C-2012_Directive_4.9 Diff: 5
Rule: MISRA_C-2012_Rule_10.1 Diff: -2
Rule: MISRA_C-2012_Rule_11.3 Diff: -15
Rule: MISRA_C-2012_Rule_11.5 Diff: 15
Rule: MISRA_C-2012_Rule_12.2 Diff: -2
Rule: MISRA_C-2012_Rule_15.1 Diff: 64
Rule: MISRA_C-2012_Rule_15.4 Diff: 5
Rule: MISRA_C-2012_Rule_15.5 Diff: -76
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_15.7 Diff: -2
Rule: MISRA_C-2012_Rule_16.4 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -2
Rule: MISRA_C-2012_Rule_2.4 Diff: -1
Rule: MISRA_C-2012_Rule_2.5 Diff: -106
Rule: MISRA_C-2012_Rule_5.7 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -6
Rule: MISRA_C-2012_Rule_8.13 Diff: -18
Rule: MISRA_C-2012_Rule_8.2 Diff: -1
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -2
Rule: Total Diff: -162
*******************CERT report
Analysis summary report:
Defects/Coding rule violations found : 47 Total
	CERT_INT30-C 	 47 - (Deviation Not approved)
	Total 	 47
===== DIFF ======
Total cert violation count changed by -16
Rule: CERT_INT30-C Diff: -16
Rule: Total Diff: -16
*******************CERT ADV report
Analysis summary report:
Defects/Coding rule violations found : 36 Total
	CERT_DCL37-C (Full Deviation) 	 36 - (Deviation Approved)
	Total 	 36
===== DIFF ======
Total cert_adv violation count changed by -76
Rule: CERT_DCL37-C Diff: -62
Rule: CERT_EXP39-C Diff: -14
Rule: Total Diff: -76

JIRA NET-224

Change-Id: I2084da3d98646e6f9fb7933adbee39343e509e8d
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2744955
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
5ce577f554 osi: core: combine config_l3_l4_filter_enable 
Bug 3701869

Change-Id: Ic36cb61075495589c9aaf9bafb7ce1eeda4de673
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740674
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
4a2788fdd1 osi: core: combine config_mac_pkt_filter_reg 
Bug 3701869

Change-Id: I603bd57511f115fb5af42dca2a5804cf4926ebbb
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740658
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
f4b5d5ed3f osi: core: combine core_deinit 
Bug 3701869

Change-Id: I985e909803f8de858f2c6a8020f9c77eaa75951d
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740574
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
8406b92eb4 osi: core: fix misra 2.x rules 
===== DIFF ======
Total misra violation count changed by -591
Rule: MISRA_C-2012_Rule_2.2 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -3
Rule: MISRA_C-2012_Rule_2.4 Diff: -2
Rule: MISRA_C-2012_Rule_2.5 Diff: -585
Rule: Total Diff: -591

Bug 3695218

Change-Id: I57e85ba94f434cb3bd729b4f5f75bb4a592fb279
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2768383
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
384474dadb osi: core: fix misra 4.6 rule 
===== DIFF ======
Total misra violation count changed by -240
Rule: MISRA_C-2012_Directive_4.6 Diff: -240
Rule: Total Diff: -240

Bug 3695218

Change-Id: Ida2d3a775872637eda3058ea361a00346c86f7f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767895
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Rakesh Goyal
600ee00cca core: configure ETS as default selection algorithm 
Issue: Default TX selection is SP, due to which
highest TX queue get most of TX bandwidth.

Fix: Set ETS as selection policy (WRR)with equal
weights given to all Tx Queue.
 Set default configuration on disabling CBS.

Bug 3735907

Change-Id: I33b849695641ceaeef77ff819121d51e132214aa
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2749330
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
209d08a4b0 osi: core: combine ptp_tsc_capture 
Bug 3701869

Change-Id: Ib8b2ea895866e2d260aa5e5aa753ecfd49b663ae
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740494
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
4e9d836783 osi: core: combine config_ssir 
1) Combine config_ssir
2) Store MAC version in local core/dma variable for differentiating across SoCs.

Bug 3701869

Change-Id: I43dd9f7d2194191d849ea10f15b84b2c40111ee0
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740328
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
73a42b9cdb osi: core: combine config_tscr 
Bug 3701869

Change-Id: I1eb04dd9cf439ce55b1bdc6df73f793af85eddcd
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740317
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
e11ffed221 osi: core: combine config_addend 
Bug 3701869

Change-Id: I6a656ac72e8d87b96ac9efa9bf9e1c9a979306b1
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740109
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
86d0902440 osi: core: combine set_systime_to_mac 
Bug 3701869

Change-Id: I7df8c486b9fea489bf16c700d93e070f0d455dd2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2740056
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
abd80e150c osi: Pass OSD pointer for better logging 
Issue: Currently logs don't have any IP/inteface specific
name to indicate that from which IP/interface these
logs are coming.

Fix: Pass OSD pointer so that interface or device name
can be added to the logs.

Reduce XPCS logging

Bug 3719492
Bug 3722532

Change-Id: Id909b14f24f441ab40ff6497f1998aeb4ab34611
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2745731
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
eede9dc484 mgbe: core: call lane bringup on local fault 
call lane bringup when there are local faults
and stop the network queues.
restart the network queues when proper link is up

Bug 3744088
Bug 3654543
Bug 3665378

Change-Id: I33180c965b29543dcdfb0d8f611be06b6b97a42e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2730882
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Nagaraj Annaiah
f8558df3b9 osi: core: xpcs: Reduce PCS lock time out. 
Issue: Longer PCS delay causes IVC time out.

Fix: Reduce PCS delay loop to 5 Micro sec.

Bug 3688266

Change-Id: Ide7e90b2eb62034ad55ba406dbcfe1d56687573b
Signed-off-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737257
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Mahesh Patil
65bab3e41e osi: core: Change macsec log level 
Change macsec log level for general prints and disable DEBUG_MACSEC
macro for safety build

Bug 3708920

Change-Id: Iec9b28d0e1eeb4ceb17767d7311cb7945a42009d
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2745325
Reviewed-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
0e6dd5414d osi: dma: compile out not required code for Safety QNX 
Bug 200770328

Change-Id: I8ee51c89954b47ceff5e261b6a2d8cc6b3f16f36
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2735897
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Narayan Reddy
d399e48572 osi: core: skip out not required code for Safety QNX 
Bug 3701869

Change-Id: Ic1f676708ff6e3faf7dbed09f0e7048448252e57
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739627
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Bhadram Varka <vbhadram@nvidia.com>
 2023-02-13 19:43:30 +05:30
Bhadram Varka
0610f6bd35 osi: dma: mgbe: fix regression RWTU programming 
Bug 200770328

Change-Id: I738daa23df274c5f8e485829c3876ef96310015f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2754972
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Sanath Kumar Gampa
21937b85dd osi: macsec API cleanup 
Bug 3709820

Change-Id: I935ca2d373bea1b7d8b15f790ffc3719fa9d0881
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738227
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Narayan Reddy
82db6f563b osi: core: combine config_rxcsum_offload 
Bug 3701869

Change-Id: I802497b6f973c69b994373697251964e532243f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739139
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
bd4c50decf osi: core: combine config_fw_err_pkts 
Bug 3701869

Change-Id: I5a0fe6e24d8aa69054a18f927d7135552482e8b9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739131
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
43cd5b0da2 osi: core: combine flush_mtl_tx_queue 
Bug 3701869

Change-Id: Ifea025c0eb2d4373a348283aaa93eb7d0eca193a
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739121
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
2d2b1058c4 osi: core: combine set_speed 
Bug 3701869

Change-Id: Ie41b31e94f0ec0fb0b8d2d52cca7fafa81fd54c2
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738062
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-13 19:43:30 +05:30
Narayan Reddy
c6e8224be6 osi: core: combine set_mode 
Bug 3701869

Change-Id: I01d8e45b5818277441775d17e332c246ffa13a0e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738021
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Narayan Reddy
d46911c303 osi: core: combine stop_mac 
Bug 3701869

Change-Id: I27a16c3f7c088be815b36d416ae068b5e60db143
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738006
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Narayan Reddy
9b0cf68c15 osi: core: combine start_mac 
Bug 3701869

Change-Id: Ice5ea78f32da1641cc847138869df97149eb72c9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737988
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
455e3c610c osi: core: common poll_for_swr 
Combine MGBE/EQOS HW level functions into single function.

Bug 3701869

Change-Id: I02c4881ec95cc5637867d68e560f4790c3548737
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2732106
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
5d937f6cf2 osi: dma: combine init_dma_channel 
This change combines EQOS and MGBE init into
single function and also removes the safety
registers validation.

Bug 200770328

Change-Id: I75b575a53318b10770b40d76e209b6f6aa9bbead
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2737141
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
a68f6eab80 osi: dma: combine rx_buf_len 
Bug 200770328

Change-Id: I573462275d13eba1417203eb44606913b7885552
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2736236
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
70b2ce0398 osi: dma: perform rx_pkt_cx memset after OWN bit check 
Bug 200770328

Change-Id: Ibf89ec6e6e3ffec845120ad4d6da159ef9782eb5
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2734689
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
403223361c osi: dma: combine stop_dma 
Bug 200770328

Change-Id: I7ecf219ce16ca9bbdde1c5301eaa8accb105e048
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2734404
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
833eabd1ee osi: dma: combine start_dma 
Bug 200770328

Change-Id: I106acca1253dd3d03b5e032f8b0acd7484828c58
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2734346
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
aad0f2c846 osi: dma: combine update_rx_tail_ptr func 
Bug 200770328

Change-Id: I14a298a6fcfb9a869226580bba46ed0e470721bc
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2734314
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30
Bhadram Varka
922427eb01 osi: dma: combine update_tx_tailptr func 
Bug 200770328

Change-Id: I6eba39420850ffc39b7eb0dad63829245faa0bde
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2734299
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2023-02-13 19:43:30 +05:30