Commit Graph

41 Commits

Author SHA1 Message Date
Revanth Kumar Uppala
6c637ac71e nvethernetrm: Update Copyright year to 2023
Bug 3918941

Change-Id: Iae1cce6bb0bffaa20d601a0c5da62045ce9458fc
Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2852448
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-15 22:55:00 -08:00
Mohan Thadikamalla
4cb630ef6e osi: core: Update ethernet stats to VF osi core
Issue:
When the ethernet server got enabled,
OSI core stats are not getting
updated to VF's.

Fix:
Add IOCTL to copy OSI core stats
into VF's OSI core structure.

Bug 3763499

Change-Id: Ib0a957ff90805b7e716d8f5994e0a65d63660c1e
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2808680
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:30 +05:30
Rakesh Goyal
99647c64ea nvethernetrm: update filename and location
Update file name to be added in SDK

Bug 3704251

Change-Id: Ibc6b53a6c152973f249d8af94a33cd537b1ea7ec
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2778302
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-13 19:43:30 +05:30
Rakesh Goyal
3c79e2127a nvethernetrm: take exported ioctl related header out
Issue: SW needs to support IOCTL on safety builds and
these header should be exposed to user

Fix: Create new header file which is exposed externally
     Fix Coverity issues
     Enable TSN and FRP for safety build
     Optimize the code between eqos and mgbe

Bug 3704251

Change-Id: I2807f8283a296de1f96d3f902cb4ad5a4781be50
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2759333
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
2023-02-13 19:43:30 +05:30
Narayan Reddy
8406b92eb4 osi: core: fix misra 2.x rules
===== DIFF ======
Total misra violation count changed by -591
Rule: MISRA_C-2012_Rule_2.2 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -3
Rule: MISRA_C-2012_Rule_2.4 Diff: -2
Rule: MISRA_C-2012_Rule_2.5 Diff: -585
Rule: Total Diff: -591

Bug 3695218

Change-Id: I57e85ba94f434cb3bd729b4f5f75bb4a592fb279
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2768383
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-13 19:43:30 +05:30
Narayan Reddy
384474dadb osi: core: fix misra 4.6 rule
===== DIFF ======
Total misra violation count changed by -240
Rule: MISRA_C-2012_Directive_4.6 Diff: -240
Rule: Total Diff: -240

Bug 3695218

Change-Id: Ida2d3a775872637eda3058ea361a00346c86f7f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767895
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2023-02-13 19:43:30 +05:30
Bibhay Ranjan
bfb924f3a9 nvethernetrm: fix code defects
Issue: SPARSE errors
Fix: Fix code as per the guidelines in the errors

Bug 3568991

Change-Id: If52bf7d5b3e8d4ca10a254e802ee5257a8816633
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2688520
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:30 +05:30
Om Prakash Singh
418c1130ca osi: fix mmc.h dependency on osi_common.h
mmc.h uses few definition from osi_common.h

Bug 3500728

Change-Id: I95696ddd63cee4979c0a79cda9a87e65b895dee0
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2663878
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:30 +05:30
Rakesh Goyal
682c88d674 core: mgbe: use lock for time stamping
Using lock for protect critical section between
common interrupt and ioctl call to read
timestamp

Add mmc counters for lock failure during node
addition and deletion.

Bug 200743666

Change-Id: I12a2e57993e91d6ed50ed0efc84d1b60ef736677
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2590099
Tested-by: Gaurav Asati <gasati@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Gaurav Asati <gasati@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:30 +05:30
Mahesh Patil
d6b7173618 nvethernetrm: address review comments
- Convert primitive data type to nv_ type's
- Replace debug pr_ prints with OSI_CORE_ print macro's
- Add all macsec register macro's with prefix MACSEC_
- Update all osi function header as per 5.2 coding guidelines(PLC)
- Remove printk.h header file and use OSI_CORE_ERR macro's in all prints
- Implement clean up LUT's in add_upd_sc() and del_upd_sc()

Bug 3264523

Change-Id: Ie41097c85fbcb90ce0c4cac470fe0f068ed22247
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2548476
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:29 +05:30
Mahesh Patil
29124be8d4 nvethernetrm: Enable key program through TZ
Enabling macsec key's programming using TZ

Bug 3246511

Change-Id: I1e7633b042e1ebedef78fff9812aeaaa2480a1c4
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2478489
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
2023-02-13 19:43:20 +05:30
Srinivas Ramachandran
bfad299d24 nvethernetrm: Add support for MACsec controller
This commit adds support for MACsec controller HW
operations. The MACsec HW ops can be accessed via
osi_core layer.

Currently, MACsec HW is enabled when MAC interface
is brough up, with no LUT entry so that packets
will still be bypassed. MTU check is enabled and
default interrupts are enabled for statistics.

Bug 2913560

Change-Id: I62e8567fac6603db47f4069a40458038f9b4178a
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
2023-02-13 19:43:20 +05:30
rakesh goyal
e18eedbdeb nvethernetrm: eqos: TSN support for EQOS IP
1. Adds basic OSI API's for EST/FPE
2. EST/FPE support for EQOS
3. MMC counters for FPE
4. EST errors and state counter

Bug 200561100

Change-Id: Iee3e6caac5d16e1620c25420d72700f9cdd00465
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2319820
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
2023-02-13 19:43:20 +05:30
Bhadram Varka
e32f28530a nvethernetrm: add support for MGBE initialization
Adds MAC CORE and DMA initialization support for
MGBE MAC Controller.

Bug 200548572

Change-Id: I6796229852b47ff0748a848a6dbe9addab6ab74f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2250401
2023-02-13 19:43:20 +05:30
rakesh goyal
8829d1a4e5 osi: eqos: only interface APIs accessible form OSD
Issue:	Many non API functions are accessible from
	OSD code which can be used to update/access
	HW registers.
Fix:	Move non API function to local files and
	remove header files from code shared with OSD
	so these function can be accessible only
	within OSI code

Bug 200671160

Change-Id: Ic396b3b34e20cd8ee6b252e745df12f4532d0e10
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2494297
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:20 +05:30
rakesh goyal
e47a928225 nvethernetrm: fix review CG and DG comments
- Include header gaurds using INCLUDED_
- Move static inline function to private
  header file.
- Move private macro to private header

Bug 200681427

Change-Id: I810184e077a5642f727e47b9280d3fb9659abd74
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455014
(cherry picked from commit b3afc7a112460d7f92d8ef0fbe8727c7acd9ec44)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457307
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:20 +05:30
rakesh goyal
01dd86e594 nvethernetrm: fix Misra-C 2.x, 5.9 and 8.9
Fix MISRA C-2012 Rule 2.3
Fix MISRA C-2012 Rule 2.4
Fix MISRA C-2012 Rule 2.5
Fix MISRA C-2012 Rule 5.9
Fix MISRA C-2012 Rule 8.9

Bug 200682334

Change-Id: Ie95e2f9d346d952fac1cf28f241522f35648be38
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455622
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457306
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:20 +05:30
rakesh goyal
5650ee6ab6 nvethernetrm: fix for Misra-C 4.6
- Fix Misra-C Rule 4.6

Bug 200682334

Change-Id: I56b1effa4e1a2f0707a26d11358de60d9d12e4f9
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2453789
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457303
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2023-02-13 19:43:20 +05:30
Bhadram Varka
1e5dd8d2a1 nvethernetrm: Add MMC counters
Adds MMC counters for which hold higher values.

Bug 200565915

Change-Id: I8803a60d97b0235911df177f820b8c66cfb0b1bb
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2292221
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:20 +05:30
Srinivas Ramachandran
df29f010ab nvethernetrm: Add support for EEE LPI
Add an API to configure the EEE LPI mode.
Tx LPI is enabled with a default entry time of 1sec.
The MAC controller has capability to automatically
enter LPI mode when all transmissions are complete.

Bug 2594864

Change-Id: I765ddfda908b1922abd46c11fa217a35fe6190f1
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2160787
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:20 +05:30
Ajay Gupta
f48b89022b nvethernetrm: enable tx interrupt coalescing
Tx frame count and software timer based interrupt coalescing
is enabled. Tx frame based coalescing can be enabled only
when tx software timer based interrupt coalescing is also
enabled.

Bug 200529168

Change-Id: Icd5e2ff3a6b9ad1d1793842b607a93ad779955d7
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2234609
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:20 +05:30
Narayan Reddy
ae6f4415a9 nvethernetrm: Update comments with Doxygen style
replace kernel doc comments with Doxygen style comments

Bug 200512422

Change-Id: I2e8e1f395674ab9e1b66bf40c1f6cc0551608163
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2154252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:19 +05:30
Rakesh Goyal
64b887395d nvethernetrm: add HW and SW counters' support
These stats are read from MAC HW RMON counters as well as from Core
and DMA path.

ethtool -S <interface> is used to get statistics.

There are 3 stats captured currently
1) ether_mmc_counters: EQOS HW RMON counters
2) ether_xtra_stat_counters: SW counters from osi/core
3) ether_xtra_dma_stat_counters: SW counters from osi/dma

Bug 200519211

Change-Id: I5bbeb340cf2ffccb6399687b254f79c67f480179
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114208
GVS: Gerrit_Virtual_Submit
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2023-02-13 19:43:19 +05:30
Bhadram Varka
413eeb0b04 Delete nvethernetrm to move the history from dev-main to rel-35
Bug 3918941

Change-Id: Iddf8b0f6d343490407dfafc8914dca01b4b84b4b
2023-02-13 19:42:48 +05:30
Bibhay Ranjan
4fae8741fb nvethernetrm: fix code defects
Issue: SPARSE errors
Fix: Fix code as per the guidelines in the errors

Bug 3568991

Change-Id: If52bf7d5b3e8d4ca10a254e802ee5257a8816633
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2688520
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-04-21 15:53:24 -07:00
Om Prakash Singh
bc8f866fac osi: fix mmc.h dependency on osi_common.h
mmc.h uses few definition from osi_common.h

Bug 3500728

Change-Id: I95696ddd63cee4979c0a79cda9a87e65b895dee0
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2663878
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-09 09:47:04 -08:00
Rakesh Goyal
a9b03b83a9 core: mgbe: use lock for time stamping
Using lock for protect critical section between
common interrupt and ioctl call to read
timestamp

Add mmc counters for lock failure during node
addition and deletion.

Bug 200743666

Change-Id: I12a2e57993e91d6ed50ed0efc84d1b60ef736677
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2590099
Tested-by: Gaurav Asati <gasati@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Gaurav Asati <gasati@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-09-20 11:09:19 -07:00
Mahesh Patil
330acf2e3d nvethernetrm: address review comments
- Convert primitive data type to nv_ type's
- Replace debug pr_ prints with OSI_CORE_ print macro's
- Add all macsec register macro's with prefix MACSEC_
- Update all osi function header as per 5.2 coding guidelines(PLC)
- Remove printk.h header file and use OSI_CORE_ERR macro's in all prints
- Implement clean up LUT's in add_upd_sc() and del_upd_sc()

Bug 3264523

Change-Id: Ie41097c85fbcb90ce0c4cac470fe0f068ed22247
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2548476
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-07-13 19:27:38 -07:00
Mahesh Patil
474ed78e6d nvethernetrm: Enable key program through TZ
Enabling macsec key's programming using TZ

Bug 3246511

Change-Id: I1e7633b042e1ebedef78fff9812aeaaa2480a1c4
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2478489
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
2021-06-21 07:07:10 +05:30
Srinivas Ramachandran
3be3b7a90c nvethernetrm: Add support for MACsec controller
This commit adds support for MACsec controller HW
operations. The MACsec HW ops can be accessed via
osi_core layer.

Currently, MACsec HW is enabled when MAC interface
is brough up, with no LUT entry so that packets
will still be bypassed. MTU check is enabled and
default interrupts are enabled for statistics.

Bug 2913560

Change-Id: I62e8567fac6603db47f4069a40458038f9b4178a
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
2021-06-21 07:07:10 +05:30
rakesh goyal
aa89068135 nvethernetrm: eqos: TSN support for EQOS IP
1. Adds basic OSI API's for EST/FPE
2. EST/FPE support for EQOS
3. MMC counters for FPE
4. EST errors and state counter

Bug 200561100

Change-Id: Iee3e6caac5d16e1620c25420d72700f9cdd00465
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2319820
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
2021-04-05 16:35:54 +05:30
Bhadram Varka
731abcdc1e nvethernetrm: add support for MGBE initialization
Adds MAC CORE and DMA initialization support for
MGBE MAC Controller.

Bug 200548572

Change-Id: I6796229852b47ff0748a848a6dbe9addab6ab74f
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2250401
2021-04-05 16:35:53 +05:30
rakesh goyal
3d7a7a2661 osi: eqos: only interface APIs accessible form OSD
Issue:	Many non API functions are accessible from
	OSD code which can be used to update/access
	HW registers.
Fix:	Move non API function to local files and
	remove header files from code shared with OSD
	so these function can be accessible only
	within OSI code

Bug 200671160

Change-Id: Ic396b3b34e20cd8ee6b252e745df12f4532d0e10
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2494297
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-03-11 22:28:24 -08:00
rakesh goyal
56b160f12e nvethernetrm: fix review CG and DG comments
- Include header gaurds using INCLUDED_
- Move static inline function to private
  header file.
- Move private macro to private header

Bug 200681427

Change-Id: I810184e077a5642f727e47b9280d3fb9659abd74
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455014
(cherry picked from commit b3afc7a112460d7f92d8ef0fbe8727c7acd9ec44)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457307
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-10 14:52:50 -08:00
rakesh goyal
670622893f nvethernetrm: fix Misra-C 2.x, 5.9 and 8.9
Fix MISRA C-2012 Rule 2.3
Fix MISRA C-2012 Rule 2.4
Fix MISRA C-2012 Rule 2.5
Fix MISRA C-2012 Rule 5.9
Fix MISRA C-2012 Rule 8.9

Bug 200682334

Change-Id: Ie95e2f9d346d952fac1cf28f241522f35648be38
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2455622
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457306
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-10 14:52:46 -08:00
rakesh goyal
a744271813 nvethernetrm: fix for Misra-C 4.6
- Fix Misra-C Rule 4.6

Bug 200682334

Change-Id: I56b1effa4e1a2f0707a26d11358de60d9d12e4f9
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2453789
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2457303
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2020-12-10 14:52:33 -08:00
Bhadram Varka
c3f4ec6af3 nvethernetrm: Add MMC counters
Adds MMC counters for which hold higher values.

Bug 200565915

Change-Id: I8803a60d97b0235911df177f820b8c66cfb0b1bb
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2292221
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-02-12 15:40:11 -08:00
Srinivas Ramachandran
1b011027d7 nvethernetrm: Add support for EEE LPI
Add an API to configure the EEE LPI mode.
Tx LPI is enabled with a default entry time of 1sec.
The MAC controller has capability to automatically
enter LPI mode when all transmissions are complete.

Bug 2594864

Change-Id: I765ddfda908b1922abd46c11fa217a35fe6190f1
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2160787
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-12-11 22:53:37 -08:00
Ajay Gupta
0ea2fd047e nvethernetrm: enable tx interrupt coalescing
Tx frame count and software timer based interrupt coalescing
is enabled. Tx frame based coalescing can be enabled only
when tx software timer based interrupt coalescing is also
enabled.

Bug 200529168

Change-Id: Icd5e2ff3a6b9ad1d1793842b607a93ad779955d7
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2234609
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-12-05 13:13:39 -08:00
Narayan Reddy
77b827e51b nvethernetrm: Update comments with Doxygen style
replace kernel doc comments with Doxygen style comments

Bug 200512422

Change-Id: I2e8e1f395674ab9e1b66bf40c1f6cc0551608163
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2154252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-08-21 13:06:08 -07:00
Rakesh Goyal
b63e4f033b nvethernetrm: add HW and SW counters' support
These stats are read from MAC HW RMON counters as well as from Core
and DMA path.

ethtool -S <interface> is used to get statistics.

There are 3 stats captured currently
1) ether_mmc_counters: EQOS HW RMON counters
2) ether_xtra_stat_counters: SW counters from osi/core
3) ether_xtra_dma_stat_counters: SW counters from osi/dma

Bug 200519211

Change-Id: I5bbeb340cf2ffccb6399687b254f79c67f480179
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114208
GVS: Gerrit_Virtual_Submit
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-15 23:55:22 -07:00