- Convert primitive data type to nv_ type's
- Replace debug pr_ prints with OSI_CORE_ print macro's
- Add all macsec register macro's with prefix MACSEC_
- Update all osi function header as per 5.2 coding guidelines(PLC)
- Remove printk.h header file and use OSI_CORE_ERR macro's in all prints
- Implement clean up LUT's in add_upd_sc() and del_upd_sc()
Bug 3264523
Change-Id: Ie41097c85fbcb90ce0c4cac470fe0f068ed22247
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2548476
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
- OSI DMA
-- During Trasnmit:
--- For EQOS/MGBE one steps PTP Reads TS and update
in TX done structure.
--- For MGBE 2 steps PTP or 1 step slave, update flags
TS_POLL and update pkt_id as unique ID to be used
for polling by OSD after Common interrupt handling.
packet_id = MSB 4 bits channel_number and LSB 6-bits,
local index of PTP TS FIFO.
-- On transmit complete
--- If TS is part of Tx done context set OSI_TXDONE_CX_TS
--- If TS is not part of Tx done context and delayed set
OSI_TXDONE_CX_TS_DELAY.
- OSI Core
-- On Common interrupt:
--- If MGBE_ISR_TSIS is set, read time stamp to internal
array from HW fifo, until it is completely read or array
is full.
--- Provide an IOCTL OSI_CMD_GET_TX_TS, to read TS for the
specified pkt_id from OSD via structure osi_core_tx_ts
--- Provide an IOCTL OSI_CMD_FREE_TS, to free TS for the
specified pkt_id from OSD path
Bug 200603265
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Change-Id: Ib3e02031393e40988074095e5a135bb4e839d7f4
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2543792
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
GVS: Gerrit_Virtual_Submit
Issue: In current implementation virualization
callback are at HW ops level, which leads
to multiple IVC calls.
Fix: - IVC call happens only for core API's in case
virtualization
- For non-virtualization case HW operations will
be invoked directly from OS OSD.
- From Ethernet server OSD - OSI HAL API's
should be called to access the HW operations
Bug 200671160
Change-Id: Ic3730fb822ae37fdf29fabf429f18f5d5bacd210
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2509243
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
To reduce number of external interface APIs,
consolidate all IOCTL API to one interface API.
Bug 200671160
Change-Id: I407ee5c50c8b3293c5be613beda68e1e450dce89
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Issue: Since core_ops/dma_chan_ops are static global
variables and these are stored in data segment of
a process. In linux when insmod happens eqos and mgbe
will get probe which inturn initialize osi core ops.
Since data segment is shared here eqos core ops pointer
overwritten by mgbe core operations.
Fix: Use separe core ops and local global variable
for each instance.
Bug 200671160
Change-Id: I7f093608d812e2ced1bf73339dbd70f0091fe5b4
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
This commit adds support for MACsec controller HW
operations. The MACsec HW ops can be accessed via
osi_core layer.
Currently, MACsec HW is enabled when MAC interface
is brough up, with no LUT entry so that packets
will still be bypassed. MTU check is enabled and
default interrupts are enabled for statistics.
Bug 2913560
Change-Id: I62e8567fac6603db47f4069a40458038f9b4178a
Signed-off-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Enable multiple DMA Channels routing support
for MC/BC MAC Address with XDCS.
Bug 200565911
Change-Id: I7c9f9347361dd72e68696846a0a59e2e241e20c9
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
program the recommended values by HW team for
better performance
Bug 200565630
Bug 200570017
Change-Id: I96a870114623ce76804c49706d2961010448ca86
Signed-off-by: narayanr <narayanr@nvidia.com>
- Define new data structure for the FRP table entry,
declare new frp_table and NVE variables in the OSI
core private structure.
- Define a new data structure for the OSI FRP command.
Add new OSI API to initiate FRP commands from OSD.
Bug 200565623
Change-Id: I84660a6e8270a681b82236d0c39423660b3821ff
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2330182
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Change takes care of -
o Enable PTP for MGBE
o Added flags for One step/two step and also
for PTP master/slave
o Getting timestamp from MAC registers for MGBE.
Bug 200565914
Change-Id: I17346451f2619f0526a737a4a6bffdf130af4fc0
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2314201
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
This change programs 40byte Hash key and indirection table
(Hash table) (has DMA channel numbers) in MAC
Once packet received by MAC - 4-tuples will be extracted
from the packet and given to RSS hash engine. Hash function
will generate hash value by using 40byte key.
From hash value LSB bits used as index to RSS lookup table to
find out DMA channel number. If there is a match - packet is
routed to corresponding DMA channel. If there is no match -
packet will be dropped and error will be returned in receive desc.
Bug 200565647
Change-Id: Iffbb5a452f03278b3ba0bc061f09b43c7c994289
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2263398
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
- Add new ptp_rx_queue variable in
osi_ptp_config structure.
- Declare an IP callback function
for PTP RX queue index programming.
- Check and call IP based PTP RX queue
callback in osi_ptp_configuration.
Bug 200596985
Change-Id: Ief040dc5b607ad729af5e9c0c1870249b456dcc7
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Adds support for VLAN insertion/deletion and filtering
on receive side.
Perfect filtering enabled for the VLAN filtering.
HW maximum has 32 VLAN perfect filters. If user adds
more than 32 then all VID's will be allowed
Bug 200565888
Change-Id: I75bdc261a77df4f9d9f5fff9a2943731de9dd4ef
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2312144
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Issue: Many non API functions are accessible from
OSD code which can be used to update/access
HW registers.
Fix: Move non API function to local files and
remove header files from code shared with OSD
so these function can be accessible only
within OSI code
Bug 200671160
Change-Id: Ic396b3b34e20cd8ee6b252e745df12f4532d0e10
Signed-off-by: rakesh goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2494297
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Issue: Currently OSD has access to osi_dma_ops
so these operations can be changed by OSD.
Also each entry funnction has checks for validating
these function pointers which would increase the
unit tests as well.
Fix: Move dma_ops to inside OSI and set a flag
indicate that DMA software init done. Each entry
function needs to check only flag.
It also fixes couple of doxygen comments issues.
Bug 200671160
Change-Id: I675e24cbfca8f4023fd31709f246230d2070d716
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2490156
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Issue: Currently OSD has access to osi_core_ops
so these operations can be changed by OSD.
Also each entry funnction has checks for validating
these function pointers which would increase the
unit tests and complexity as well.
Fix: Move dma_ops to inside OSI and set a flag
indicate that CORE software init done. Each entry
function needs to check only flag
Bug 200671160
Change-Id: I6def9e5c39f90a08eb4f48a124a1c2c8c65175a4
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2435991
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
