mirror of
git://nv-tegra.nvidia.com/kernel/nvethernetrm.git
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6f0c3604d0
- HW has separate Inverse Match bits in l3l4 control register for each source address, destination address, source port and destination port. - Hence, added separate Inverse match bits for all the 4 fields in osi l3l4 structure to provide flexibility for l3l4 users. - Fixed validation parameter sequence to validate l3l4 parameters before processing filter data. Bug 3576506 Bug 3825731 Change-Id: Id7f8939acd92ad5799f2ad0d7cef5d4fcb7e00c5 Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2820517 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
96 lines
3.2 KiB
C
96 lines
3.2 KiB
C
/*
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* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef INCLUDED_NVETHERNETRM_L3L4_H
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#define INCLUDED_NVETHERNETRM_L3L4_H
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#include <nvethernet_type.h>
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/** helper macro for enable */
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#define OSI_TRUE ((nveu32_t)1U)
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/** helper macro to disable */
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#define OSI_FALSE ((nveu32_t)0U)
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/**
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* @brief L3/L4 filter function dependent parameter
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*/
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struct osi_l3_l4_filter {
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/** filter data */
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struct {
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#ifndef OSI_STRIPPED_LIB
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/** udp (OSI_TRUE) or tcp (OSI_FALSE) */
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nveu32_t is_udp;
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/** ipv6 (OSI_TRUE) or ipv4 (OSI_FALSE) */
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nveu32_t is_ipv6;
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#endif /* !OSI_STRIPPED_LIB */
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/** destination ip address information */
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struct {
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/** ipv4 address */
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nveu8_t ip4_addr[4];
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#ifndef OSI_STRIPPED_LIB
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/** ipv6 address */
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nveu16_t ip6_addr[8];
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/** Port number */
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nveu16_t port_no;
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/** addr match enable (OSI_TRUE) or disable (OSI_FALSE) */
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nveu32_t addr_match;
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/** perfect(OSI_FALSE) or inverse(OSI_TRUE) match for address */
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nveu32_t addr_match_inv;
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/** port match enable (OSI_TRUE) or disable (OSI_FALSE) */
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nveu32_t port_match;
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/** perfect(OSI_FALSE) or inverse(OSI_TRUE) match for port */
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nveu32_t port_match_inv;
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#endif /* !OSI_STRIPPED_LIB */
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} dst;
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#ifndef OSI_STRIPPED_LIB
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/** ip address and port information */
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struct {
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/** ipv4 address */
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nveu8_t ip4_addr[4];
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/** ipv6 address */
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nveu16_t ip6_addr[8];
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/** Port number */
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nveu16_t port_no;
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/** addr match enable (OSI_TRUE) or disable (OSI_FALSE) */
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nveu32_t addr_match;
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/** perfect(OSI_FALSE) or inverse(OSI_TRUE) match for address */
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nveu32_t addr_match_inv;
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/** port match enable (OSI_TRUE) or disable (OSI_FALSE) */
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nveu32_t port_match;
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/** perfect(OSI_FALSE) or inverse(OSI_TRUE) match for port */
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nveu32_t port_match_inv;
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} src;
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#endif /* !OSI_STRIPPED_LIB */
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} data;
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#ifndef OSI_STRIPPED_LIB
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/** Represents whether DMA routing enabled (OSI_TRUE) or not (OSI_FALSE) */
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nveu32_t dma_routing_enable;
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#endif /* !OSI_STRIPPED_LIB */
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/** DMA channel number of routing enabled */
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nveu32_t dma_chan;
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/** filter enable (OSI_TRUE) or disable (OSI_FALSE) */
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nveu32_t filter_enb_dis;
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};
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#endif /* INCLUDED_NVETHERNETRM_L3L4_H */
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