Files
nvethernetrm/include
nannaiah 2fcef2bf75 nvethernet: Add to read PTP registers from DMA base.
Issue: Virtualization introduces read delay due to trap
mechanism.

Fix:
Move time critical PTP timestamp registers to use alternate
HW MMIO window/page that is not trapped to read PTP timestamp
registers.

Bug 2694285

Change-Id: I52340ae1f136a1a921b9c4a669c398e5d23ded73
Signed-off-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2360103
(cherry picked from commit e2ad2ff5b43532c2d5f9165f0311c59f1c6e9a4c)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2347314
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Gaurav Asati <gasati@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Gaurav Asati <gasati@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2024-02-21 16:31:59 +05:30
..
2024-02-21 16:31:59 +05:30