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git://nv-tegra.nvidia.com/kernel/nvethernetrm.git
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4864073566
Bug 5068365 Change-Id: Ib25276760ec49685a918354c31364f23093f9558 Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3297947 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
127 lines
4.8 KiB
C
127 lines
4.8 KiB
C
/*
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* SPDX-FileCopyrightText: Copyright (c) 2018-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef INCLUDED_EQOS_MMC_H
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#define INCLUDED_EQOS_MMC_H
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/**
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* @addtogroup EQOS-MMC MMC HW register offsets
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*
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* @brief MMC HW register offsets
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* @{
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*/
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#define MMC_TXOCTETCOUNT_GB 0x00714U
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#define MMC_TXPACKETCOUNT_GB 0x00718
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#define MMC_TXBROADCASTPACKETS_G 0x0071c
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#define MMC_TXMULTICASTPACKETS_G 0x00720
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#define MMC_TX64OCTETS_GB 0x00724
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#define MMC_TX65TO127OCTETS_GB 0x00728
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#define MMC_TX128TO255OCTETS_GB 0x0072c
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#define MMC_TX256TO511OCTETS_GB 0x00730
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#define MMC_TX512TO1023OCTETS_GB 0x00734
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#define MMC_TX1024TOMAXOCTETS_GB 0x00738
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#define MMC_TXUNICASTPACKETS_GB 0x0073c
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#define MMC_TXMULTICASTPACKETS_GB 0x00740
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#define MMC_TXBROADCASTPACKETS_GB 0x00744
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#define MMC_TXUNDERFLOWERROR 0x00748
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#define MMC_TXSINGLECOL_G 0x0074c
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#define MMC_TXMULTICOL_G 0x00750
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#define MMC_TXDEFERRED 0x00754
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#define MMC_TXLATECOL 0x00758
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#define MMC_TXEXESSCOL 0x0075c
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#define MMC_TXCARRIERERROR 0x00760
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#define MMC_TXOCTETCOUNT_G 0x00764
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#define MMC_TXPACKETSCOUNT_G 0x00768
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#define MMC_TXEXCESSDEF 0x0076c
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#define MMC_TXPAUSEPACKETS 0x00770
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#define MMC_TXVLANPACKETS_G 0x00774
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#define MMC_TXOVERSIZE_G 0x00778
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#define MMC_RXPACKETCOUNT_GB 0x00780
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#define MMC_RXOCTETCOUNT_GB 0x00784
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#define MMC_RXOCTETCOUNT_G 0x00788
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#define MMC_RXBROADCASTPACKETS_G 0x0078c
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#define MMC_RXMULTICASTPACKETS_G 0x00790
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#define MMC_RXCRCERROR 0x00794
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#define MMC_RXALIGNMENTERROR 0x00798
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#define MMC_RXRUNTERROR 0x0079c
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#define MMC_RXJABBERERROR 0x007a0
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#define MMC_RXUNDERSIZE_G 0x007a4
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#define MMC_RXOVERSIZE_G 0x007a8
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#define MMC_RX64OCTETS_GB 0x007ac
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#define MMC_RX65TO127OCTETS_GB 0x007b0
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#define MMC_RX128TO255OCTETS_GB 0x007b4
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#define MMC_RX256TO511OCTETS_GB 0x007b8
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#define MMC_RX512TO1023OCTETS_GB 0x007bc
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#define MMC_RX1024TOMAXOCTETS_GB 0x007c0
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#define MMC_RXUNICASTPACKETS_G 0x007c4
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#define MMC_RXLENGTHERROR 0x007c8
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#define MMC_RXOUTOFRANGETYPE 0x007cc
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#define MMC_RXPAUSEPACKETS 0x007d0
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#define MMC_RXFIFOOVERFLOW 0x007d4
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#define MMC_RXVLANPACKETS_GB 0x007d8
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#define MMC_RXWATCHDOGERROR 0x007dc
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#define MMC_RXRCVERROR 0x007e0
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#define MMC_RXCTRLPACKETS_G 0x007e4
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#define MMC_TXLPIUSECCNTR 0x007ec
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#define MMC_TXLPITRANCNTR 0x007f0
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#define MMC_RXLPIUSECCNTR 0x007f4
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#define MMC_RXLPITRANCNTR 0x007f8
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#define MMC_RXIPV4_GD_PKTS 0x00810
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#define MMC_RXIPV4_HDRERR_PKTS 0x00814
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#define MMC_RXIPV4_NOPAY_PKTS 0x00818
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#define MMC_RXIPV4_FRAG_PKTS 0x0081c
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#define MMC_RXIPV4_UBSBL_PKTS 0x00820
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#define MMC_RXIPV6_GD_PKTS 0x00824
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#define MMC_RXIPV6_HDRERR_PKTS 0x00828
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#define MMC_RXIPV6_NOPAY_PKTS 0x0082c
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#define MMC_RXUDP_GD_PKTS 0x00830
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#define MMC_RXUDP_ERR_PKTS 0x00834
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#define MMC_RXTCP_GD_PKTS 0x00838
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#define MMC_RXTCP_ERR_PKTS 0x0083c
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#define MMC_RXICMP_GD_PKTS 0x00840
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#define MMC_RXICMP_ERR_PKTS 0x00844
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#define MMC_RXIPV4_GD_OCTETS 0x00850
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#define MMC_RXIPV4_HDRERR_OCTETS 0x00854
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#define MMC_RXIPV4_NOPAY_OCTETS 0x00858
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#define MMC_RXIPV4_FRAG_OCTETS 0x0085c
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#define MMC_RXIPV4_UDSBL_OCTETS 0x00860
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#define MMC_RXIPV6_GD_OCTETS 0x00864
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#define MMC_RXIPV6_HDRERR_OCTETS 0x00868
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#define MMC_RXIPV6_NOPAY_OCTETS 0x0086c
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#define MMC_RXUDP_GD_OCTETS 0x00870
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#define MMC_RXUDP_ERR_OCTETS 0x00874
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#define MMC_RXTCP_GD_OCTETS 0x00878
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#define MMC_RXTCP_ERR_OCTETS 0x0087c
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#define MMC_RXICMP_GD_OCTETS 0x00880
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#define MMC_RXICMP_ERR_OCTETS 0x00884
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#define MMC_TX_FPE_FRAG_COUNTER 0x008A8
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#define MMC_TX_HOLD_REQ_COUNTER 0x008AC
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#define MMC_RX_PKT_ASSEMBLY_ERR_CNTR 0x008C8
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#define MMC_RX_PKT_SMD_ERR_CNTR 0x008CC
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#define MMC_RX_PKT_ASSEMBLY_OK_CNTR 0x008D0
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#define MMC_RX_FPE_FRAG_CNTR 0x008D4
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/** @} */
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void eqos_read_mmc(struct osi_core_priv_data *const osi_core);
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#endif /* INCLUDED_EQOS_MMC_H */
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