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606235ffb2
Issue: Currentlt MTL TXFIFO is divided by 10 for MGBE since there are 10 MTL TX queues but in Linux maximum 8 channels and in QNX maximum two channels can be used. On TX, DMA channel to MTL queue is static mapping so two queues memory in Linux and 8 queues memory in QNX is not getting used. Fix: Divide the TXFIFO size based on enabled DMA channels. Bug 4443026 Bug 4283087 Bug 4266776 Change-Id: I92ac5da644f2df05503ac44979e0d16079cf9231 Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3009823 Reviewed-by: Ashutosh Jha <ajha@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>