Rakesh Goyal dcc9c26474 core: add support configure pps out signal ...

Issue: Default pps output is 1 pulse (of width
clk_ptp_i) every second.

Fix: option to configure to binary rollover is 2 Hz,
and the digital rollover is 1 Hz.

Bug 3462227

Change-Id: Ic777bfaf51a72ec91c8f165910e824c55cae3057
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2641896
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

2024-02-21 16:32:06 +05:30

..

ivc_core.h

nveqos:fix MISRA_C-2012_Rule_8.13 and 10.4 issues

2024-02-21 16:32:06 +05:30

mmc.h

core: mgbe: use lock for time stamping

2024-02-21 16:32:06 +05:30

osi_common.h

dma: mgbe: update RWT and RWUT programming for silicon

2024-02-21 16:32:06 +05:30

osi_core.h

core: add support configure pps out signal

2024-02-21 16:32:06 +05:30

osi_dma_txrx.h

nvethernetrm: mgbe: add support for RSS

2024-02-21 16:31:59 +05:30

osi_dma.h

nveqos:fix MISRA_C-2012_Rule_8.13 and 10.4 issues

2024-02-21 16:32:06 +05:30

osi_macsec.h

osi:macsec:Changes to enable AN after key program

2024-02-21 16:32:06 +05:30