Rakesh Goyal fac4de5278 dma: mgbe: update RWT and RWUT programming for silicon ...

Issue: RWT and RWUT programmed for uFPGA

Fix: Update RWIT programming
     Update minimum rx coalescing timer value

Bug 200767374

Change-Id: I09c21764f0c294021c7546f75351c19c34a0b9db
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2589496
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

2024-02-21 16:32:06 +05:30

..

ivc_core.h

nvethernetrm: Update IVC support for macsec

2024-02-21 16:32:00 +05:30

mmc.h

nvethernetrm: address review comments

2024-02-21 16:32:06 +05:30

osi_common.h

dma: mgbe: update RWT and RWUT programming for silicon

2024-02-21 16:32:06 +05:30

osi_core.h

Revert "osi: eqos: mgbe: program SID through HV window"

2024-02-21 16:32:06 +05:30

osi_dma_txrx.h

nvethernetrm: mgbe: add support for RSS

2024-02-21 16:31:59 +05:30

osi_dma.h

osi: Add core debug for registers/structures

2024-02-21 16:32:06 +05:30

osi_macsec.h

nvethernetrm: address review comments

2024-02-21 16:32:06 +05:30