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Issue: Internal FIFO over/underflows if MACSEC and FPE are enabled on MGBE interafce and pre-emptable and express frames are sent in interleaved fashion Fix: Do not allow enabling any of MACSEC and FPE if the other is already enabled. Bug 3484034 Change-Id: Ifc80eb9333c836652a86362a1f7788a0ce70dbb7 Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2647788 Reviewed-by: Narayan Reddy <narayanr@nvidia.com> Reviewed-by: Om Prakash Singh <omp@nvidia.com> Reviewed-by: Mahesh Patil <maheshp@nvidia.com> Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Ashutosh Jha <ajha@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>