/*
 * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: LicenseRef-NvidiaProprietary
 *
 * NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
 * property and proprietary rights in and to this material, related
 * documentation and any modifications thereto. Any use, reproduction,
 * disclosure or distribution of this material and related documentation
 * without an express license agreement from NVIDIA CORPORATION or
 * its affiliates is strictly prohibited.
 */


/* Compiler headers */

/* Early FSP headers */

/* Hardware headers */

/* Late FSP headers */
#include <hw-config/vic-irqs.h>		// defined by the application, defines the interrupt map
#include <vic/vic-asm.h>

/* Module-specific FSP headers */
#include <tke/sections-tke.h>

	.section	SECTION_STR_TKE_TEXT, "ax"
	.arm
	.syntax		unified

	/*
	 * TKE interrupt handlers
	 */
	isr_addr    TKE_TIMER_INTR0_Isr, tegra_tke_id_timer0, tegra_tke_irq, INTERRUPT_TKE_TIMER_INTR0
	isr_addr    TKE_TIMER_INTR1_Isr, tegra_tke_id_timer1, tegra_tke_irq, INTERRUPT_TKE_TIMER_INTR1
	isr_addr    TKE_TIMER_INTR2_Isr, tegra_tke_id_timer2, tegra_tke_irq, INTERRUPT_TKE_TIMER_INTR2
	isr_addr    TKE_TIMER_INTR3_Isr, tegra_tke_id_timer3, tegra_tke_irq, INTERRUPT_TKE_TIMER_INTR3

	/*
	 * Defines the portion of the ISR map array for TKE
	 */
	.section	SECTION_STR_VIC_ISRMAP_DATA, "a"

    isr_map_entry        INTERRUPT_TKE_TIMER_INTR0,     TKE_TIMER_INTR0_Isr
    isr_map_entry        INTERRUPT_TKE_TIMER_INTR1,     TKE_TIMER_INTR1_Isr
    isr_map_entry        INTERRUPT_TKE_TIMER_INTR2,     TKE_TIMER_INTR2_Isr
    isr_map_entry        INTERRUPT_TKE_TIMER_INTR3,     TKE_TIMER_INTR3_Isr

	.end
