/*
 * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *  * Neither the name of NVIDIA CORPORATION nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef I2C__I2C_ERRORS_H
#define I2C__I2C_ERRORS_H
#define FSP__I2C__I2C_ERRORS_H                          1

/* Compiler headers */

/* Early FSP headers */
#include <misc/ct-assert.h>

/* Hardware headers */

/* Late FSP headers */
#include <base/module-id.h>	// IWYU pragma: export
                                // IWYU pragma: no_include "base/module-id.h"
#include <misc/macros.h>        // for START_RFD_BLOCK, END_RFD_BLOCK, INLINE_RFD

/* Module-specific FSP headers */

/** @file i2c-errors.h */

/*
 * Compile-time check for FSP header files
 *   Each FSP header file contains a signature unique to that file, and the
 *   FSP project.  The CT_ASSERT macro (contained in misc/ct-assert.h) can
 *   check for this signature.  If it does not exist, then the build will
 *   abort.
 *
 *   This is a trap for projects which have their own include files of the
 *   same names, but different contents.  This trap ensures that only the
 *   files from the FSP project, are built into the FSP source code.
 */
#ifndef DOXYGEN_SHOULD_SKIP_THIS
START_RFD_BLOCK(MISRA, DEVIATE, Rule_1_2, "Approval: Bug 200531996, DR: SWE-FSP-009-SWSADR.docx",
                MISRA, DEVIATE, Rule_2_3, "Approval:  On-file, DR: SWE-FSP-010-SWSADR.docx",
                MISRA, DEVIATE, Rule_2_5, "Approval: Bug 3175244, DR: SWE-FSP-013-SWSADR.docx",
                MISRA, DEVIATE, Directive_4_9, "Approval: Bug 200531995, DR: SWE-FSP-012-SWSADR.docx")
CT_ASSERT(FSP__BASE__MODULE_ID_H, "Header file missing or invalid.")
CT_ASSERT(FSP__MISC__MACROS_H, "Header file missing or invalid.")
END_RFD_BLOCK(MISRA, DEVIATE, Rule_1_2, "Approval: Bug 200531996, DR: SWE-FSP-009-SWSADR.docx",
              MISRA, DEVIATE, Rule_2_3, "Approval:  On-file, DR: SWE-FSP-010-SWSADR.docx")
#endif

/**
 * @defgroup I2C_ERRORS Error IDs for I2C specific failures
 *
 * @brief Defines I2C unit specific errors.
 * @{
 */
/** Arbitration error happened during data transfer. */
#define E_I2C_ARB_LOST                   MODULE_ERROR(I2C, 1UL)
/** Slave device has not acknowledged the transfer. */
#define E_I2C_NACK                       MODULE_ERROR(I2C, 2UL)
/** IO error happened during I2C function execution. */
#define E_I2C_IO                         MODULE_ERROR(I2C, 3UL)
/** HW specific operations are invalid. */
#define E_I2C_INVALID_OPS                MODULE_ERROR(I2C, 4UL)
/** RX Fifo underflow during a transaction. */
#define E_I2C_RX_FIFO_UNDERFLOW          MODULE_ERROR(I2C, 5UL)
/** TX Fifo overflow during a transaction. */
#define E_I2C_TX_FIFO_OVERFLOW           MODULE_ERROR(I2C, 6UL)
/** msg complete signal failed. */
#define E_I2C_EVENT_SIGNAL_FAIL          MODULE_ERROR(I2C, 7UL)
/** I2C SCL HW bus line is busy. */
#define E_I2C_SCL_BUSY                   MODULE_ERROR(I2C, 8UL)
/** I2C SDA HW bus line is busy. */
#define E_I2C_SDA_BUSY                   MODULE_ERROR(I2C, 9UL)
/** I2C HW bus line is busy. Transaction in progress. */
#define E_I2C_BUS_BUSY                   MODULE_ERROR(I2C, 10UL)
/** Stale data present in FIFOs */
#define E_I2C_FIFO_STATUS                MODULE_ERROR(I2C, 11UL)
/** Stale interrupt from previous transfer */
#define E_I2C_STALE_INT                  MODULE_ERROR(I2C, 12UL)
/** Transfer complete IRQ before actual data transfer */
#define E_I2C_XFER_COMPLETE              MODULE_ERROR(I2C, 13UL)
/** SW mismatch in data length and data buffer */
#define E_I2C_RX_FIFO_ERROR              MODULE_ERROR(I2C, 14UL)
/** @} */

#ifndef DOXYGEN_SHOULD_SKIP_THIS
END_RFD_BLOCK(MISRA, DEVIATE, Rule_2_5, "Approval: Bug 3175244, DR: SWE-FSP-013-SWSADR.docx",
              MISRA, DEVIATE, Directive_4_9, "Approval: Bug 200531995, DR: SWE-FSP-012-SWSADR.docx")
#endif

#endif
