/*
 * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: LicenseRef-NvidiaProprietary
 *
 * NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
 * property and proprietary rights in and to this material, related
 * documentation and any modifications thereto. Any use, reproduction,
 * disclosure or distribution of this material and related documentation
 * without an express license agreement from NVIDIA CORPORATION or
 * its affiliates is strictly prohibited.
 */

#ifndef PROCESSOR__DEBUG_HW_H
#define PROCESSOR__DEBUG_HW_H
#define FSP__PROCESSOR__DEBUG_HW_H                      1

/* Compiler headers */

/* Early FSP headers */
#include <misc/ct-assert.h>
#include <soc-common/hw-const.h>                        /* Must appear before any hwinc files */

/* Hardware headers */
#include <address_map_new.h>

/* Late FSP headers */

/* Module-specific FSP headers */

/*
 * Compile-time check for FSP header files
 *   Each FSP header file contains a signature unique to that file, and the
 *   FSP project.  The CT_ASSERT macro (contained in misc/ct-assert.h) can
 *   check for this signature.  If it does not exist, then the build will
 *   abort.
 *
 *   This is a trap for projects which have their own include files of the
 *   same names, but different contents.  This trap ensures that only the
 *   files from the FSP project, are built into the FSP source code.
 */
CT_ASSERT(FSP__SOC_COMMON__HW_CONST_H, "Header file missing or invalid.")

extern struct tegra_uart_ctlr tegra_uart_ctlr_uart0;

#ifndef DEBUG_UART
#define DEBUG_UART      tegra_uart_ctlr_uart0
#endif

#define TEGRA_DBG_UART_BASE     NV_ADDRESS_MAP_UART0_BASE
#define TEGRA_DBG_UART_CLK      tegra_clk_uart0
#define TEGRA_DBG_UART_RST      tegra_rst_uart0
#define TEGRA_DBG_UART_BAUD     115200

#endif
