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arm64: tegra: Combine AGX Orin board files

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The current AGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Bug 4707773

Change-Id: Ic37a105bcf9d0bd72f73cb16c0721189bf8c4921
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3207082
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
This commit is contained in:
Dara Stotland
2024-08-26 16:47:20 +00:00
committed by mobile promotions
parent f382829e61
commit 0666251418
2 changed files with 80 additions and 92 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
tegra234-p3737-0000+p3701-0000.dts
View File

@@ -3,9 +3,9 @@
#include <dt-bindings/input/linux-event-codes.h> #include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/input/gpio-keys.h> #include <dt-bindings/input/gpio-keys.h>
#include <dt-bindings/sound/rt5640.h>
#include "tegra234-p3701-0000.dtsi" #include "tegra234-p3701-0000.dtsi"
#include "tegra234-p3737-0000.dtsi"
/ { / {
model = "NVIDIA Jetson AGX Orin Developer Kit"; model = "NVIDIA Jetson AGX Orin Developer Kit";
@@ -22,23 +22,90 @@
}; };
bus@0 { bus@0 {
aconnect@2900000 {
ahub@2900800 {
i2s@2901000 {
ports {
port@1 {
endpoint {
dai-format = "i2s";
remote-endpoint = <&rt5640_ep>;
};
};
};
};
};
};
serial@3100000 { serial@3100000 {
compatible = "nvidia,tegra194-hsuart"; compatible = "nvidia,tegra194-hsuart";
reset-names = "serial"; reset-names = "serial";
status = "okay"; status = "okay";
}; };
i2c@3160000 {
status = "okay";
eeprom@56 {
compatible = "atmel,24c02";
reg = <0x56>;
label = "system";
vcc-supply = <&vdd_1v8_sys>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
serial@31d0000 { serial@31d0000 {
current-speed = <115200>; current-speed = <115200>;
status = "okay"; status = "okay";
}; };
i2c@31e0000 {
status = "okay";
audio-codec@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
clock-names = "mclk";
realtek,dmic1-data-pin = <RT5640_DMIC1_DATA_PIN_NONE>;
realtek,dmic2-data-pin = <RT5640_DMIC2_DATA_PIN_NONE>;
realtek,jack-detect-source = <RT5640_JD_SRC_HDA_HEADER>;
sound-name-prefix = "CVB-RT";
port {
rt5640_ep: endpoint {
remote-endpoint = <&i2s1_dap>;
mclk-fs = <256>;
};
};
};
};
pwm@3280000 {
status = "okay";
};
pwm@32a0000 { pwm@32a0000 {
assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>; assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>;
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
status = "okay"; status = "okay";
}; };
pwm@32c0000 {
status = "okay";
};
pwm@32f0000 {
status = "okay";
};
hda@3510000 { hda@3510000 {
nvidia,model = "NVIDIA Jetson AGX Orin HDA"; nvidia,model = "NVIDIA Jetson AGX Orin HDA";
status = "okay"; status = "okay";
@@ -341,8 +408,11 @@
}; };
}; };
pwm-fan { fan: pwm-fan {
compatible = "pwm-fan";
cooling-levels = <66 215 255>; cooling-levels = <66 215 255>;
pwms = <&pwm3 0 45334>;
#cooling-cells = <2>;
}; };
serial { serial {
@@ -444,4 +514,12 @@
}; };
}; };
}; };
vdd_1v8_sys: regulator-vdd-1v8-sys {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_SYS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
}; };

90
tegra234-p3737-0000.dtsi
View File

@@ -1,90 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/sound/rt5640.h>
/ {
compatible = "nvidia,p3737-0000";
bus@0 {
aconnect@2900000 {
ahub@2900800 {
i2s@2901000 {
ports {
port@1 {
endpoint {
dai-format = "i2s";
remote-endpoint = <&rt5640_ep>;
};
};
};
};
};
};
i2c@3160000 {
status = "okay";
eeprom@56 {
compatible = "atmel,24c02";
reg = <0x56>;
label = "system";
vcc-supply = <&vdd_1v8_sys>;
address-width = <8>;
pagesize = <8>;
size = <256>;
read-only;
};
};
i2c@31e0000 {
status = "okay";
audio-codec@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
clock-names = "mclk";
realtek,dmic1-data-pin = <RT5640_DMIC1_DATA_PIN_NONE>;
realtek,dmic2-data-pin = <RT5640_DMIC2_DATA_PIN_NONE>;
realtek,jack-detect-source = <RT5640_JD_SRC_HDA_HEADER>;
sound-name-prefix = "CVB-RT";
port {
rt5640_ep: endpoint {
remote-endpoint = <&i2s1_dap>;
mclk-fs = <256>;
};
};
};
};
pwm@3280000 {
status = "okay";
};
pwm@32c0000 {
status = "okay";
};
pwm@32f0000 {
status = "okay";
};
};
fan: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm3 0 45334>;
#cooling-cells = <2>;
};
vdd_1v8_sys: regulator-vdd-1v8-sys {
compatible = "regulator-fixed";
regulator-name = "VDD_1V8_SYS";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};