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t23x: igx: Resize 64-bit aperture of PCIe C5
Resize 64-bit aperture of PCIe C5 controller to accommodate
endpoints with bigger BARs.
Bug 4309882
Change-Id: I8ae999df42974e5ce1144896b6d657604ce5d95c
Signed-off-by: Ian Stewart <istewart@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2987793
(cherry picked from commit 9a81385241)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3090784
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -278,6 +278,18 @@
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};
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};
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pcie@141a0000 {
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reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */
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0x00 0x3a000000 0x0 0x00040000 /* configuration space (256K) */
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0x00 0x3a040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
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0x00 0x3a080000 0x0 0x00040000 /* DBI reg space (256K) */
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0x2e 0x20000000 0x0 0x10000000>; /* ECAM (256MB) */
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ranges = <0x81000000 0x00 0x3a100000 0x00 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */
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0x82000000 0x00 0x40000000 0x2e 0x30000000 0x0 0x08000000 /* non-prefetchable memory (128MB) */
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0xc3000000 0x27 0x40000000 0x27 0x40000000 0x6 0xe0000000>; /* prefetchable memory (28160MB) */
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};
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gpu@17000000 {
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status = "okay";
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};
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