diff --git a/nv-soc/tegra234-soc-overlay.dtsi b/nv-soc/tegra234-soc-overlay.dtsi
index 292fb94..d77f1c8 100644
--- a/nv-soc/tegra234-soc-overlay.dtsi
+++ b/nv-soc/tegra234-soc-overlay.dtsi
@@ -209,55 +209,6 @@
 			status = "disabled";
 		};
 
-		serial@3140000 {
-			compatible = "nvidia,tegra234-uart", "nvidia,tegra20-uart";
-			reg = <0x0 0x03140000 0x0 0x10000>;
-			interrupts = <GIC_SPI TEGRA234_IRQ_UARTE IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&bpmp TEGRA234_CLK_UARTE>;
-			clock-names = "serial";
-			resets = <&bpmp TEGRA234_RESET_UARTE>;
-			reset-names = "serial";
-			status = "disabled";
-		};
-
-		spi@3210000 {
-			compatible = "nvidia,tegra210-spi";
-			reg = <0x0 0x03210000 0x0 0x1000>;
-			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			clocks = <&bpmp TEGRA234_CLK_SPI1>;
-			assigned-clocks = <&bpmp TEGRA234_CLK_SPI1>;
-			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
-			clock-names = "spi";
-			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-			resets = <&bpmp TEGRA234_RESET_SPI1>;
-			reset-names = "spi";
-			dmas = <&gpcdma 15>, <&gpcdma 15>;
-			dma-names = "rx", "tx";
-			dma-coherent;
-			status = "disabled";
-		};
-
-		spi@3230000 {
-			compatible = "nvidia,tegra210-spi";
-			reg = <0x0 0x03230000 0x0 0x1000>;
-			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			clocks = <&bpmp TEGRA234_CLK_SPI3>;
-			clock-names = "spi";
-			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-			assigned-clocks = <&bpmp TEGRA234_CLK_SPI3>;
-			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
-			resets = <&bpmp TEGRA234_RESET_SPI3>;
-			reset-names = "spi";
-			dmas = <&gpcdma 17>, <&gpcdma 17>;
-			dma-names = "rx", "tx";
-			dma-coherent;
-			status = "disabled";
-		};
-
 		tachometer@39c0000 {
 			compatible = "nvidia,pwm-tegra234-tachometer";
 			reg = <0x0 0x039c0000 0x0 0x10>;
@@ -822,27 +773,6 @@
 			};
 		};
 
-		spi@c260000 {
-			compatible = "nvidia,tegra210-spi";
-			reg = <0x0 0x0c260000 0x0 0x1000>;
-			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			clocks = <&bpmp TEGRA234_CLK_SPI2>,
-				<&bpmp TEGRA234_CLK_PLLAON>,
-				<&bpmp TEGRA234_CLK_OSC>;
-			clock-names = "spi";
-			iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-			assigned-clocks = <&bpmp TEGRA234_CLK_SPI2>;
-			assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
-			resets = <&bpmp TEGRA234_RESET_SPI2>;
-			reset-names = "spi";
-			dmas = <&gpcdma 16>, <&gpcdma 16>;
-			dma-names = "rx", "tx";
-			dma-coherent;
-			status = "disabled";
-		};
-
 		mttcan@c310000 {
 			compatible = "nvidia,tegra194-mttcan";
 			reg = <0x0 0x0c310000 0x0 0x144>,