From 17dccd57a1c7f8e8f13e7e8696223cfea5b8be33 Mon Sep 17 00:00:00 2001
From: Thierry Reding <treding@nvidia.com>
Date: Fri, 2 Feb 2024 11:08:12 +0100
Subject: [PATCH] UPSTREAM: arm64: tegra: Set the correct PHY mode for MGBE

The PHY is configured in 10GBASE-R, so make sure to reflect that in DT.

Bug 3820445
Bug 4293378

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Change-Id: I36f54566fee253515546663a332f41cf66be90b0
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3082844
(cherry picked from commit 13afbb33f5303ed5097bf2188a4c8683fab87328)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3083873
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
---
 tegra234-p3737-0000+p3701-0000.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tegra234-p3737-0000+p3701-0000.dts b/tegra234-p3737-0000+p3701-0000.dts
index 4674844..b893ea2 100644
--- a/tegra234-p3737-0000+p3701-0000.dts
+++ b/tegra234-p3737-0000+p3701-0000.dts
@@ -170,7 +170,7 @@
 			status = "okay";
 
 			phy-handle = <&mgbe0_phy>;
-			phy-mode = "usxgmii";
+			phy-mode = "10gbase-r";
 
 			mdio {
 				#address-cells = <1>;