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p3737: add overlay for 1:1 32-bit resource mapping

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Intended for a use-case that needs to avoid using _TRA ACPI method.

This overlay changes the PCIe controller non-prefetchable regions to:
C5: 0x28000000 - 0x3b7fffff (size 312 MB)
C4: 0x3b800000 - 0x3dbfffff (size 36 MB)
C1: 0x3dc00000 - 0x3fffffff (size 36 MB)

The controller corresponding to the Concord PCIe slot is also moved to
domain 0.

Bug 4067222

Change-Id: I3f0c3c964c139030ca4ec68b57bb49599b82c77f
Signed-off-by: Kamil Pilch <kpilch@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2909354
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Kamil Pilch
2023-05-23 11:46:01 -04:00
committed by mobile promotions
parent c0d10ded7b
commit 1fff8624c2
2 changed files with 57 additions and 0 deletions
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1
overlay/Makefile
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@@ -15,6 +15,7 @@ dtbo-y += tegra234-audio-overlay.dtbo
dtbo-y += tegra234-carveouts.dtbo dtbo-y += tegra234-carveouts.dtbo
dtbo-y += tegra234-jetson.dtbo dtbo-y += tegra234-jetson.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000.dtbo dtbo-y += tegra234-p3737-0000+p3701-0000.dtbo
dtbo-y += tegra234-p3737-0000+p3701-0000-pcie-no-tra.dtbo
dtbo-y += tegra234-p3740-0002+p3701-0008.dtbo dtbo-y += tegra234-p3740-0002+p3701-0008.dtbo
dtbo-y += tegra234-p3740-0002+p3701-0008-safety.dtbo dtbo-y += tegra234-p3740-0002+p3701-0008-safety.dtbo
dtbo-y += tegra234-p3768-0000+p3767-0000.dtbo dtbo-y += tegra234-p3768-0000+p3767-0000.dtbo

56
overlay/tegra234-p3737-0000+p3701-0000-pcie-no-tra.dts Normal file
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@@ -0,0 +1,56 @@
// SPDX-License-Identifier: GPL-2.0-only
// SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
/dts-v1/;
/plugin/;
/ {
compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234";
fragment-pcie-no-tra-overrides@0 {
target-path = "/";
__overlay__ {
pcie@14100000 {
reg = <0x00 0x14100000 0x00 0x20000
0x00 0x3dc00000 0x00 0x40000
0x00 0x3dc40000 0x00 0x40000
0x00 0x3dc80000 0x00 0x40000
0x20 0xb0000000 0x00 0x10000000>;
ranges = <0x81000000 0x00 0x3dd00000 0x00 0x3dd00000 0x00 0x100000
0x82000000 0x00 0x3de00000 0x00 0x3de00000 0x00 0x2200000
0xc3000000 0x20 0x80000000 0x20 0x80000000 0x00 0x28000000>;
nvidia,controller-id = <&bpmp 1>;
};
pcie@14160000 {
reg = <0x00 0x14160000 0x00 0x20000
0x00 0x3b800000 0x00 0x40000
0x00 0x3b840000 0x00 0x40000
0x00 0x3b880000 0x00 0x40000
0x24 0x30000000 0x00 0x10000000>;
ranges = <0x81000000 0x00 0x3b900000 0x00 0x3b900000 0x00 0x100000
0x82000000 0x00 0x3ba00000 0x00 0x3ba00000 0x00 0x2200000
0xc3000000 0x21 0x40000000 0x21 0x40000000 0x02 0xe8000000>;
nvidia,controller-id = <&bpmp 4>;
};
pcie@141a0000 {
linux,pci-domain = <0x00>;
reg = <0x00 0x141a0000 0x00 0x20000
0x00 0x28000000 0x00 0x40000
0x00 0x28040000 0x00 0x40000
0x00 0x28080000 0x00 0x40000
0x2b 0x30000000 0x00 0x10000000>;
ranges = <0x81000000 0x00 0x28100000 0x00 0x28100000 0x00 0x100000
0x82000000 0x00 0x28200000 0x00 0x28200000 0x00 0x13600000
0xc3000000 0x27 0x40000000 0x27 0x40000000 0x03 0xe8000000>;
nvidia,controller-id = <&bpmp 5>;
};
pcie@14180000 {
linux,pci-domain = <0x05>;
nvidia,controller-id = <&bpmp 0>;
};
};
};
};