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tegra234: p3737-0000: Move audio codec to base from overlay

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The audio codec and sound nodes are added into the base DTS
file in mainline. Hence, to align the base DTB with mainline,
move the audio codec from overlay file to the base file.

Cherry picked from commit f3e2de01530fdeb1317d7680740f0b5894ffd607
Change: Partial integration limited to codec only. Rest of changes
        are already integrated.

Bug 4037899

Change-Id: I0d4835b2d1503610261dacc3049d61514592fea2
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2949578
(cherry picked from commit 2cf1cedaa4)
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955889
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Laxman Dewangan
2023-08-05 04:10:26 +00:00
committed by mobile promotions
parent 5d38cfaa63
commit 3b03f7cf15
3 changed files with 60 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
overlay/tegra234-p3737-0000.dtsi
View File

@@ -95,24 +95,8 @@
__overlay__ { __overlay__ {
bus@0 { bus@0 {
i2c@31e0000 { i2c@31e0000 {
rt5640: rt5640.8-001c@1c { rt5640: audio-codec@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
clock-names = "mclk";
realtek,dmic1-data-pin = <0>; /* RT5659_DMIC1_NULL */
realtek,dmic2-data-pin = <0>; /* RT5659_DMIC2_NULL */
realtek,jack-detect-source = <7>;
/* Codec IRQ output */
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <1>; #sound-dai-cells = <1>;
sound-name-prefix = "CVB-RT";
status = "okay"; status = "okay";
}; };
}; };

18
tegra234-p3737-0000+p3701-0000.dts
View File

@@ -401,6 +401,24 @@
<&dmic3_port>; <&dmic3_port>;
label = "NVIDIA Jetson AGX Orin APE"; label = "NVIDIA Jetson AGX Orin APE";
widgets = "Microphone", "CVB-RT MIC Jack",
"Microphone", "CVB-RT MIC",
"Headphone", "CVB-RT HP Jack",
"Speaker", "CVB-RT SPK";
routing = /* I2S1 <-> RT5640 */
"CVB-RT AIF1 Playback", "I2S1 DAP-Playback",
"I2S1 DAP-Capture", "CVB-RT AIF1 Capture",
/* RT5640 codec controls */
"CVB-RT HP Jack", "CVB-RT HPOL",
"CVB-RT HP Jack", "CVB-RT HPOR",
"CVB-RT IN1P", "CVB-RT MIC Jack",
"CVB-RT IN2P", "CVB-RT MIC Jack",
"CVB-RT SPK", "CVB-RT SPOLP",
"CVB-RT SPK", "CVB-RT SPORP",
"CVB-RT DMIC1", "CVB-RT MIC",
"CVB-RT DMIC2", "CVB-RT MIC";
}; };
thermal-zones { thermal-zones {

41
tegra234-p3737-0000.dtsi
View File

@@ -1,9 +1,26 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/sound/rt5640.h>
/ { / {
compatible = "nvidia,p3737-0000"; compatible = "nvidia,p3737-0000";
bus@0 { bus@0 {
aconnect@2900000 {
ahub@2900800 {
i2s@2901000 {
ports {
port@1 {
endpoint {
dai-format = "i2s";
remote-endpoint = <&rt5640_ep>;
};
};
};
};
};
};
i2c@3160000 { i2c@3160000 {
status = "okay"; status = "okay";
@@ -20,6 +37,30 @@
}; };
}; };
i2c@31e0000 {
status = "okay";
audio-codec@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
clock-names = "mclk";
realtek,dmic1-data-pin = <RT5640_DMIC1_DATA_PIN_NONE>;
realtek,dmic2-data-pin = <RT5640_DMIC2_DATA_PIN_NONE>;
realtek,jack-detect-source = <RT5640_JD_SRC_HDA_HEADER>;
sound-name-prefix = "CVB-RT";
port {
rt5640_ep: endpoint {
remote-endpoint = <&i2s1_dap>;
mclk-fs = <256>;
};
};
};
};
pwm@3280000 { pwm@3280000 {
status = "okay"; status = "okay";
}; };